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bq24100, bq24103, bq24103A, bq24104, bq24105
bq24108, bq24109, bq24113, bq24113A, bq24115
SLUS606P – JUNE 2004 – REVISED NOVEMBER 2015
bq241xx Synchronous Switched-Mode, Li-Ion and Li-Polymer Charge-Management
IC With Integrated Power FETs (bqSWITCHER™)
1 Features
2 Applications
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•
1
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Ideal For Highly Efficient Charger Designs For
Single-, Two-, or Three-Cell Li-Ion and Li-Polymer
Battery Packs
bq24105 Also for LiFePO4 Battery (see Using
bq24105 to Charge the LiFePO4 Battery)
Integrated Synchronous Fixed-Frequency PWM
Controller Operating at 1.1 MHz With 0% to 100%
Duty Cycle
Integrated Power FETs for Up To 2-A Charge
Rate
High-Accuracy Voltage and Current Regulation
Available in Both Stand-Alone (Built-In Charge
Management and Control) and System-Controlled
(Under System Command) Versions
Status Outputs for LED or Host Processor
Interface Indicates Charge-In-Progress, Charge
Completion, Fault, and AC-Adapter Present
Conditions
20-V Maximum Voltage Rating on IN and OUT
Pins
High-Side Battery Current Sensing
Battery Temperature Monitoring
Automatic Sleep Mode for Low Power
Consumption
System-Controlled Version Can Be Used in NiMH
and NiCd Applications
Reverse Leakage Protection Prevents Battery
Drainage
Thermal Shutdown and Protection
Built-In Battery Detection
Available in 20-Pin, 3.50 mm × 4.50 mm VQFN
Package
Handheld Products
Portable Media Players
Industrial and Medical Equipment
Portable Equipment
3 Description
The bqSWITCHER™ series are highly integrated Liion and Li-polymer switch-mode charge management
devices targeted at a wide range of portable
applications. The bqSWITCHER™ series offers
integrated synchronous PWM controller and power
FETs, high-accuracy current and voltage regulation,
charge preconditioning, charge status, and charge
termination, in a small, thermally enhanced VQFN
package. The system-controlled version provides
additional inputs for full charge management under
system control.
The bqSWITCHER™ charges the battery in three
phases: conditioning, constant current, and constant
voltage. Charge is terminated based on userselectable minimum current level. A programmable
charge timer provides a safety backup for charge
termination. The bqSWITCHER™ automatically
restarts the charge cycle if the battery voltage falls
below an internal threshold. The bqSWITCHER™
automatically enters sleep mode when VCC supply is
removed.
Device Information
PART NUMBER
bq241xx
PACKAGE
VQFN (20)
(1)
BODY SIZE (NOM)
3.50 mm × 4.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical 1-Cell Application
LOUT
BQ24100
VIN
CIN
1.5 KW
10 mF
1.5 KW
Adapter
Present
1.5 KW
Done
Charge
3
IN
OUT 1
4
IN
OUT 20
6
VCC
RSNS
10 mH
D1
PGND 17
COUT
0.1W
10 mF
Battery
Pack
Pack+
Pack-
MMBZ18VALT1
103AT
2
STAT1 PGND 18
19 STAT2
5
PG
7
TTC
SNS 15
BAT 14
ISET1 8
7.5 KW RISET1
VTSB
7.5 KW
CTTC
16 CE
ISET2 9
0.1 mF
10 VSS
13 NC
0.1 mF
9.31 KW
RT1
442 KW
RT2
RISET2
TS 12
VTSB 11
0.1 mF
0.1 mF
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq24100, bq24103, bq24103A, bq24104, bq24105
bq24108, bq24109, bq24113, bq24113A, bq24115
SLUS606P – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Options.......................................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
8
1
1
1
2
4
5
6
Absolute Maximum Ratings ..................................... 6
ESD Ratings.............................................................. 6
Recommended Operating Conditions....................... 7
Thermal Information .................................................. 7
Electrical Characteristics........................................... 7
Dissipation Ratings ................................................. 10
Typical Characteristics ............................................ 10
Detailed Description ............................................ 11
8.1
8.2
8.3
8.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
11
12
13
22
9
Application and Implementation ........................ 24
9.1 Application Information............................................ 24
9.2 Typical Application ................................................. 24
9.3 System Examples ................................................... 28
10 Power Supply Recommendations ..................... 32
11 Layout................................................................... 32
11.1 Layout Guidelines ................................................. 32
11.2 Layout Example .................................................... 34
11.3 Thermal Considerations ........................................ 34
12 Device and Documentation Support ................. 35
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Device Support......................................................
Documentation Support ........................................
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
35
35
35
35
35
36
36
13 Mechanical, Packaging, and Orderable
Information ........................................................... 36
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision O (March 2010) to Revision P
•
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
Changes from Revision M (August 2008) to Revision N
Page
•
Added part number bq24104.................................................................................................................................................. 1
•
Added part number bq24104 to the Ordering Information ..................................................................................................... 4
•
Deleted Product Preview from bq24104RHLR ....................................................................................................................... 4
•
Deleted Product Preview from bq24104RHLT ....................................................................................................................... 4
•
Added bq24104 to the Terminal Functions table.................................................................................................................... 5
•
Added part number bq24104 to the Deglitch time.................................................................................................................. 8
•
Added bq24104 to Table 2. .................................................................................................................................................. 16
•
Added part number bq24104 to Figure 16 .......................................................................................................................... 28
Changes from Revision L (December 2007) to Revision M
Page
•
Changed specifications and symbols for (cold, hot, and cutoff) temperature thresholds....................................................... 8
•
Changed equation definitions ............................................................................................................................................... 13
•
Changed equation definitions ............................................................................................................................................... 27
Changes from Revision K (November 2007) to Revision L
Page
•
Changed Added figure almost identical to Figure 3. Changed RISET2 to 20 kohms. ......................................................... 31
•
Added Changed resistor bridge values 301 to 143, 100 to 200 Kohms............................................................................... 31
2
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bq24115
bq24100, bq24103, bq24103A, bq24104, bq24105
bq24108, bq24109, bq24113, bq24113A, bq24115
www.ti.com
SLUS606P – JUNE 2004 – REVISED NOVEMBER 2015
Changes from Revision J (October 2007) to Revision K
Page
•
Changed From: CIU To: CDY................................................................................................................................................. 4
•
Added bq24109 to VOREG ....................................................................................................................................................... 7
•
Added part number bq24109 to VLOWV .................................................................................................................................. 8
•
Changed Deglitch time for temperature fault, TS, bq24109 typical value From: 1000 To: 500 ............................................. 8
•
Changed From: Single-cell or two-cell To: one-, two-, or three-cell applications. Deleted text............................................ 13
Changes from Revision I (August 2007) to Revision J
Page
•
Added part number bq24109 ................................................................................................................................................. 1
•
Added part number bq24109 to the Ordering Information ..................................................................................................... 4
•
Added bq24109 to the Terminal Functions table.................................................................................................................... 5
•
Added part number bq24109 to the Deglitch time.................................................................................................................. 8
•
Added bq24109 to Table 2. .................................................................................................................................................. 16
Changes from Revision H (July 2007) to Revision I
Page
•
Added part number bq24103A .............................................................................................................................................. 1
•
Changed device size From: 5,5 mm x 3.5 mm To: 4,5 mm x 3.5 mm ................................................................................... 1
•
Added part number bq24103A to the Ordering Information ................................................................................................... 4
•
Added bq24103A to the Terminal Functions table. ................................................................................................................ 5
•
Added part numbers bq24103Ana d bq24113A to VOREG ..................................................................................................... 7
•
Added part number bq24103A to VLOWV ................................................................................................................................ 8
•
Added part number bq24103A to Figure 16 ........................................................................................................................ 28
Changes from Revision G (June 2007) to Revision H
Page
•
Changed Figure 1 ................................................................................................................................................................ 10
•
Changed Figure 2 ................................................................................................................................................................ 10
•
Added D1 to diode MMBZ18VALT1 in Figure 13................................................................................................................. 24
•
Added D1 to diode MMBZ18VALT1 in Figure 16 ................................................................................................................ 28
•
Added D1 to diode MMBZ18VALT1 in Figure 17 ................................................................................................................ 29
•
Added D1 to diode MMBZ18VALT1 and Note A to Figure 18. ............................................................................................ 29
Changes from Revision F (January 2007) to Revision G
Page
•
Added bq24113A to the data sheet and the Ordering Information......................................................................................... 4
•
Added bq24113A to the Terminal Functions table. ................................................................................................................ 5
•
Changed bq24113A added to Figure 18 ............................................................................................................................. 29
Copyright © 2004–2015, Texas Instruments Incorporated
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bq24115
3
bq24100, bq24103, bq24103A, bq24104, bq24105
bq24108, bq24109, bq24113, bq24113A, bq24115
SLUS606P – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
5 Device Options
(1)
(2)
(3)
4
CHARGE REGULATION VOLTAGE (V)
INTENDED APPLICATION
PART NUMBER
(1) (2) (3)
4.2 V
Stand-alone
bq24100
1 or 2 cells selectable (CELLS pin, 4.2 V or 8.4 V)
Stand-alone
bq24103
1 or 2 cells selectable (CELLS pin, 4.2 V or 8.4 V)
Stand-alone
bq24103A
1 or 2 cells selectable (CELLS pin, 4.2 V or 8.4 V)
(Blinking status pins)
Stand-alone
bq24104
Externally programmable (2.1 V to 15.5 V)
Stand-alone
bq24105
4.2 V (Blinking status pins)
Stand-alone
1 or 2 cells selectable (CELLS pin, 4.2 V or 8.4 V)
System-controlled
bq24113
1 or 2 cells selectable (CELLS pin, 4.2 V or 8.4 V)
System-controlled
bq24113A
Externally programmable (2.1 V to 15.5 V)
System-controlled
bq24115
bq24108
bq24109
The RHL package is available in the following options:
T – taped and reeled in quantities of 250 devices per reel
R – taped and reeled in quantities of 3000 devices per reel
This product is RoHS-compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for
use in specified lead-free soldering processes.
TJ = –40°C to 125°C
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: bq24100 bq24103 bq24103A bq24104 bq24105 bq24108 bq24109 bq24113 bq24113A
bq24115
bq24100, bq24103, bq24103A, bq24104, bq24105
bq24108, bq24109, bq24113, bq24113A, bq24115
www.ti.com
SLUS606P – JUNE 2004 – REVISED NOVEMBER 2015
6 Pin Configuration and Functions
OUT
OUT
RHL Package
20-Pin VQFN
Top View
1
2
20 19
3
18
4
17
5
16
6
15
7
14
8
13
9 10
STAT2 or NC
PGND
PGND
CE
SNS
BAT
CELLS or FB or NC
TS
VTSB
11 12
VSS
STAT1
IN
IN
PG
VCC
TTC or CMODE
ISET1
ISET2
bq24100, 03, 03A, 04, 05, 08, 09, 13, 13A, 15
Pin Functions
PIN
bq24100,
bq24108,
bq24109
bq24103,
bq24103A
bq24104
bq24105
bq24113,
bq24113A
bq24115
BAT
14
14
14
14
14
I
Battery voltage sense input. Bypass it with a 0.1 μF capacitor to PGND if
there are long inductive leads to battery.
CE
16
16
16
16
16
I
Charger enable input. This active low input, if set high, suspends charge
and places the device in the low-power sleep mode. Do not pull up this
input to VTSB.
I
Available on parts with fixed output voltage. Ground or float for single-cell
operation (4.2 V). For two-cell operation (8.4 V) pull up this pin with a
resistor to VCC.
7
I
Charge mode selection: low for precharge as set by ISET2 pin and high
(pull up to VTSB or VCC(min), PWM switching
I(VCC)
I(SLP)
VCC supply current
Battery discharge sleep current, (SNS,
BAT, OUT, FB pins)
10
VCC > VCC(min), PWM NOT switching
5
VCC > VCC(min), CE = HIGH
315
0°C ≤ TJ ≤ 65°C, VI(BAT) = 4.2 V,
VCC < V(SLP) or VCC > V(SLP) but not in charge
3.5
0°C ≤ TJ ≤ 65°C, VI(BAT) = 8.4 V,
VCC < V(SLP) or VCC > V(SLP) but not in charge
5.5
0°C ≤ TJ ≤ 65°C, VI(BAT) = 12.6 V,
VCC < V(SLP) or VCC > V(SLP) but not in charge
7.7
mA
μA
μA
VOLTAGE REGULATION
VOREG
VIBAT
CELLS = Low, in voltage regulation
4.2
CELLS = High, in voltage regulation
8.4
Output voltage, bq24100/08/09
Operating in voltage regulation
4.2
Feedback regulation REF for bq24105/15
only (W/FB)
IIBAT = 25 nA typical into pin
2.1
Output voltage, bq24103/03A/04/13/13A
Voltage regulation accuracy
TA = 25°C
V
V
–0.5%
0.5%
–1%
1%
150
2000
–10%
10%
CURRENT REGULATION - FAST CHARGE
IOCHARGE
Output current range of converter
VLOWV ≤ VI(BAT) < VOREG,
V(VCC) - VI(BAT) > V(DO-MAX)
mA
100 mV ≤ VIREG≤ 200 mV,
V
VIREG
Voltage regulated across R(SNS) Accuracy
V(ISET1)
Output current set voltage
Copyright © 2004–2015, Texas Instruments Incorporated
IREG
+
1V
RSET1
1000,
Programmed Where
5 kΩ ≤ RSET1 ≤ 10 kΩ, Select RSET1 to
program VIREG,
VIREG(measured) = IOCHARGE + RSNS
(–10% to 10% excludes errors due to RSET1
and R(SNS) tolerances)
V(LOWV) ≤ VI(BAT) ≤ VO(REG),
V(VCC) ≤ VI(BAT) × V(DO-MAX)
1
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bq24115
V
7
bq24100, bq24103, bq24103A, bq24104, bq24105
bq24108, bq24109, bq24113, bq24113A, bq24115
SLUS606P – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
Electrical Characteristics (continued)
TJ = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)
PARAMETER
K(ISET1)
Output current set factor
TEST CONDITIONS
MIN
VLOWV ≤ VI(BAT) < VO(REG) ,
V(VCC) ≤ VI(BAT) + V(DO-MAX)
TYP
MAX
1000
UNIT
V/A
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION
VLOWV
Precharge to fast-charge transition voltage
threshold, BAT,
bq24100/03/03A/04/05/08/09 ICs only
t
Deglitch time for precharge to fast charge
transition,
IOPRECHG
V(ISET2)
K(ISET2)
Precharge current set factor
68
71.4
75
%VO(REG)
Rising voltage;
tRISE, tFALL = 100 ns, 2-mV overdrive
20
30
40
ms
Precharge range
VI(BAT) < VLOWV, t < tPRECHG
15
200
mA
Precharge set voltage, ISET2
VI(BAT) < VLOWV, t < tPRECHG
100
mV
1000
V/A
100 mV ≤ VIREG-PRE ≤ 100 mV,
V
VIREG-PRE
Voltage regulated across RSNS-Accuracy
IREG*PRE
+ 0.1V
RSET2
1000,
(PGM) Where
1.2 kΩ ≤ RSET2 ≤ 10 kΩ, Select RSET1
to program VIREG-PRE,
VIREG-PRE (Measured) = IOPRE-CHG × RSNS
(–20% to 20% excludes errors due to RSET1
and RSNS tolerances)
–20%
20%
15
200
CHARGE TERMINATION (CURRENT TAPER) DETECTION
ITERM
Charge current termination detection range
VI(BAT) > VRCH
VTERM
Charge termination detection set voltage,
ISET2
VI(BAT) > VRCH
K(ISET2)
Termination current set factor
tdg-TERM
100
mV
1000
Charger termination accuracy
VI(BAT) > VRCH
Deglitch time for charge termination
Both rising and falling,
2-mV overdrive tRISE, tFALL = 100 ns
–20%
mA
V/A
20%
20
30
40
ms
TEMPERATURE COMPARATOR AND VTSB BIAS REGULATOR
%LTF
Cold temperature threshold, TS, % of bias
VLTF = VO(VTSB) × % LTF/100
72.8%
73.5%
74.2%
%HTF
Hot temperature threshold, TS, % of bias
VHTF = VO(VTSB) × % HTF/100
33.7%
34.4%
35.1%
%TCO
Cutoff temperature threshold, TS, % of
bias
VTCO = VO(VTSB) × % TCO/100
28.7%
29.3%
29.9%
0.5%
1%
1.5%
20
30
40
LTF hysteresis
Deglitch time for temperature fault, TS
Both rising and falling,
2-mV overdrive tRISE, tFALL = 100 ns
tdg-TS
Deglitch time for temperature fault, TS,
bq24109, bq24104
VO(VTSB)
TS bias output voltage
VCC > VIN(min),
I(VTSB) = 10 mA 0.1 μF ≤ CO(VTSB) ≤ 1 μF
VO(VTSB)
TS bias voltage regulation accuracy
VCC > IN(min),
I(VTSB) = 10 mA 0.1 μF ≤ CO(VTSB) ≤ 1 μF
ms
500
3.15
–10%
V
10%
BATTERY RECHARGE THRESHOLD
VRCH
tdg-RCH
Recharge threshold voltage
Below VOREG
75
100
125
mV/cell
Deglitch time
VI(BAT) < decreasing below threshold,
tFALL = 100 ns 10-mV overdrive
20
30
40
ms
STAT1, STAT2, AND PG OUTPUTS
VOL(STATx)
Low-level output saturation voltage, STATx
IO = 5 mA
0.5
VOL(PG)
Low-level output saturation voltage, PG
IO = 10 mA
0.1
V
CE CMODE, CELLS INPUTS
VIL
Low-level input voltage
IIL = 5 μA
VIH
High-level input voltage
IIH = 20 μA
0
0.4
1.3
VCC
V
TTC INPUT
tPRECHG
Precharge timer
tCHARGE
Programmable charge timer range
t(CHG) = C(TTC) × K(TTC)
Charge timer accuracy
0.01 μF ≤ C(TTC) ≤ 0.18 μF
8
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1440
2160
s
25
1800
572
minutes
-10%
10%
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: bq24100 bq24103 bq24103A bq24104 bq24105 bq24108 bq24109 bq24113 bq24113A
bq24115
bq24100, bq24103, bq24103A, bq24104, bq24105
bq24108, bq24109, bq24113, bq24113A, bq24115
www.ti.com
SLUS606P – JUNE 2004 – REVISED NOVEMBER 2015
Electrical Characteristics (continued)
TJ = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)
PARAMETER
KTTC
Timer multiplier
CTTC
Charge time capacitor range
VTTC_EN
TTC enable threshold voltage
TEST CONDITIONS
MIN
TYP
MAX
2.6
0.01
V(TTC) rising
UNIT
min/nF
μF
0.22
200
mV
SLEEP COMPARATOR
VSLP-ENT
Sleep-mode entry threshold
VSLP-EXIT
Sleep-mode exit hysteresis,
tdg-SLP
Deglitch time for sleep mode
2.3 V ≤ VI(OUT) ≤ VOREG, for 1 or 2 cells
VCC ≤ VIBAT
+5 mV
VCC ≤ VIBAT
+75 mV
VI(OUT) = 12.6 V, RIN = 1 kΩ
bq24105/15 (1)
VCC ≤ VIBAT
-4 mV
VCC ≤ VIBAT
+73 mV
40
160
2.3 V ≤ VI(OUT)≤ VOREG
VCC decreasing below threshold,
tFALL = 100 ns, 10-mV overdrive,
PMOS turns off
VCC decreasing below threshold,
tFALL = 100 ns, 10-mV overdrive,
STATx pins turn off
V
mV
μs
5
20
30
40
3.50
ms
UVLO
VUVLO-ON
IC active threshold voltage
VCC rising
3.15
3.30
IC active hysteresis
VCC falling
120
150
V
mV
PWM
Internal P-channel MOSFET on-resistance
Internal N-channel MOSFET on-resistance
fOSC
7 V ≤ VCC ≤ VCC(max)
400
4.5 V ≤ VCC ≤ 7 V
500
7 V ≤ VCC ≤ VCC(max)
130
4.5 V ≤ VCC ≤ 7 V
mΩ
150
Oscillator frequency
1.1
Frequency accuracy
–9%
MHz
9%
DMAX
Maximum duty cycle
DMIN
Minimum duty cycle
100%
tTOD
Switching delay time (turn on)
20
ns
tsyncmin
Minimum synchronous FET on time
60
ns
0%
Synchronous FET minimum current-off
threshold (2)
50
400
mA
BATTERY DETECTION
IDETECT
Battery detection current during time-out
fault
VI(BAT) < VOREG – VRCH
IDISCHRG1
Discharge current
tDISCHRG1
Discharge time
IWAKE
Wake current
tWAKE
Wake time
IDISCHRG2
Termination discharge current
tDISCHRG2
Termination time
2
mA
VSHORT < VI(BAT) < VOREG – VRCH
400
μA
VSHORT < VI(BAT) < VOREG – VRCH
1
s
VSHORT < VI(BAT) < VOREG – VRCH
2
mA
VSHORT < VI(BAT) < VOREG – VRCH
0.5
s
Begins after termination detected,
VI(BAT) ≤ VOREG
400
μA
262
ms
OUTPUT CAPACITOR
COUT
Required output ceramic capacitor range
from SNS to PGND, between inductor and
RSNS
CSNS
Required SNS capacitor (ceramic) at SNS
pin
4.7
10
μF
47
μF
0.1
PROTECTION
VOVP
OVP threshold voltage
ILIMIT
Cycle-by-cycle current limit
VSHORT
Short-circuit voltage threshold, BAT
(1)
(2)
Threshold over VOREG to turn off P-channel
MOSFET, STAT1, and STAT2 during charge
or termination states
110
117
2.6
3.6
4.5
A
VI(BAT) falling
1.95
2
2.05
V/cell
121
%VO(REG)
For bq24105 and bq24115 only. RIN is connected between IN and PGND pins and needed to ensure sleep entry.
N-channel always turns on for approximately 60 ns and then turns off if current is too low.
Copyright © 2004–2015, Texas Instruments Incorporated
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bq24115
9
bq24100, bq24103, bq24103A, bq24104, bq24105
bq24108, bq24109, bq24113, bq24113A, bq24115
SLUS606P – JUNE 2004 – REVISED NOVEMBER 2015
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Electrical Characteristics (continued)
TJ = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)
PARAMETER
ISHORT
Short-circuit current
TSHTDWN
Thermal trip
TEST CONDITIONS
MIN
VI(BAT) ≤ VSHORT
TYP
MAX
35
UNIT
65
Thermal hysteresis
mA
165
°C
10
°C
7.6 Dissipation Ratings
θJA
θJC
TA < 40°C
POWER RATING
DERATING FACTOR
ABOVE TA = 40°C
46.87°C/W
2.5°C/W
1.81 W
0.021 W/°C
PACKAGE
RHL
(1)
(1)
This data is based on using the JEDEC High-K board, and the exposed die pad is connected to a copper pad on the board. This is
connected to the ground plane by a 2x3 via matrix.
7.7 Typical Characteristics
100
100
VI = 9 V
90
90
VI = 5 V
Efficiency - %
Efficiency - %
VI = 16 V
80
VI = 16 V
70
V(BAT) = 4.2 V
1-Cell
60
70
V(BAT) = 8.4 V
2-Cell
60
50
50
0
0.5
1
1.5
I(BAT) - Charge Current - A
Figure 1. Efficiency vs Charge Current
10
80
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0
0.5
1
1.5
2
I(BAT) - Charge Current - A
Figure 2. Efficiency vs Charge Current
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8 Detailed Description
8.1 Overview
The bqSWITCHER™ supports a precision Li-ion or Li-polymer charging system for single cell or two cell
applications. The device has a battery detect scheme that allows it to automatically detect the presence and
absence of a battery. When the battery is detected, charging begins in one of three phases (depending upon
battery voltage): precharge, constant current (fast-charge current regulation), and constant voltage (fast-charge
voltage regulation). The device will terminate charging when the termination current threshold has been reached
and will begin a recharge cycle when the battery voltage has dropped below the recharge threshold (VRCG).
Precharge, constant current, and termination current can be configured through the ISET1 and ISET2 pins,
allowing for flexibility in battery charging profile. During charging, the integrated fault monitors of the device, such
as battery short detection (VSHORT), thermal shutdown (internal TSHTDWN and TS pin), and safety timer expiration
(TTC pin), ensure battery safety.
bqSWITCHER™ has three status pins (STAT1, STAT2, and PG) to indicate the charging status and input
voltage (AC adapter) status. These pins can be used to drive LEDs or communicate with a host processor.
Precharge
Phase
Voltage Regulation and
Charge Termination Phase
Current Regulation Phase
Regulation Voltage
Regulation Current
Charge Voltage
VLOW
VSHORT
Charge Current
Precharge
and Termination
ISHORT
UDG-04037
Programmable
Safety Timer
Precharge
Timer
Figure 3. Typical Charging Profile
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8.2 Functional Block Diagram
Protection PMOS FET is OFF when not charging
or in SLEEP to prevent discharge of battery
when IN < BAT
Rsns
IN
OUT
VIN
Sense FET
IN
Poff VCC PG
CHARGE
SLEEP
10
Synch
V(150 mA)
VCC-6V
PGND
VCC
Sense FET
Vuvlo UVLO/POR
POR
Icntrl
6V
VTSB
VTSB
Co
10 F
Temp
VCC
TG
VCC-6V
V(3.6A)
2.1V
+
Pack-
PGND
VCC
PkILim
Voltage
Reference
Pack+
H
OUT
Isynch
BG
TG
Lo
I
VCC/10
RAMP
(Vpp=VCC/10)
Gate
Drive
to FB
FB
SPIN
ONLY
BG
SYNCH
VCC-6V
MOD
OSC
Q S
MOD
Q R
VCC
OVP
RAMP
PkILim or OVP
TIMEOUT FAULT
SUSPEND
TERM
UVLO/POR
SNS
VCC
+
-
Ibat Reg
+
-
∗
TIMEOUT
COMPENSATION
1k
PG
SUSPEND
SLEEP
+
-
VCC
+
CLAMP
BAT
VCC
VCC
UVLO/
POR
1V
50 mV
VTSB
CE
CE
BAT
Vbat Reg
+
2.1V
Vrch
CONTROL
LOGIC
(STATE
MACHINE)
20uA
20uA
Term_Det
SNS+
VCC
LowV
TERM
SLEEP
SUSPEND
FB
1C
1V
VSHORT
DISCHARGE
Wake
PkILim
CELLS (bq24103/04/13)
FB (bq24105/15)
N/C (bq24100)
VTSB
2C
Vreg
+
-
ISET1
FASTCHG
Disable
WAKE
VCC
FB
SPIN
BAT
BAT_PRS_
disch
CHARGE
VCC
BAT
Charge
RSET1
PRE-CHARGE
STAT1
SYNCH
Charge
STAT2
0.1V
Discharge
SLEEP
SNS
+
1k
-
Vovp
OVP
BAT
OVP
2.1V
TERM
VCC
0.25V
Vrch 30ms
Dgltch
DSABL_TERM
1V
TTC
TIMER CLK
Term &
Timer
Disable
0.75V
TIMER
FF CHAIN
0.5V
PRE-CHG
TIMEOUT
VSS
bqSWITCHER
RESET
FAST CHG
TIMEOUT
LowV 30ms
Dgltch
BAT_PRS_dischg
VSHORT
BAT
+
-
ISET2
PRE-CHG
Disable
RSET2
+
-
FASTCHG
Disable
VTSB
0.1V
30ms
dgltch
Term_Det
VTSB
TS
LTF
SUSPEND
TS
SPIN
TEMP
SUSPEND
HTF
TCO
bq2410x
∗Patent Pending #36889
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8.3 Feature Description
8.3.1 PWM Controller
The bq241xx provides an integrated fixed 1-MHz frequency voltage-mode controller with Feed-Forward function
to regulate charge current or voltage. This type of controller is used to help improve line transient response,
thereby simplifying the compensation network used for both continuous and discontinuous current conduction
operation. The voltage and current loops are internally compensated using a Type-III compensation scheme that
provides enough phase boost for stable operation, allowing the use of small ceramic capacitors with very low
ESR. There is a 0.5 V offset on the bottom of the PWM ramp to allow the device to operate between 0% to 100%
duty cycle.
The internal PWM gate drive can directly control the internal PMOS and NMOS power MOSFETs. The high-side
gate voltage swings from VCC (when off), to VCC-6 (when on and VCC is greater than 6 V) to help reduce the
conduction losses of the converter by enhancing the gate an extra volt beyond the standard 5 V. The low-side
gate voltage swings from 6 V, to turn on the NMOS, down to PGND to turn it off. The bq241xx has two back to
back common-drain P-MOSFETs on the high side. An input P-MOSFET prevents battery discharge when IN is
lower than BAT. The second P-MOSFET behaves as the switching control FET, eliminating the need of a
bootstrap capacitor.
Cycle-by-cycle current limit is sensed through the internal high-side sense FET. The threshold is set to a nominal
3.6 A peak current. The low-side FET also has a current limit that decides if the PWM Controller will operate in
synchronous or non-synchronous mode. This threshold is set to 100 mA and it turns off the low-side NMOS
before the current reverses, preventing the battery from discharging. Synchronous operation is used when the
current of the low-side FET is greater than 100 mA to minimize power losses.
8.3.2 Temperature Qualification
The bqSWITCHER™ continuously monitors battery temperature by measuring the voltage between the TS pin
and VSS pin. A negative temperature coefficient thermistor (NTC) and an external voltage divider typically
develop this voltage. The bqSWITCHER™ compares this voltage against its internal thresholds to determine if
charging is allowed. To initiate a charge cycle, the battery temperature must be within the V(LTF)-to-V(HTF)
thresholds. If battery temperature is outside of this range, the bqSWITCHER™ suspends charge and waits until
the battery temperature is within the V(LTF)-to-V(HTF) range. During the charge cycle (both precharge and fast
charge), the battery temperature must be within the V(LTF)-to-V(TCO) thresholds. If battery temperature is outside of
this range, the bqSWITCHER™ suspends charge and waits until the battery temperature is within the V(LTF)-toV(HTF) range. The bqSWITCHER™ suspends charge by turning off the PWM and holding the timer value (that is,
timers are not reset during a suspend condition). Note that the bias for the external resistor divider is provided
from the VTSB output. Applying a constant voltage between the V(LTF)-to-V(HTF) thresholds to the TS pin disables
the temperature-sensing feature.
VO(VTSB) ´ RTHCOLD ´ RTHHOT ´
1 - 1
VLTF
VHTF
RT2 =
RTHHOT ´
(
VO(VTSB)
-1
VHTF
VO(VTSB)
-1
VLTF
RT1 =
1 +
1
RT2 RTHCOLD
)
- RTHCOLD ´
(
VO(VTSB)
-1
VLTF
)
Where:
VLTF = VO(VTSB) ´ % LTF¸100 / 100
VHTF = VO(VTSB) ´ % HTF¸100 / 100
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(1)
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Feature Description (continued)
VCC
Charge Suspend
Charge Suspend
V(LTF)
Temperature Range
to Initiate Charge
V(HTF)
V(TCO)
Charge Suspend
Temperature Range
During Charge Cycle
Charge Suspend
VSS
Figure 4. TS Pin Thresholds
8.3.3 Battery Preconditioning (Precharge)
On power up, if the battery voltage is below the VLOWV threshold, the bqSWITCHER™ applies a precharge
current, IPRECHG, to the battery. This feature revives deeply discharged cells. The bqSWITCHER™ activates a
safety timer, tPRECHG, during the conditioning phase. If the VLOWV threshold is not reached within the timer period,
the bqSWITCHER™ turns off the charger and enunciates FAULT on the STATx pins. In the case of a FAULT
condition, the bqSWITCHER™ reduces the current to IDETECT. IDETECT is used to detect a battery replacement
condition. Fault condition is cleared by POR or battery replacement.
The magnitude of the precharge current, IO(PRECHG), is determined by the value of programming resistor, R(ISET2),
connected to the ISET2 pin.
K (ISET2) V (ISET2)
I O(PRECHG) +
R(ISET2) R(SNS)
ǒ
Ǔ
where
•
•
•
•
RSNS is the external current-sense resistor
V(ISET2) is the output voltage of the ISET2 pin
K(ISET2) is the V/A gain factor
V(ISET2) and K(ISET2) are specified in the Electrical Characteristics table.
(2)
8.3.4 Battery Charge Current
The battery charge current, IO(CHARGE), is established by setting the external sense resistor, R(SNS), and the
resistor, R(ISET1), connected to the ISET1 pin.
In order to set the current, first choose R(SNS) based on the regulation threshold VIREG across this resistor. The
best accuracy is achieved when the VIREG is between 100mV and 200mV.
V IREG
R (SNS) +
I OCHARGE
(3)
If the results is not a standard sense resistor value, choose the next larger value. Using the selected standard
value, solve for VIREG. Once the sense resistor is selected, the ISET1 resistor can be calculated using the
following equation:
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Feature Description (continued)
R ISET1 +
K ISET1
RSNS
V ISET1
I CHARGE
(4)
8.3.5 Battery Voltage Regulation
The voltage regulation feedback occurs through the BAT pin. This input is tied directly to the positive side of the
battery pack. The bqSWITCHER™ monitors the battery-pack voltage between the BAT and VSS pins. The
bqSWITCHER™ is offered in a fixed single-cell voltage version (4.2 V) and as a one-cell or two-cell version
selected by the CELLS input. A low or floating input on the CELLS selects single-cell mode (4.2 V) while a highinput through a resistor selects two-cell mode (8.4 V).
For the bq24105 and bq24115, the output regulation voltage is specified as:
(R1 + R2)
VOREG =
x VIBAT
R2
(5)
where R1 and R2 are resistor divider from BAT to FB and FB to VSS, respectively.
The bq24105 and bq24115 recharge threshold voltage is specified as:
(R1 + R2)
VRCH =
x 50 mV
R2
(6)
8.3.6 Charge Termination and Recharge
The bqSWITCHER™ monitors the charging current during the voltage regulation phase. Once the termination
threshold, ITERM, is detected, the bqSWITCHER™ terminates charge. The termination current level is selected by
the value of programming resistor, R(ISET2), connected to the ISET2 pin.
K (ISET2) V TERM
I TERM +
R(ISET2) R(SNS)
ǒ
Ǔ
where
•
•
•
•
R(SNS) is the external current-sense resistor
VTERM is the output of the ISET2 pin
K(ISET2) is the A/V gain factor
VTERM and K(ISET2) are specified in the Electrical Characteristics table
(7)
As a safety backup, the bqSWITCHER™ also provides a programmable charge timer. The charge time is
programmed by the value of a capacitor connected between the TTC pin and GND by the following formula:
t CHARGE + C(TTC) K(TTC)
where
•
•
A
•
•
•
•
C(TTC) is the capacitor connected to the TTC pin
K(TTC) is the multiplier
(8)
new charge cycle is initiated when one of the following conditions is detected:
The battery voltage falls below the VRCH threshold.
Power-on reset (POR), if battery voltage is below the VRCH threshold
CE toggle
TTC pin, described as follows.
To disable the charge termination and safety timer, the user can pull the TTC input below the VTTC_EN threshold.
Going above this threshold enables the termination and safety timer features and also resets the timer. Tying
TTC high disables the safety timer only.
8.3.7 Sleep Mode
The bqSWITCHER™ enters the low-power sleep mode if the VCC pin is removed from the circuit. This feature
prevents draining the battery during the absence of VCC.
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Feature Description (continued)
8.3.8 Charge Status Outputs
The open-drain STAT1 and STAT2 outputs indicate various charger operations as shown in Table 1. These
status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates that the
open-drain transistor is turned off.
Table 1. Status Pins Summary
Charge State
STAT1
STAT2
Charge-in-progress
ON
OFF
Charge complete
OFF
ON
Charge suspend, timer fault, overvoltage, sleep mode, battery absent
OFF
OFF
Table 2. Status Pins Summary (bq24104, bq24108 and bq24109 Only)
STAT1
STAT2
Battery absent
Charge State
OFF
OFF
Charge-in-progress
ON
OFF
Charge complete
OFF
ON
Battery over discharge, VI(BAT) < V(SC)
ON/OFF (0.5 Hz)
OFF
Charge suspend (due to TS pin and internal thermal protection)
ON/OFF (0.5 Hz)
OFF
Precharge timer fault
ON/OFF (0.5 Hz)
OFF
Fast charge timer fault
ON/OFF (0.5 Hz)
OFF
OFF
OFF
Sleep mode
8.3.9 PG Output
The open-drain PG (power good) indicates when the AC-to-DC adapter (that is, VCC) is present. The output turns
on when sleep-mode exit threshold, VSLP-EXIT, is detected. This output is turned off in the sleep mode. The PG pin
can be used to drive an LED or communicate to the host processor.
8.3.10 CE Input (Charge Enable)
The CE digital input is used to disable or enable the charge process. A low-level signal on this pin enables the
charge and a high-level VCC signal disables the charge. A high-to-low transition on this pin also resets all timers
and fault conditions. Note that the CE pin cannot be pulled up to VTSB voltage. This may create power-up
issues.
8.3.11 Timer Fault Recovery
As shown in Figure 4, bqSWITCHER™ provides a recovery method to deal with timer fault conditions. The
following summarizes this method.
Condition 1 VI(BAT) above recharge threshold (VOREG - VRCH) and timeout fault occurs.
Recovery method: bqSWITCHER™ waits for the battery voltage to fall below the recharge threshold. This could
happen as a result of a load on the battery, self-discharge or battery removal. Once the battery falls below the
recharge threshold, the bqSWITCHER™ clears the fault and enters the battery absent detection routine. A POR
or CE toggle also clears the fault.
Condition 2 Charge voltage below recharge threshold (VOREG – VRCH) and timeout fault occurs
Recovery method: In this scenario, the bqSWITCHER™ applies the IDETECT current. This small current is used to
detect a battery removal condition and remains on as long as the battery voltage stays below the recharge
threshold. If the battery voltage goes above the recharge threshold, then the bqSWITCHER™ disables the
IDETECT current and executes the recovery method described in Condition 1. Once the battery falls below the
recharge threshold, the bqSWITCHER™ clears the fault and enters the battery absent detection routine. A POR
or CE toggle also clears the fault.
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8.3.12 Output Overvoltage Protection (Applies to All Versions)
The bqSWITCHER™ provides a built-in overvoltage protection to protect the device and other components
against damages if the battery voltage gets too high, as when the battery is suddenly removed. When an
overvoltage condition is detected, this feature turns off the PWM and STATx pins. The fault is cleared once VIBAT
drops to the recharge threshold (VOREG – VRCH).
8.3.13 Functional Description For System-Controlled Version (bq2411x)
For applications requiring charge management under the host system control, the bqSWITCHER™ (bq2411x)
offers a number of control functions. The following section describes these functions.
8.3.14 Precharge and Fast-Charge Control
A low-level signal on the CMODE pin forces the bqSWITCHER™ to charge at the precharge rate set on the
ISET2 pin. A high-level signal forces charge at fast-charge rate as set by the ISET1 pin. If the battery reaches
the voltage regulation level, VOREG, the bqSWITCHER™ transitions to voltage regulation phase regardless of the
status of the CMODE input.
8.3.15 Charge Termination and Safety Timers
The charge timers and termination are disabled in the system-controlled versions of the bqSWITCHER™. The
host system can use the CE input to enable or disable charge. When an overvoltage condition is detected, the
charger process stops, and all power FETs are turned off.
8.3.16 Battery Detection
For applications with removable battery packs, bqSWITCHER™ provides a battery absent detection scheme to
reliably detect insertion and/or removal of battery packs.
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POR or VRCH
Detection routine runs on power up
and if VBAT drops below refresh
threshold due to removing battery
or discharging battery.
Yes
Enable
I(DETECT)
for t(DETECT)
VI(BAT)
VO(REG)
-VRCH
Yes
BATTERY
ABSENT
Figure 5. Battery Absent Detection for bq2410x ICs only
The voltage at the BAT pin is held above the battery recharge threshold, VOREG – VRCH, by the charged battery
following fast charging. When the voltage at the BAT pin falls to the recharge threshold, either by a load on the
battery or due to battery removal, the bqSWITCHER™ begins a battery absent detection test. This test involves
enabling a detection current, IDISCHARGE1, for a period of tDISCHARGE1 and checking to see if the battery voltage is
below the short circuit threshold, VSHORT. Following this, the wake current, IWAKE is applied for a period of tWAKE
and the battery voltage is checked again to ensure that it is above the recharge threshold. The purpose of this
current is to attempt to close an open battery pack protector, if one is connected to the bqSWITCHER™.
Passing both of the discharge and charge tests indicates a battery absent fault at the STAT pins. Failure of either
test starts a new charge cycle. For the absent battery condition, typically the voltage on the BAT pin rises and
falls between 0V and VOVPthresholds indefinitely.
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VBAT
Battery
Connected
VOREG
No
Battery
Detected
2V/cell
No
Battery
Detected
Yes
Battery
Detected
IWAKE
IBAT
- IDISCHRG1
t DISCHRG1
tWAKE
t DISCHRG1
Figure 6. Battery Detect Timing Diagram
8.3.16.1 Battery Detection Example
In order to detect a no battery condition during the discharge and wake tests, the maximum output capacitance
should not exceed the following:
a. Discharge (IDISCHRG1 = 400 μA, tDISCHRG1 = 1s, VSHORT = 2V)
I
´t
CMAX _ DIS = DISCHRG1 DISCHRG1
VOREG - VSHORT
CMAX _ DIS =
400 mA ´ 1 s
4.2 V - 2 V
CMAX _ DIS = 182 mF
(9)
b. Wake (IWAKE = 2 mA, tWAKE = 0.5 s, VOREG – VRCH = 4.1V)
IWAKE ´ t WAKE
CMAX _ WAKE =
(VOREG - VRCH ) - 0 V
CMAX _ WAKE =
2 mA ´ 0.5 s
(4.2 V - 0.1 V ) - 0 V
CMAX _ WAKE = 244 mF
(10)
Based on these calculations the recommended maximum output capacitance to ensure proper operation of the
battery detection scheme is 100 μF which will allow for process and temperature variations.
Figure 7 shows the battery detection scheme when a battery is inserted. Channel 3 is the output signal and
Channel 4 is the output current. The output signal switches between VOREG and GND until a battery is inserted.
Once the battery is detected, the output current increases from 0 A to 1.3 A, which is the programmed charge
current for this application.
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Figure 7. Battery Detection Waveform When a Battery is Inserted
Figure 8 shows the battery detection scheme when a battery is removed. Channel 3 is the output signal and
Channel 4 is the output current. When the battery is removed, the output signal goes up due to the stored energy
in the inductor and it crosses the VOREG – VRCH threshold. At this point the output current goes to 0 A and the IC
terminates the charge process and turns on the IDISCHG2 for tDISCHG2. This causes the output voltage to fall down
below the VOREG – VRCHG threshold triggering a Battery Absent condition and starting the battery detection
scheme.
Figure 8. Battery Detection Waveform When a Battery is Removed
8.3.17 Current Sense Amplifier
BQ241xx family offers a current sense amplifier feature that translates the charge current into a DC voltage.
Figure 9 is a block diagram of this feature.
20
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Product Folder Links: bq24100 bq24103 bq24103A bq24104 bq24105 bq24108 bq24109 bq24113 bq24113A
bq24115
bq24100, bq24103, bq24103A, bq24104, bq24105
bq24108, bq24109, bq24113, bq24113A, bq24115
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SLUS606P – JUNE 2004 – REVISED NOVEMBER 2015
OUT
ICHARGE
SNS
RSNS
+
KISET2
BAT
+
-
+
FASTCHG
Disable
ISET2
RISET2
Figure 9. Current Sense Amplifier
The voltage on the ISET2 pin can be used to calculate the charge current. Equation 11 shows the relationship
between the ISET2 voltage and the charge current:
VISET2 K(ISET2)
I CHARGE +
R SNS R ISET2
(11)
This feature can be used to monitor the charge current (see Figure 10) during the current regulation phase
(Fastcharge only) and the voltage regulation phase. The schematic for the application circuit for this waveform is
shown in Figure 13.
CH3 = Inductor Current
CH3
500 mA/div
CH1 = ISET2
CH3
0A
CH1
200 mV/div
CH2 = OUT
CH1
0V
CH2
16 V
CH2
10 V/div
t = Time = 200 ms/div
Figure 10. Current Sense Amplifier Charge Current Waveform
Copyright © 2004–2015, Texas Instruments Incorporated
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Product Folder Links: bq24100 bq24103 bq24103A bq24104 bq24105 bq24108 bq24109 bq24113 bq24113A
bq24115
21
bq24100, bq24103, bq24103A, bq24104, bq24105
bq24108, bq24109, bq24113, bq24113A, bq24115
SLUS606P – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
8.4 Device Functional Modes
Figure 11 shows the operational flow chart for a stand-alone charge operation.
POR
Check for Battery
Presence
Battery
Detect?
No
Indicate BATTERY
ABSENT
Yes
Suspend Charge
TS Pin
in LTF to HTF
Range?
No
Indicate CHARGE
SUSPEND
Yes
VBAT
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