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BQ24230RGTRG4

BQ24230RGTRG4

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    VFQFN16_EP

  • 描述:

    Charger IC Lithium-Ion 16-QFN (3x3)

  • 数据手册
  • 价格&库存
BQ24230RGTRG4 数据手册
Product Folder Order Now Support & Community Tools & Software Technical Documents bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 bq2423x USB-Friendly Lithium-Ion Battery Charger And Power-Path Management IC • • • • • • • • • • • Fully Compliant USB Charger – Selectable 100-mA and 500-mA Maximum Input Current – 100-mA Maximum Current Limit Ensures Compliance to USB-IF Standard – Input-based Dynamic Power Management (VIN- DPM) for Protection Against Poor USB Sources 28-V Input Rating With Overvoltage Protection Integrated Dynamic Power-Path Management (DPPM) Function Simultaneously and Independently Powers the System and Charges the Battery Supports up to 500-mA Charge Current With Current Monitoring Output (ISET) Programmable Input Current Limit up to 500 mA for Wall Adapters Programmable Termination Current (bq24232) Programmable Precharge and Fast-Charge Safety Timers Reverse Current, Short-Circuit, and Thermal Protection NTC Thermistor Input Proprietary Start-Up Sequence Limits Inrush Current Status Indication – Charging/Done, Power Good Small 3 mm × 3 mm 16-Lead QFN Package The battery is charged in three phases: conditioning, constant current, and constant voltage. In all charge phases, an internal control loop monitors the IC junction temperature and reduces the charge current if the internal temperature threshold is exceeded. The charger power stage and charge current sense functions are fully integrated. The charger function has high-accuracy current and voltage regulation loops, charge status display, and charge termination. The input current limit and charge current are programmable using external resistors. Device Information(1) PART NUMBER PACKAGE bq24230 2 Applications • • Bluetooth™ Devices Low-Power Handheld Devices 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Typical Application Circuit 1 kΩ 3 Description 9 CHG IN 7 Adaptor PGOOD 1 kΩ 13 DC SYSTEM OUT 10 11 1mF GND 4.7mF 8 VSS 15 TD bq24230 EN2 5 BAT 2 3 TS 1 4.7mF CE TMR EN1 ILIM 4 6 12 PACK+ 14 The bq2423x series of devices are highly integrated Li-ion linear chargers and system power-path management devices targeted at space-limited portable applications. The devices operate from either a USB port or ac adapter and support charge currents between 25 mA and 500 mA. The high-inputvoltage range with input overvoltage protection supports low-cost, unregulated adapters. The USB input current limit accuracy and start-up sequence allow the bq2423x to meet USB-IF inrush current specification. Additionally, the input dynamic power management (VIN-DPM) prevents the charger from crashing poorly designed or incorrectly configured USB sources. BODY SIZE (NOM) VQFN (16) bq24232 ISET • 1 The bq2423x features dynamic power-path management (DPPM) that powers the system while simultaneously and independently charging the battery. The DPPM circuit reduces the charge current when the input current limit causes the system output to fall to the DPPM threshold, thus supplying the system load at all times while monitoring the charge current separately. This feature reduces the number of charge and discharge cycles on the battery, allows for proper charge termination, and enables the system to run with a defective or absent battery pack. Additionally, this enables instant system turn-on even with a totally discharged battery. The power-path management architecture also permits the battery to supplement the system current requirements when the adapter cannot deliver the peak system currents, enabling the use of a smaller adapter. TEMP 16 1 Features 2.94 kΩ 4.32 kΩ PACK- 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 7.1 7.2 7.3 7.4 7.5 7.6 7.7 8 1 1 1 2 5 5 7 Absolute Maximum Ratings ...................................... 7 ESD Ratings.............................................................. 7 Recommended Operating Conditions....................... 7 Thermal Information ................................................. 8 Electrical Characteristics........................................... 8 Timing Requirements .............................................. 11 Typical Characteristics ............................................ 12 Detailed Description ............................................ 14 8.1 8.2 8.3 8.4 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ 14 15 16 22 9 Application and Implementation ........................ 29 9.1 Application Information............................................ 29 9.2 Typical Applications ................................................ 29 10 Power Supply Recommendations ..................... 35 10.1 Requirements for OUT Output .............................. 35 10.2 USB Sources and Standard AC Adapters ............ 35 10.3 Half-Wave Adapters .............................................. 35 11 Layout................................................................... 35 11.1 Layout Guidelines ................................................. 35 11.2 Layout Example .................................................... 36 11.3 Thermal Package .................................................. 36 12 Device and Documentation Support ................. 37 12.1 12.2 12.3 12.4 12.5 Documentation Support ........................................ Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 37 37 37 37 37 13 Mechanical, Packaging, and Orderable Information ........................................................... 37 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision I (November 2015) to Revision J • Page Changed from "Table 2" to "Table 1" in the Pin Functions Description column for pins EN2/EN1........................................ 5 Changes from Revision H (June 2015) to Revision I Page • Changed the Pin Functions ISET pin description resistor value from 3-kΩ to 1.8-kΩ, to match the value in the Recommended Operating Conditions table. .......................................................................................................................... 6 • Changed KTMR MIN TYP MAX values FROM "30, 40, 50" TO "36, 48, 60" s/kΩ, respectively, in the Timing Requirements table............................................................................................................................................................... 11 • Changed textual content of Input Voltage Dynamic Power Management, (VIN_DPM) section for clarification. ...................... 18 • Changed textual content of Dynamic Power Path Management (DPPM) section for clarification. ..................................... 18 • Changed textual content of Battery Supplement Mode section for clarification ................................................................... 18 • Changed textual content of Battery Pack Temperature Monitoring section for clarification................................................. 21 • Added Modifying / Extending the Allowable Temperature Range for Charging sub-section heading and text for clarification............................................................................................................................................................................ 21 • Changed "6.25-hour" TO " 7.5-hour" Fast Charge Safety Timer in the Using The bq24232 In A Stand-Alone Charger Application section................................................................................................................................................................ 29 Changes from Revision G (March 2015) to Revision H Page • Changed CE pin Description in the Pin Functions table from "Connect CE to a high logic level to place the battery charger in standby mode...." to "Connect CE to a high logic level to disable battery charging". ........................................... 5 • Changed the ILIM pin Description From: "Connect a 2.75-kΩ to 8.4-kΩ resistor...." To: "Connect a 3.1-kΩ to 7.8-kΩ resistor..."................................................................................................................................................................................ 5 • Changed "IPRECHG Precharge current" spec to "KIPRECHG Precharge current factor" in the Electrical Characteristics table. 10 • Moved timing specifications from Electrical Characteristics table to Timing Requirements table ....................................... 11 • Changed Requirements for OUT Output section text from "> VBATUVLO" to "around 2.2 V". .......................................... 35 2 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 Changes from Revision F (November 2014) to Revision G Page • Added text to ILIM pin description for clarification.................................................................................................................. 5 • Moved Tstg spec to Absolute Maximum Ratings table and changed Handling Ragtings table title to ESD Ratings ............. 7 • Deleted text string from second paragraph of Power On description for clarification ......................................................... 16 Changes from Revision E (January 2014) to Revision F Page • Added Device Information and Handling Rating tables, Feature Description section, Device Functional Modes, Programming section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ................................................................................................................................................................................... 1 • Changed VRCH spec MIN, TYP, MAX terminology from VO(REG) to VBAT(REG) ....................................................................... 10 • Added "Reset the timers by toggling CE pin." in the Dynamic Charge timers (TMR) Input description. ............................. 25 Changes from Revision D (December 2013) to Revision E • Page Added TJ= 85°C to conditions statement for IBAT(PDWN) specification...................................................................................... 8 Changes from Revision C (July 2010) to Revision D Page • Changed the ILIM pin Description From: "Connect a 3.1-kΩ to 7.8-kΩ resistor..." To: "Connect a 2.75-kΩ to 8.4-kΩ resistor..."................................................................................................................................................................................ 5 • Changed POWER PATH IIN max Test Condition From: RILIM = 3.1 kΩ to 7.8 kΩ To: RILIM = 2.75 kΩ to 8.4 kΩ .................. 9 • Changed UNITS from "ms" to "V" for VLOWV specification in Electrical Characteristics table............................................... 10 • Changed text following Equation 1 From: The valid resistor range is 3.2 kΩ to 8 kΩ To: The valid resistor range is 2.75 kΩ to 8.4 kΩ ................................................................................................................................................................. 18 • Changed the Program the Input Current Limit (ILIM) section: KILIM = 1470 AΩ To: KILIM = 1530 AΩ.................................. 31 • Changed the Program the Input Current Limit (ILIM) section: RISET = 1470 AΩ / 0.5 A = 2.94 kΩ To: RISET = 1530 AΩ / 0.5 A = 3.06 kΩ ............................................................................................................................................................ 31 • Changed Program the Input Current Limit (ILIM) text From: Select the closest standard value, which for this case is 2.94 kΩ To: Select the closest standard value, which for this case is 3.06 kΩ ................................................................... 31 Changes from Revision B (March 2009) to Revision C Page • Changed globally RT1 and RT2 to Rs and Rp..................................................................................................................... 21 • Added Equation 2 and Equation 3, term explanations and resistance table........................................................................ 21 Changes from Revision A (December 2008) to Revision B Page • Changed Absolute Maximum Ratings IO, OUT From: 600 mA To: 1700 mA......................................................................... 7 • Changed Absolute Maximum Ratings IO, BAT (Discharge mode) From: 600 mA To: 1700 mA............................................ 7 • Changed Recommended Operating Conditions IBAT From 500 MA To: 1500 mA ................................................................. 7 • Changed Recommended Operating Conditions ICHG From 500 MA To: 1500 mA................................................................. 7 • Added POWER PATH KILIM Test Conditions: ILIM = 200 mA to 500 mA................................................................................. 9 • Changed the POWER PATH KILIM Values From: MIN =1320 TYP = 1470 MAX = 1620 To: MIN = 1380 TYP = 1530 MAX =1680............................................................................................................................................................................. 9 • Changed BATTERY CHARGER VBAT(REG) MAX value From: 4.24 To: 4.23 ........................................................................ 10 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 3 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com Changes from Original (October 2008) to Revision A • 4 Page Changed the second paragraph of the DESCRIPTION ......................................................................................................... 1 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 5 Device Comparison Table PART NUMBER (1) VOVP VOUT(REG) VDPM OPTIONAL FUNCTION MARKING bq24230 6.6 V 4.4 V VO(REG) – 100 mV TD CGN bq24232 10.5 V 4.4 V VO(REG) – 100 mV ITERM NXK (1) This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. 6 Pin Configuration and Functions 11 10 4 9 6 7 EN2 EN1 PGOOD 5 8 1 BAT 2 BAT 3 CE 4 ISET ITERM TMR IN 13 bq24232 5 6 7 8 VSS bq24230 3 TS 14 PGOOD 2 ILIM OUT OUT CHG VSS TS BAT BAT CE 16 15 EN1 16 15 14 13 1 12 EN2 ISET TD TMR IN 16-Pin RGT Package with Thermal Pad (Top View) 12 ILIM 11 OUT 10 OUT 9 CHG Pin Functions PIN I/O DESCRIPTION 1 I External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors a 10kΩ NTC thermistor. For applications that do not utilize the TS function, connect a 10-kΩ fixed resistor from TS to VSS to maintain a valid voltage level on TS. 2,3 2, 3 I/O CE 4 4 I EN2 5 5 I EN1 6 6 I PGOOD 7 7 O Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is detected. PGOOD is high-impedance when the input power is not within specified limits. Connect PGOOD to the desired logic voltage rail using a 1-kΩ – 100-kΩ resistor, or use with an LED for visual indication. VSS 8 8 – Ground. Connect to the thermal pad and to the ground rail of the circuit. CHG 9 9 O Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high impedance when charging is complete and when charger is disabled. OUT 10,11 10, 11 O System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and above the regulation voltage. When the input is out of the operation range, OUT is connected to VBAT. Connect OUT to the system load. Bypass OUT to VSS with a 4.7-μF to 47-μF ceramic capacitor. ILIM 12 12 I Adjustable Current Limit Programming Input. Connect a 3.1-kΩ to 7.8-kΩ resistor from ILIM to VSS to program the maximum input current (EN2=1, EN1=0). The input current includes the system load and the battery charge current. Leaving ILIM unconnected disables all charging. In USB100/500 mode (EN2 = 0, EN1= 0/1), ILIM can be left floating. NAME NUMBER bq24230 bq24232 1 BAT TS Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the battery. Bypass BAT to VSS with a 4.7-μF to 47-μF ceramic capacitor. Charge Enable Active-Low Input. Connect CE to a high logic level to disable battery charging. OUT is active and battery supplement mode is still available. Connect CE to a low logic level to enable the battery charger. CE is internally pulled down with ~285 kΩ. Do not leave CE unconnected to ensure proper operation. Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable USB compliance. See Table 1 for the description of the operation states. EN1 and EN2 are internally pulled down with ~285 kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation. Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 5 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com Pin Functions (continued) PIN NAME NUMBER I/O DESCRIPTION bq24230 bq24232 IN 13 13 I Input Power Connection. Connect IN to the connected to external DC supply (AC adapter or USB port). The input operating range is 4.35 V to 6.6 V. The input can accept voltages up to 26 V without damage but operation is suspended. Connect bypass capacitor 1 μF to 10 μF to VSS. TMR 14 14 I Timer Programming Input. TMR controls the precharge and fast-charge safety timers. Connect TMR to VSS to disable all safety timers. Connect a 18-kΩ to 72-kΩ resistor between TMR and VSS to program the timers a desired length. Leave TMR unconnected to set the timers to the 5-hour fast charge and 30-minute precharge default timer values. TD 15 - I Termination Dsable Input. Connect TD high to disable charger termination. Connect TD to VSS to enable charger termination. TD is checked during start-up only and cannot be changed during operation. See the TD section in this data sheet for a description of the behavior when termination is disabled. TD is internally pulled down to VSS with ~285 kΩ. Do not leave TD unconnected to ensure proper operation. - 15 I Termination Current Programming Input. Connect a 0-Ω to 15-kΩ resistor from ITERM to VSS to program the termination current. Leave ITERM unconnected to set the termination current to the internal default 10% threshold. 16 16 I/O Fast-Charge Current Programming Input. Connect a 1.8-kΩ to 36-kΩ resistor from ISET to VSS to program the fast-charge current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at ISET reflects the actual charging current and can be used to monitor charge current. See the Charge Current Translator section for more details. ITERM ISET Thermal Pad – An internal electrical connection exists between the exposed thermal pad and the VSS pin of the device. The thermal pad must be connected to the same potential as the VSS pin on the printed-circuit board. Do not use the thermal pad as the primary ground input for the device. The VSS pin must be connected to ground at all times. Table 1. EN1/EN2 Settings 6 EN2 EN1 0 0 Maximum Input Current Into IN Pin 100 mA. USB100 mode 0 1 500 mA. USB500 mode 1 0 Set by an external resistor from ILIM to VSS 1 1 Standby (USB suspend mode) Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) VI Input voltage II Input current IO Output current (continuous) Output sink current (1) MIN MAX IN (with respect to VSS –0.3 28 OUT (with respect to VSS) –0.3 7 BAT (with respect to VSS) –0.3 5 EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, TMR, TD, ITERM (with respect to VSS) –0.3 7 V IN 600 OUT 1700 BAT (Discharge mode) 1700 CHG, PGOOD mA mA 15 mA TJ Junction temperature –40 150 Tstg Storage temperature –65 150 (1) UNIT °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted. 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±1000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±250 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX 4.35 26 V bq24230 4.35 6.4 V bq24232 4.35 10.2 IN voltage range VI IN operating voltage range UNIT IIN Input current, IN pin 500 mA IOUT Current, OUT pin 1500 mA IBAT Current, BAT pin (discharging) 1500 mA ICHG Current, BAT pin (charging) 500 mA TJ Junction temperature –40 125 °C RILIM Maximum input current programming resistor 3.1 7.8 kΩ RISET Fast-charge current programming resistor 1.8 36 kΩ RTMR Timer programming resistor 18 72 kΩ RITERM Termination programming resistor 0 15 kΩ bq24232 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 7 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com 7.4 Thermal Information bq24230 THERMAL METRIC (1) bq24232 RGT RGT 16 PINS 16 PINS UNIT RθJA Junction-to-ambient thermal resistance 44.5 44.5 °C/W RθJC(top) Junction-to-case (top) thermal resistance 54.2 54.2 °C/W RθJB Junction-to-board thermal resistance 17.2 17.2 °C/W ψJT Junction-to-top characterization parameter 1.0 1.0 °C/W ψJB Junction-to-board characterization parameter 17.1 17.1 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 3.8 3.8 °C/W (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 7.5 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP 3.3 MAX UNIT INPUT UVLO Undervoltage lockout VIN: 0 V → 4 V 3.2 Vhys(UVLO) Hysteresis on UVLO VIN: 4 V → 0 V 200 VIN(DT) Input power detection threshold Input power detected when VIN > VBAT + VIN(DT) VBAT = 3.6 V, VIN: 3.5 V → 4 V Vhys(INDT) Hysteresis on VIN(DT) VBAT = 3.6 V, VIN: 4 V → 3.5 V 20 VOVP Input overvoltage protection threshold ('230) VIN: 5 V → 7 V ('232) VIN: 5 V → 11 V Vhys(OVP) Hysteresis on OVP ('230) VIN: 7 V → 5V 110 ('232) VIN: 11 V → 5 V 175 3.4 V 300 mV 80 130 mV 6.4 6.6 6.8 10.2 10.5 10.8 55 mV V mV ILIM, TEST ISET SHORT CIRCUIT ISC Current source VSC VIN > UVLO and VIN > VBAT+VIN(DT) 1.3 mA VIN > UVLO and VIN > VBAT+VIN(DT) 520 mV QUIESCENT CURRENT IBAT(PDWN) Sleep current into BAT pin IIN(STDBY) Standby current into IN pin ICC Active supply current, IN pin 8 CE = LO or HI, input power not detected, no load on OUT pin, TJ=85°C 6.5 μA EN1= HI, EN2=HI, VIN = 6 V, TJ=85°C 50 μA EN1= HI, EN2=HI, VIN = 10 V, TJ=85°C 200 CE = LO, VIN = 6 V, no load on OUT pin, VBAT > VBAT(REG), (EN1, EN2) ≠ (HI, HI) 1.5 Submit Documentation Feedback mA Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 150.0 237.5 mV 62.5 mV V POWER PATH VDO(IN-OUT) VIN – VOUT VIN = 4.3 V, IIN = 500 mA, VBAT = 4.2 V VDO(BAT-OUT) VBAT – VOUT IOUT = 500 mA, VIN = 0 V, VBAT > 3 V VO(REG) OUT pin voltage regulation VIN > VOUT + VDO (IN-OUT) 4.3 4.4 4.5 EN1 = LO, EN2 = LO 90 95 100 EN1 = HI, EN2 = LO 450 475 500 mA IINmax Maximum input current KILIM Maximum input current factor ILIM = 200 mA to 500 mA IINmax Programmable input current limit range EN2 = HI, EN1 = LO, RILIM = 2.75 kΩ to 8.4 kΩ 200 VIN-DPM Input voltage threshold when input current is reduced EN2 = LO, EN1 = X 4.35 VDPPM Output voltage threshold when charging current is reduced VO(REG) – 180 mV VBSUP1 Enter battery supplement mode VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 10 Ω →2 Ω VOUT ≤ VBAT –40 mV V VBSUP2 Exit battery supplement mode VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 2 Ω →10 Ω VOUT ≥ VBAT–20 mV V VO(SC1) Output short-circuit detection threshold, power-on VIN > UVLO and VIN > VBAT+VIN(DT) Output short-circuit detection threshold, supplement mode VBAT – VOUT > VO(SC2) indicates short circuit VIN > UVLO and VIN > VBAT+VIN(DT) VO(SC2) EN2 = HI, EN1 = LO KILIM/RILIM 1380 1530 A 1680 AΩ 500 mA 4.50 4.63 V VO(REG) – 100 mV VO(REG) – 30 mV V 0.8 0.9 1 200 250 300 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 V mV 9 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 4 7.5 11 mA 1.6 1.8 2 V 4.16 4.20 4.23 V 2.9 3 3.1 V 500 mA BATTERY CHARGER IBAT(SC) Source current for BAT pin shortcircuit detection VBAT = 1.5 V VBAT(SC) BAT pin short-circuit detection threshold VBAT rising VBAT(REG) Battery charge voltage VLOWV Precharge to fast-charge transition threshold VIN > UVLO and VIN > VBAT + VIN(DT) Battery fast-charge current range VBAT(REG) > VBAT > VLOWV, VIN = 5 V, CE = LO, EN1 = LO, EN2 = HI Battery fast-charge current CE = LO, EN1= LO, EN2 = HI, VBAT > VLOWV, VIN = 5 V, IINmax > ICHG, no load on OUT pin, thermal loop and DPM loop not active KISET Fast-charge current factor 25 mA ≥ ICHG≥ 500 mA KIPRECHG Precharge current factor 2.5 mA ≥ IPRECHG≥ 30 mA ITERM CE = LO, (EN1,EN2) ≠ (LO,LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop Termination comparator threshold and thermal loop not active for termination detection CE = LO, (EN1,EN2) = (LO,LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop and thermal loop not active ICHG ITERM Termination current threshold factor (bq24232) IBIAS(ITERM) Current for external terminationsetting resistor K factor for termination detection threshold (externally set) (bq24232) KITERM ITERM = 0% to 50% of ICHG 25 KISET/RISET A 797 870 975 AΩ 70 88 106 AΩ 0.09*ICHG 0.1*ICHG 0.11*ICHG 0.027*ICHG 0.033*ICHG 0.040*ICHG A A KITERM*RITERM/RISET 72 75 78 CE = LO, (EN1,EN2) ≠ (LO,LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop and thermal loop not active 0.024 0.030 0.036 CE = LO, (EN1,EN2) = (LO,LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop and thermal loop not active 0.009 0.010 0.011 72 75 78 VBAT(REG) –140 mV VBAT(REG) –100 mV VBAT(REG) –60 mV 5 7.5 10 IBIAS(ITERM) Current for external termination_setting resistor (bq24232) VRCH Recharge detection threshold VIN > UVLO and VIN > VBAT+VIN(DT) IBAT(DET) Sink current for battery detection VBAT=2.5 V μA A μA V mA BATTERY-PACK NTC MONITOR (1) INTC NTC bias current VIN > UVLO and VIN > VBAT+VIN(DT) VHOT High-temperature trip point Battery charging, VTS Falling VHYS(HOT) Hysteresis on high trip point Battery charging, VTS Rising from VHOT VCOLD Low-temperature trip point Battery charging, VTS Rising VHYS(COLD) Hysteresis on low trip point Battery charging, VTS Falling from VCOLD VDIS(TS) TS function disable threshold TS unconnected 72 75 78 μA 270 300 330 mV 2000 2100 30 300 mV 2200 mV mV VIN-200 mV V 125 °C 155 °C 20 °C THERMAL REGULATION TJ(REG) Temperature regulation limit TJ(OFF) Thermal shutdown temperature TJ(OFF-HYS) Thermal shutdown hysteresis (1) 10 TJ rising These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC with an R25 of 10 kΩ. Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LOGIC LEVELS ON EN1, EN2, CE, TD VIL Logic LOW input voltage 0 0.4 VIH Logic HIGH input voltage 1.4 6.0 V V IIL Input sink current VIL = 0 V 1 μA IIH Input source current VIH = 1.4 V 10 μA ISINK = 5 mA 0.4 V LOGIC LEVELS ON PGOOD, CHG VOL Output LOW voltage 7.6 Timing Requirements over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT tDGL(PGOOD) Deglitch time, input power detected status tDGL(OVP) Input overvoltage blanking time tREC(OVP) Input overvoltage recovery time Time measured from VIN: 0 V → 5-V 1-μs rise time to PGOOD = LO Time measured from VIN: 11 V → 5-V 1-μs fall time to PGOOD = LO 2 ms 50 μs 2 ms 250 μs 60 ms POWER PATH tDGL(SC2) Deglitch time, supplement mode short circuit tREC(SC2) Recovery time, supplement mode short circuit BATTERY CHARGER tDGL1(LOWV) Deglitch time on precharge to fast-charge transition 25 ms tDGL2(LOWV) Deglitch time on fast-charge to precharge transition 25 ms tDGL(TERM) Deglitch time, termination detected 25 tDGL(RCH) Deglitch time, recharge threshold detected tDGL(NO-IN) Delay time, input power loss to charger turnoff VBAT = 3.6 V. Time measured from VIN: 5 V → 3 V 1-μs fall time ms 62.5 ms 20 ms BATTERY CHARGING TIMERS tPRECHG Precharge safety timer value TMR = floating 1440 1800 2160 s tMAXCHG Charge safety timer value TMR = floating 14400 18000 21600 s tPRECHG Precharge safety timer value 18 kΩ < RTMR < 72 kΩ RTMR × KTMR s tMAXCHG Charge safety timer value 18 kΩ < RTMR < 72 kΩ 10×RTMR ×KTMR s KTMR Timer factor 36 48 60 s/kΩ BATTERY-PACK NTC MONITOR (1) tDGL(TS) (1) Deglitch time, pack temperature fault detection Battery charging, VTS Falling 50 ms These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC with an R25 of 10 kΩ. Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 11 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com 7.7 Typical Characteristics Typical Application Circuit, EN1=0, EN2=1, TA=25°C, unless otherwise noted. 0.3 250 0.3 Dropout Voltage - VIN-VOUT IBAT - mA 200 150 100 50 0.2 0.2 0.1 0.1 0.0 0 120 0 125 130 135 140 TA - Free-Air Temperature - °C 0 145 25 100 50 75 TJ - Junction Temperature - °C 125 IL = 500 mA Figure 2. Dropout Voltage vs Temperature 60 4.45 50 4.43 40 VO - Output Voltage - V Dropout Voltage - VBAT-VOUT Figure 1. Thermal Regulation VBAT = 3 V 30 VBAT = 3.9 V 20 4.40 4.38 4.35 4.33 10 4.30 0 0 50 75 100 25 TJ - Junction Temperature - °C 125 0 IL = 500 mA Figure 3. Dropout Voltage vs Temperature 100 125 IL = 500 mA 6.70 VOVP - Output Voltage Threshold - V VBAT - Regulation Voltage - V 75 Figure 4. Output Regulation Voltage vs Temperature 4.205 4.200 4.195 4.190 4.185 25 50 75 100 125 150 6.65 VI Rising 6.60 6.55 VI Falling 6.50 6.45 0 TJ - Junction Temperature - °C Figure 5. Battery Regulation Voltage vs Temperature 12 50 VIN = 5 V 4.210 4.180 0 25 TJ - Junction Temperature - °C 25 50 75 100 TJ - Junction Temperature - °C 125 6.6 V Figure 6. Overvoltage Protection Threshold vs Temperature bq24230 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 Typical Characteristics (continued) Typical Application Circuit, EN1=0, EN2=1, TA=25°C, unless otherwise noted. 800 10.65 700 10.60 VI Rising ILIM - Input Current - mA VOVP - Output Voltage Threshold - V 10.70 10.55 10.50 10.45 VI Falling 10.40 10.35 10.30 600 500 USB500 400 300 200 USB100 100 10.25 0 10.20 0 25 75 50 100 TJ - Junction Temperature - °C 5 125 6 7 8 9 VI - Input Voltage - V 10 10.5 V Figure 8. Input Current Limit Threshold vs Input Voltage 310 31.5 305 31 IBAT - Precharge Current - A IBAT - Fast Charge Current - A Figure 7. Overvoltage Protection Threshold vs Temperature bq24232 300 295 290 285 280 30.5 30 29.5 29 28.5 3 3.2 3.4 3.6 3.8 4 VBAT - Battery Voltage - V 4.2 2 RISET = 3.3 kΩ Figure 9. Fast-Charge Current vs Battery Voltage 2.2 2.4 2.6 2.8 VBAT - Battery Voltage - V 3 RISET = 3.3 kΩ Figure 10. Precharge Current vs Battery Voltage Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 13 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com 8 Detailed Description 8.1 Overview The bq2423x devices are integrated Li-ion linear chargers and system power-path management devices targeted at space-limited portable applications. The device powers the system while simultaneously and independently charging the battery. This feature reduces the number of charge and discharge cycles on the battery, allows for proper charge termination, and enables the system to run with a defective or absent battery pack. It also allows instant system turnon even with a totally discharged battery. The input power source for charging the battery and running the system can be an AC adapter or a USB port. The devices feature dynamic power-path management (DPPM), which shares the source current between the system and battery charging and automatically reduces the charging current if the system load increases. When charging from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current limit if the input voltage falls below a threshold, preventing the USB port from crashing. The power-path architecture also permits the battery to supplement the system current requirements when the adapter cannot deliver the peak system currents. 14 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 8.2 Functional Block Diagram 250 mV VO (SC1) VBAT OUT- SC1 tDGL(SC2) OUT- SC 2 Q1 IN OUT EN2 Short Detect 225 mV Precharge 2. 25 . V Fastcharge VIN-LOW USB100 USB500 ILIM V REF-ILIM USB-susp ISET TJ TJ (REG) Short Detect VDPPM VOUT VO (REG) Q2 VBAT(REG) EN2 EN1 BAT V OUT CHARGEPUMP I BIAS-ITERM 40 mV Supplement V LOWV 225 mV ITERM bq24232 VRCH VBAT(SC) tDGL(RCH) tDGL2(LOWV) tDGL(TERM) VIN tDGL1(LOWV) ITERM- floating ~3 V BAT-SC VBAT+VIN-DT t DGL (NO-IN) t DGL(PGOOD) VUVLO I NTC V HOT Charge Control TS t DGL (TS ) V COLD V OVP t BLK (OVP) VDIS(TS) EN1 EN2 USB Suspend TD bq24230 CE Halt timers CHG VIPRECHG V CHG I VISET Dynamically Controlled Oscillator Reset timers PGOOD Fast- Charge Timer Timer fault TMR Pre -Charge Timer ~100 mV Timers disabled Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 15 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com 8.3 Feature Description 8.3.1 Undervoltage Lockout The bq2423x family remains in power-down mode when the input voltage at the IN pin is below the undervoltage lockout (UVLO) threshold. During the power-down mode, the host commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to OUT is ON. During power-down mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT. 8.3.2 Power On When VIN exceeds the UVLO threshold, the bq2423x powers up. While VIN is below VBAT + VIN(DT), the host commands at the control inputs (CE, EN1, and EN2) are ignored. The Q1 FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to OUT is ON. During this mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT. When VIN rises above VBAT + VIN(DT), PGOOD is low to indicate that the valid power status and the CE, EN1, and EN2 inputs are read. The device enters standby mode whenever (EN1, EN2) = (1, 1) or if an input overvoltage condition occurs. In standby mode, Q1 is OFF and Q2 is ON. During standby mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT. When the input voltage at IN is within the valid range: VIN > UVLO AND VIN > VBAT + VIN(DT) AND VIN < VOVP, and the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)], all internal timers and other circuit blocks are activated. The device checks for short circuits at the ISET and ILIM pins. If no short conditions exists, the device switches on the input FET Q1 with a 100-mA current limit to check for a short circuit at OUT. If VOUT rises above VSC, the FET Q1 switches to the current-limit threshold set by EN1, EN2, and RILIM and the device enters normal operation where the system is powered by the input source (Q1 is on), and the device continuously monitors the status of CE, EN1, and EN2 as well as the input voltage conditions. 16 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 Feature Description (continued) Begin Startup I IN (MAX) 100 mA PGOOD = Hi -Z CHG = Hi -Z BATTFET ON V OUT short ? V UVLO VOVP Hi impedance Table 4. CHG Status Indicator Charge State CHG Output Charging Low (first charge cycle) Charging terminated Hi impedance until power or CE is toggled Recharging after termination Hi impedance Carging suspended by thermal loop Low (first charge cycle) Safety timers expired Flashing at 2Hz IC disabled or no valid input power Hi impedance 8.4.1.6.1 Timer Fault If the precharge timer expires before the battery voltage reaches VLOWV, the bq2423x indicates a fault condition. Additionally, if the battery current does not fall to ITERM before the fast-charge timer expires, a fault is indicated. The CHG output flashes at approximately 2 Hz to indicate a fault condition. 26 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 8.4.2 Explanation of Deglitch Times and Comparator Hysteresis Figures not to scale VOVP VOVP - Vhys(OVP) VIN Typical Input Voltage Operating Range t < tDGL(OVP) VBAT + VIN(DT) VBAT + VIN(DT) - Vhys(INDT) UVLO UVLO - Vhys(UVLO) PGOOD tDGL(PGOOD) tDGL(OVP) tDGL(NO-IN) tDGL(PGOOD) Figure 17. Power Up, Power Down tDGL1(LOWV) VBAT VLOWV t < tDGL1(LOWV) tDGL1(LOWV) tDGL2(LOWV) ICHG Fast-Charge Fast-Charge IPRE-CHG t < tDGL2(LOWV) Pre-Charge Pre-Charge Figure 18. Pre- To Fast-Charge, Fast- To Precharge Transition – TDGL1(LOWV), TDGL2(LOWV) VBAT VRCH Re-Charge t < tDGL(RCH) tDGL(RCH) Figure 19. Recharge – TDGL(RCH) Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 27 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com Turn Q2 OFF Force Q2 ON tREC(SC2) Turn Q2 OFF tREC(SC2) Force Q2 ON VBAT - VOUT Recover VO(SC2) t < tDGL(SC2) tDGL(SC2) tDGL(SC2) t < tDGL(SC2) Figure 20. Out Short-Circuit – Supplement Mode VCOLD VCOLD - Vhys(COLD) t < tDGL(TS) Suspend Charging tDGL(TS) VTS Resume Charging VHOT - Vhys(HOT) VHOT Figure 21. Battery Pack Temperature Sensing – TS Pin. Battery Temperature Increasing 28 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The bq2423x devices power the system while simultaneously and independently charging the battery. The input power source for charging the battery and running the system can be an AC adapter or a USB port. The devices feature dynamic power-path management (DPPM), which shares the source current between the system and battery charging and automatically reduces the charging current if the system load increases. When charging from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current limit if the input voltage falls below a threshold, preventing the USB port from crashing. The power-path architecture also permits the battery to supplement the system current requirements when the adapter cannot deliver the peak system currents. The bq2423x can be configured as host controlled for selecting different input current limits based on the input source connected; or, as a fully stand-alone device for applications that do not support multiple types of input sources. 9.2 Typical Applications 9.2.1 Using The bq24232 In A Stand-Alone Charger Application See Figure 22 for the Design Example Schematic. VIN = VUVLO to VOVP , IFASTCHG = 200 mA, IIN(MAX) = 500 mA, 25-mA Termination Current, ISET mode (EN1=0, EN2=1), Battery Temperature Charge Range 0°C to 50°C, 7.5-hour Fast Charge Safety Timer. Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 29 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com Typical Applications (continued) R5 1.5 kΩ R6 1.5 kΩ Adaptor DC+ IN CH G PGOOD SYSTEM OUT C1 1 μF GND C2 4.7μF VSS bq 24232 EN 2 EN 1 TS CE BAT PACK - R1 3.57 kΩ IS E T IT E R M TEMP TMR C3 4.7 μF IL IM PACK + R2 2.94 kΩ R4 56 .2 kΩ R3 4 .32 kΩ Figure 22. Using The bq24232 in a Stand-Alone Charger Application 9.2.1.1 Design Requirements • • • • • • 30 Supply voltage = 5 V Fast-charge current of approximately 200 mA; ISET - pin 16 Input Current Limit =500 mA; ILIM - pin 12 Termination Current = 25 mA - pin 15 (bq24232) Safety timer duration, Fast charge = 7.5 hours; TMR – pin 14 TS – Battery Temperature Sense = 10 kΩ NTC (103AT-2) Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 Typical Applications (continued) 9.2.1.2 Detailed Design Procedure 9.2.1.2.1 Calculations 9.2.1.2.1.1 Program The Fast-Charge Current (ISET): RISET = KISET / ICHG KISET = 870 AΩ from the electrical characteristics table. RISET = 870 AΩ/0.2 A = 4.35kΩ Select the closest standard value, which for this case is 4.32 kΩ. Connect this resistor between ISET (pin 16) and VSS. 9.2.1.2.1.2 Program The Input Current Limit (ILIM) RILIM = KILIM / II_MAX KILIM = 1530 AΩ from the electrical characteristics table. RISET = 1530 AΩ / 0.5 A = 3.06 kΩ Select the closest standard value, which for this case is 3.06 kΩ. Connect this resistor between ILIM (pin 12) and VSS. 9.2.1.2.1.3 Program The Termination Current Threshold (ITERM, bq24232) RITERM = RISET × ITERM / KITERM KITERM = 0.03 A from electrical characteristics table RITERM = 4.32 kΩ × 0.025 A/0.03 A = 3.6 kΩ Select the closest standard value, which for this case is 3.57 kΩ. Connect this resistor between ITERM (pin 15) and VSS 9.2.1.2.1.4 Program 7.5-hour Fast-Charge Safety Timer (TMR) RTMR = tMAXCHG / (10 × KTMR ) KTMR = 48 s/kΩ from the electrical characteristics table. RTMR = (7.5 hr × 3600 s/hr) / (10 × 48 s/kΩ) = 56.25 kΩ Select the closest standard value, which for this case is 56.2 kΩ. Connect this resistor between TMR (pin 2) and VSS. 9.2.1.2.2 TS Function Use a 10-kΩ NTC thermistor in the battery pack (103AT). To disable the temperature sense function, use a fixed 10-kΩ resistor between the TS (pin 1) and VSS. Pay close attention to the linearity of the chosen NTC so that it provides the desired hot and cold turnoff thresholds. 9.2.1.2.3 CHG and PGOOD LED Status: connect a 1.5-kΩ resistor in series with a LED between OUT and CHG and OUT and PGOOD. Processor Monitoring Status: connect a pullup resistor (approximately 100 kΩ) between the processor’s power rail and CHG and PGOOD. Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 31 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com Typical Applications (continued) 9.2.1.2.4 Selecting In, Out, and BAT Pin Capacitors In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin, input, output, and battery pins. Using the values shown on the application diagram is recommended. After evaluation of these voltage signals with real system operational conditions, the user can determine if capacitance values can be adjusted toward the minimum recommended values (dc load application) or higher values for fast, high-amplitude, pulsed load applications. Note, if the application is designed with high input voltage sources (bad adapters or wrong adapters), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values so a 16-V capacitor may be adequate for a 30-V transient (verify the tested rating with capacitor manufacturer). 9.2.1.3 Application Curves VIN 5 V/div VOUT 4.4 V VCHG 5 V/div 1 V/div VBAT 4V 2 V/div VBAT Battery Inserted VPGOOD Battery Detection Mode Battery Supplying Load Mandatory Precharge 200 mA/div IBAT Charging Initiated IBAT 100 mA/div Fastcharge 400 ms/div 4 ms/div RLOAD = 25Ω Figure 23. Adapter Plug-In With Battery Connected VCHG 2 V/div VBAT Figure 24. Battery Detection -- Insertion ILOAD 500 mA/div IBAT 200 mA/div 200 mA/div Battery Removed Battery Detection Mode IBAT 2 V/div VOUT 4.4 V 200 mV/div 400 ms/div 400 ms/div RLOAD = 25Ω To 9Ω Figure 25. Battery Detection -- Removal 32 Figure 26. Entering And Exiting DPPM Mode Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 Typical Applications (continued) 500 mA/div ILOAD IBAT VCE 5 V/div VCHG Supplement Mode 5 V/div 500 mA/div VBAT 3.6V VOUT 4.4 V 500 mV/div 200 mV/div IBAT VBAT 3.9 V Mandatory Precharge 100 mA/div 10 ms/div 2 ms/div RLOAD = 25Ω To 4.5Ω Figure 27. Entering And Exiting Battery Supplement Mode Figure 28. Charger ON/OFF Using CE 10 V/div VIN IBAT 200 mA/div VOUT 4.4 V VBAT 4.2 V 200 mV/div 40 ms/div RLOAD = 25Ω Figure 29. OVP Fault VIN = 6 V To 15 V Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 33 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com Typical Applications (continued) 9.2.2 Using The bq24230 in a Host Controlled Charger Application See Figure 30 for the Design Example Schematic. VIN = VUVLO to VOVP , IFASTCHG = 200 mA, IIN(MAX) = 500 mA, Battery Temperature Charge Range 0°C to 50°C, 7.5-hour Fast Charge Safety Timer. R4 1.5 kΩ R5 1.5 kΩ DC+ IN C HG Adaptor PGOOD SYSTEM OUT C1 1μF GND C2 4.7μF VSS bq24230 HOST EN2 EN1 TS TD CE BAT TEMP PACK+ C3 4.7μF PACK - R1 56.2 kΩ R2 2.94 kΩ R3 4.35 kΩ Figure 30. Using The bq24230 in a Host Controlled Charger Application 9.2.2.1 Design Requirements See the bq24232 Design Requirements. 9.2.2.2 Detailed Design Procedure See the bq24232 Detailed Design Procedure. 9.2.2.3 Application Curves See the bq24232 Application Curves. 34 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 10 Power Supply Recommendations 10.1 Requirements for OUT Output In order to provide an output voltage on SYS, the bq2423x require either a power supply between 4.35 V and 6.0 V input for bq24230 and between 4.35V and 10V for bq24232 to fully charge a battery. The supply must have at least 100 mA current rating connected to IN; or, a single-cell Li-Ion battery with voltage around 2.2 V connected to BAT. The source current rating needs to be at least 1.5 A in order to provide maximum output current to SYS. 10.2 USB Sources and Standard AC Adapters In order for charging to occur the source voltage measured at the IN terminals of the IC, factoring in cable/trace losses from the source, must be greater than the VINDPM threshold (in USB mode), but less than the maximum values shown above. The current rating of the source must be higher than the load requirements for OUT in the application. For charging at a desired charge current of ICHRG, IIN > (ISYS+ ICHRG). The charger limits IIN to the current limit setting of EN1/EN2. 10.3 Half-Wave Adapters Some low-cost adapters implement a half rectifier topology, which causes the adapter output voltage to fall below the battery voltage during part of the cycle. To enable operation with low-cost adapters under those conditions, the bq2423x family keeps the charger on for at least 20 ms (typical) after the input power puts the part in sleep mode. This feature enables use of external low-cost adapters using 50-Hz networks. 11 Layout 11.1 Layout Guidelines • • • • To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter capacitors from OUT to GND (thermal pad) must be placed as close as possible to the bq2423x, with short trace runs to both IN, OUT, and GND (thermal pad). All low-current GND connections must be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small signal ground path and the power ground path. The high current charge paths into the IN pin and from the OUT pin must be sized appropriately for the maximum charge current in order to avoid voltage drops in these traces. The bq2423x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed-circuit board (PCB); this thermal pad is also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full PCB design guidelines for this package are provided in the application report entitled: QFN/SON PCB Attachment (SLUA271). Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 35 bq24230, bq24232 SLUS821J – OCTOBER 2008 – REVISED MAY 2017 www.ti.com 11.2 Layout Example 11.3 Thermal Package The bq2423x is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed-circuit board (PCB). The power pad must be directly connected to the Vss pin. Full PCB design guidelines for this package are provided in the application report entitled: QFN/SON PCB Attachment (SLUA271). The most common measure of package thermal performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for θJA is: θJA = (TJ - T) / P (10) Where: TJ = chip junction temperature T = ambient temperature P = device power dissipation Factors that can greatly influence the measurement and calculation of θJA include: 1. 2. 3. 4. 36 Whether the device is board mounted Trace size, composition, thickness, and geometry Orientation of the device (horizontal or vertical) Volume of the ambient air surrounding the device under test and airflow Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 bq24230, bq24232 www.ti.com SLUS821J – OCTOBER 2008 – REVISED MAY 2017 Thermal Package (continued) 5. Whether other surfaces are in close proximity to the device being tested Due to the charge profile of Li-ion batteries, the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest. Typically, after fast charge begins, the pack voltage increases to ~3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a few minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage to use. This is easy to verify, with the system and a fully discharged battery, by plotting temperature on the bottom of the PCB under the IC (pad must have multiple vias), the charge current and the battery voltage as a function of time. The fast-charge current starts to taper off if the part goes into thermal regulation. The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET. It can be calculated from the following equation when a battery pack is being charged : P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT) (11) The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage and nominal ambient temperatures) and use the feature for nontypical situations such as hot environments or higher than normal input source voltage. With that said, the IC still performs as described, if the thermal loop is always active. 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation Application report QFN/SON PCB Attachment, SLUA271 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 5. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY bq24230 Click here Click here Click here Click here Click here bq24232 Click here Click here Click here Click here Click here 12.3 Trademarks Bluetooth is a trademark of Bluetooth SIG, Inc.. All other trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated Product Folder Links: bq24230 bq24232 37 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) BQ24230RGTR ACTIVE VQFN RGT 16 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CGN Samples BQ24230RGTT ACTIVE VQFN RGT 16 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CGN Samples BQ24232RGTR ACTIVE VQFN RGT 16 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 NXK Samples BQ24232RGTT ACTIVE VQFN RGT 16 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 NXK Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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