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bq24230H, bq24232H
SLUSBI8B – JANUARY 2014 – REVISED MAY 2017
bq2423xx USB-Friendly Lithium-Ion Battery Charger and Power-Path Management IC
•
•
•
•
•
The charger power stage and charge current sense
functions are fully integrated. The charger function
has high-accuracy current and voltage regulation
loops, charge status display, and charge termination.
The input current limit and charge current are
programmable using external resistors.
Device Information(1)
PART NUMBER
3.00 mm x 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Typical Application Circuit
Bluetooth® Devices
Low-Power Handheld Devices
1 kΩ
1 kΩ
3 Description
Adaptor
IN
OUT 10
13
DC
SYSTEM
11
1mF
GND
4.7mF
bq24232H
EN2
5
BAT
2
3
4.7mF
TD
CE
EN1
ILIM
6
12
PACK+
TMR
15
VSS
4
8
14
The bq2423xH series of devices are highly integrated
Li-ion linear chargers and system power-path
management devices targeted at space-limited
portable applications. The devices operate from either
a USB port or AC adapter and support charge
currents from 25 mA to 500 mA. The high-input
voltage range with input overvoltage protection
supports low-cost, unregulated adapters. The USB
input current limit accuracy and start-up sequence
allow the bq2423xH to meet USB-IF inrush current
specifications. Additionally, the input dynamic power
management (VIN-DPM) prevents the charger from
crashing poorly designed or incorrectly configured
USB sources.
BODY SIZE (NOM)
VQFN (16)
2 Applications
•
•
PACKAGE
bq2423xx
9
•
•
CHG
•
The battery is charged in three phases: conditioning,
constant current, and constant voltage. In all charge
phases, an internal control loop monitors the IC
junction temperature and reduces the charge current
if the internal temperature threshold is exceeded.
ISET
•
7
•
•
•
Fully Compliant USB Charger
– Selectable 100-mA and 500-mA Maximum
Input Current
– 100-mA Maximum Current Limit Ensures
Compliance to USB-IF Standard
– Input-based Dynamic Power Management
(VIN– DPM) for Protection Against Poor USB
Sources
28-V Input Rating With Overvoltage Protection
4.35-V Battery Regulation
Integrated Dynamic Power-Path Management
(DPPM) Function Simultaneously and
Independently Powers the System and Charges
the Battery
Supports up to 500-mA Charge Current With
Current Monitoring Output (ISET)
Programmable Input Current Limit up to 500 mA
for Wall Adapters
Programmable Termination Current (bq24232H)
Programmable Precharge and Fast-Charge Safety
Timers
Reverse Current, Short-Circuit, and Thermal
Protection
NTC Thermistor Input
Proprietary Start-up Sequence Limits Inrush
Current
Status Indication – Charging/Done, Power Good
Small 3-mm × 3-mm 16-Lead QFN Package
PGOOD
•
1
The bq2423xH features dynamic power-path
management (DPPM) that powers the system while
simultaneously and independently charging the
battery. The DPPM circuit reduces the charge current
when the input current limit causes the system output
to fall to the DPPM threshold, thus supplying the
system load at all times while monitoring the charge
current separately. This feature reduces the number
of charge and discharge cycles on the battery, allows
for proper charge termination, and enables the
system to run with a defective or absent battery pack.
Additionally, this feature enables instant system turnon even with a totally discharged battery. The powerpath management architecture also lets the battery
supplement the system current requirements when
the adapter cannot deliver the peak system currents,
thus enabling the use of a smaller adapter.
TS
1
TEMP
16
1 Features
2.94 kΩ
4.32 kΩ
PACK-
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq24230H, bq24232H
SLUSBI8B – JANUARY 2014 – REVISED MAY 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
7.6
4
4
5
5
5
9
Detailed Description ............................................ 11
8.1
8.2
8.3
8.4
9
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
11
12
13
23
Application and Implementation ........................ 25
9.1 Application Information............................................ 25
9.2 Typical Application .................................................. 25
9.3 System Examples ................................................... 30
10 Power Supply Recommendations ..................... 31
10.1 Requirements for OUT Output .............................. 31
10.2 USB Sources and Standard AC Adapters ............ 31
10.3 Half-Wave Adapters .............................................. 31
11 Layout................................................................... 31
11.1 Layout Guidelines ................................................. 31
11.2 Layout Example .................................................... 32
11.3 Thermal Package .................................................. 33
12 Device and Documentation Support ................. 34
12.1
12.2
12.3
12.4
12.5
Documentation Support ........................................
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
34
34
34
34
34
13 Mechanical, Packaging, and Orderable
Information ........................................................... 34
4 Revision History
Changes from Revision A (November 2014) to Revision B
•
Page
Changed from "Table 2" to "Table 1" in the Pin Functions Description column for EN1/EN2 .............................................. 3
Changes from Original (January 2014) to Revision A
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
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Copyright © 2014–2017, Texas Instruments Incorporated
Product Folder Links: bq24230H bq24232H
bq24230H, bq24232H
www.ti.com
SLUSBI8B – JANUARY 2014 – REVISED MAY 2017
5 Device Comparison Table
PART NUMBER (1)
(2)
bq24230HRGTR
(3)
bq24230HRGTT
(3)
(1)
(2)
(3)
VOVP
VOUT(REG)
VDPM
OPTIONAL
FUNCTION
MARKING
6.6 V
4.5 V
VO(REG) – 100 mV
TD
24230H
6.6 V
4.5 V
VO(REG) – 100 mV
TD
24230H
bq24232HRGTR
10.5 V
4.5 V
VO(REG) – 100 mV
ITERM
24232H
bq24232HRGTT
10.5 V
4.5 V
VO(REG) – 100 mV
ITERM
24232H
The RGT package is available in the following options:
R - taped and reeled in quantities of 3000 devices per reel.
T - taped and reeled in quantities of 250 devices per reel.
This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for
use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including
bromine (Br) or antimony (Sb) above 0.1% of total product weight.
Product Preview
6 Pin Configuration and Functions
ISET
TD
TMR
IN
ISET
ITERM
TMR
IN
RGT Package
16 Pins
Top View
16 15 14 13
12
2
11
10
4
9
6
7
EN2
EN1
PGOOD
5
TS
BAT
BAT
CE
8
1
16 15 14 13
12
2
11
bq24232H
3
10
4
9
5
6
7
EN2
EN1
PGOOD
bq24230H
3
ILIM
OUT
OUT
CHG
ILIM
OUT
OUT
CHG
8
VSS
1
VSS
TS
BAT
BAT
CE
Pin Functions
PIN
NAME
NUMBER
I/O
DESCRIPTION
'230H
'232H
BAT
2,3
2, 3
I/O
CE
4
4
I
Charge Enable Active-Low Input. Connect CE to a high logic level to place the battery charger in standby mode. In
standby mode, OUT is active and battery supplement mode is still available. Connect CE to a low logic level to enable
the battery charger. CE is internally pulled down with approximately 285 kΩ. Do not leave CE unconnected to ensure
proper operation.
CHG
9
9
O
Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high impedance
when charging is complete and when charger is disabled.
EN1
6
6
I
EN2
5
5
I
ILIM
12
12
I
Adjustable Current Limit Programming Input. Connect a 3.1-kΩ to 7.8-kΩ resistor from ILIM to VSS to program the
maximum input current (EN2=1, EN1=0). The input current includes the system load and the battery charge current.
IN
13
13
I
Input Power Connection. Connect IN to the connected to external DC supply (AC adapter or USB port). The input
operating range is 4.35 V to 6.6 V. The input can accept voltages up to 26 V without damage but operation is
suspended. Connect bypass capacitor 1 μF to 10 μF to VSS.
ISET
16
16
I/O
Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the battery.
Bypass BAT to VSS with a 4.7-μF to 47-μF ceramic capacitor.
Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable USB
compliance. See Table 1 for the description of the operation states. EN1 and EN2 are internally pulled down with
approximately 285 kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation.
Fast-Charge Current Programming Input. Connect a 3-kΩ to 36-kΩ resistor from ISET to VSS to program the fast-charge
current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at ISET reflects the actual
charging current and can be used to monitor charge current. See the Charge Current Translator section for more details.
Copyright © 2014–2017, Texas Instruments Incorporated
Product Folder Links: bq24230H bq24232H
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Pin Functions (continued)
PIN
I/O
DESCRIPTION
15
I
Termination Current Programming Input. Connect a 0-Ω to 15-kΩ resistor from ITERM to VSS to program the termination
current. Leave ITERM unconnected to set the termination current to the internal default 10% threshold.
10,11
10, 11
O
System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and above the
regulation voltage. When the input is out of the operation range, OUT is connected to VBAT. Connect OUT to the system
load. Bypass OUT to VSS with a 4.7-μF to 47-μF ceramic capacitor.
PGOOD
7
7
O
Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is detected. PGOOD
is high-impedance when the input power is not within specified limits. Connect PGOOD to the desired logic voltage rail
using a 1-kΩ to 100-kΩ resistor, or use with an LED for visual indication.
TD
15
-
I
Termination Dsable Input. Connect TD high to disable charger termination. Connect TD to VSS to enable charger
termination. TD is checked during start-up only and cannot be changed during operation. See the TD section in this data
sheet for a description of the behavior when termination is disabled. TD is internally pulled down to VSS with
approximately 285 kΩ. Do not leave TD unconnected to ensure proper operation.
–
An internal electrical connection exists between the exposed thermal pad and the VSS pin of the device. The thermal
pad must be connected to the same potential as the VSS pin on the printed-circuit board. Do not use the thermal pad as
the primary ground input for the device. The VSS pin must be connected to ground at all times.
NAME
ITERM
OUT
NUMBER
'230H
'232H
-
Thermal
Pad
TMR
14
14
I
Timer Programming Input. TMR controls the precharge and fast-charge safety timers. Connect TMR to VSS to disable all
safety timers. Connect a 18-kΩ to 72-kΩ resistor between TMR and VSS to program the timers a desired length. Leave
TMR unconnected to set the timers to the 5-hour fast charge and 30-minute precharge default timer values.
TS
1
1
I
External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors a 10-kΩ
NTC thermistor. For applications that do not use the TS function, connect a 10-kΩ fixed resistor from TS to VSS to
maintain a valid voltage level on TS.
VSS
8
8
–
Ground. Connect to the thermal pad and to the ground rail of the circuit.
7 Specifications
7.1 Absolute Maximum Ratings (1)
over the 0°C to 125°C operating free-air temperature range (unless otherwise noted)
VI
Input voltage
II
Input current
IO
Output current (continuous)
Output sink current
MIN
MAX
UNIT
IN (with respect to VSS)
–0.3
28
V
OUT (with respect to VSS)
–0.3
7
V
BAT (with respect to VSS)
–0.3
5
V
EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, TMR, TD,
ITERM (with respect to VSS)
–0.3
7
V
IN
600
mA
OUT
1700
mA
BAT (Discharge mode)
1700
mA
15
mA
TJ
Junction temperature
–40
150
°C
Tstg
Storage temperature
–65
150
°C
(1)
CHG, PGOOD
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
4
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±500 V may actually have higher performance.
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Product Folder Links: bq24230H bq24232H
bq24230H, bq24232H
www.ti.com
SLUSBI8B – JANUARY 2014 – REVISED MAY 2017
7.3 Recommended Operating Conditions
MIN
MAX
4.35
26
V
'230H
4.35
6.4
V
'232H
4.35
10.2
IN voltage range
VI
IN operating voltage range
UNIT
IIN
Input current, IN pin
500
mA
IOUT
Current, OUT pin
1500
mA
IBAT
Current, BAT pin (discharging)
1500
mA
ICHG
Current, BAT pin (charging)
500
mA
TJ
Junction temperature
–40
125
°C
RILIM
Maximum input current programming resistor
3.1
7.8
kΩ
RISET
Fast-charge current programming resistor
1.74
34.8
kΩ
RTMR
Timer programming resistor
18
72
kΩ
RITERM
Termination programming resistor
0
15
kΩ
'232H
7.4 Thermal Information
bq2423xx
THERMAL METRIC (1)
RGT
UNIT
16 PINS
θJA
Junction-to-ambient thermal resistance
44.5
θJCtop
Junction-to-case (top) thermal resistance
54.2
θJB
Junction-to-board thermal resistance
17.2
ψJT
Junction-to-top characterization parameter
1.0
ψJB
Junction-to-board characterization parameter
17.1
θJCbot
Junction-to-case (bottom) thermal resistance
3.8
(1)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
7.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
3.3
MAX
UNIT
INPUT
UVLO
Undervoltage lockout
VIN: 0 V → 4 V
3.2
Vhys(UVLO)
Hysteresis on UVLO
VIN: 4 V → 0 V
200
VIN(DT)
Input power detection threshold
Input power detected when VIN > VBAT + VIN(DT)
VBAT = 3.6 V, VIN: 3.5 V → 4 V
55
Vhys(INDT)
Hysteresis on VIN(DT)
VBAT = 3.6 V, VIN: 4 V → 3.5 V
20
tDGL(PGOOD)
Deglitch time, input power
detected status
Time measured from VIN: 0 V → 5 V 1-μs
rise time to PGOOD = LO
VOVP
Input overvoltage protection
threshold
('230H) VIN: 5 V → 7 V
6.4
6.6
6.8
('232H) VIN: 5 V → 11 V
10.2
10.5
10.8
Vhys(OVP)
tDGL(OVP)
tREC(OVP)
Hysteresis on OVP
V
mV
145
mV
mV
2
('230H) VIN: 7 V → 5V
110
('232H) VIN: 11 V → 5 V
175
Input overvoltage blanking time
ms
V
mV
50
μs
2
ms
VIN > UVLO and VIN > VBAT+VIN(DT)
1.3
mA
VIN > UVLO and VIN > VBAT+VIN(DT)
520
mV
Time measured from VIN: 11 V → 5 V 1 μs
fall time to PGOOD = LO
Input overvoltage recovery time
95
3.4
300
ILIM, ISET SHORT-CIRCUIT TEST
ISC
Current source
VSC
QUIESCENT CURRENT
IBAT(PDWN)
CE = LO or HI, input power not detected, no
load on OUT pin, TJ = 85°C
Sleep current into BAT pin
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6.5
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μA
5
bq24230H, bq24232H
SLUSBI8B – JANUARY 2014 – REVISED MAY 2017
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Electrical Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
EN1= HI, EN2=HI, VIN = 6 V, TJ=85°C
50
EN1= HI, EN2=HI, VIN = 10 V, TJ=85°C
200
1.5
mA
237.5
mV
62.5
mV
V
IIN(STDBY)
Standby current into IN pin
ICC
Active supply current, IN pin
CE = LO, VIN = 6 V, no load on OUT pin,
VBAT > VBAT(REG), (EN1, EN2) ≠ (HI, HI)
VDO(IN-OUT)
VIN – VOUT
VIN = 4.45 V, IIN = 500 mA, VBAT = 4.35 V
VDO(BAT-OUT)
VBAT – VOUT
IOUT = 500 mA, VIN = 0 V, VBAT > 3 V
VO(REG)
OUT pin voltage regulation
VIN > VOUT + VDO (IN-OUT)
4.4
4.5
4.6
EN1 = LO, EN2 = LO
90
95
100
EN1 = HI, EN2 = LO
450
475
500
μA
POWER PATH
150
mA
IINmax
Maximum input current
KILIM
Maximum input current factor
ILIM = 200mA to 500mA
IINmax
Programmable input current limit
range
EN2 = HI, EN1 = LO, RILIM = 3.1 kΩ to 7.8 kΩ
200
VIN-DPM
Input voltage threshold when input
current is reduced
EN2 = LO, EN1 = X
4.35
VDPPM
Output voltage threshold when
charging current is reduced
VO(REG) –
180 mV
VBSUP1
Enter battery supplement mode
VBAT = 3.6 V, RILIM = 1.5 kΩ,
RLOAD = 10 Ω →2 Ω
VOUT ≤ VBAT
–40 mV
V
VBSUP2
Exit battery supplement mode
VBAT = 3.6 V, RILIM = 1.5 kΩ,
RLOAD = 2 Ω →10 Ω
VOUT ≥
VBAT–20 mV
V
VO(SC1)
Output short-circuit detection
threshold, power-on
VIN > UVLO and VIN > VBAT + VIN(DT)
0.8
0.9
1
VO(SC2)
Output short-circuit detection
threshold, supplement mode
VBAT – VOUT > VO(SC2) indicates
short circuit
VIN > UVLO and VIN > VBAT + VIN(DT)
200
250
300
tDGL(SC2)
Deglitch time, supplement mode
short circuit
tREC(SC2)
Recovery time, supplement mode
short circuit
EN1 = LO, EN2 = HI
6
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KILIM/RILIM
1380
1530
A
1680
AΩ
500
mA
4.50
4.63
V
VO(REG) –
100 mV
VO(REG) –
30 mV
V
V
mV
250
μs
60
ms
Copyright © 2014–2017, Texas Instruments Incorporated
Product Folder Links: bq24230H bq24232H
bq24230H, bq24232H
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SLUSBI8B – JANUARY 2014 – REVISED MAY 2017
Electrical Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
4
7.5
11
mA
1.6
1.8
2
V
4.306
4.35
4.394
V
2.9
3
3.1
V
BATTERY CHARGER
IBAT(SC)
Source current for BAT pin shortcircuit detection
VBAT = 1.5 V
VBAT(SC)
BAT pin short-circuit detection
threshold
VBAT rising
VBAT(REG)
Battery charge voltage
VLOWV
Precharge to fast-charge transition
threshold
tDGL1(LOWV)
Deglitch time on precharge to fastcharge transition
25
ms
tDGL2(LOWV)
Deglitch time on fast-charge to
precharge transition
25
ms
VIN > UVLO and VIN > VBAT + VIN(DT)
Battery fast-charge current range
VBAT(REG) > VBAT > VLOWV, VIN = 5 V, CE = LO,
EN1 = LO, EN2 = HI
Battery fast-charge current
CE = LO, EN1= LO, EN2 = HI,
VBAT > VLOWV, VIN = 5 V, IINmax > ICHG, no load
on OUT pin, thermal loop and DPM loop not
active
KISET
Fast-charge current factor
25 mA ≤ ICHG ≤ 500 mA
KPRECHG
Precharge current factor
2.5 mA ≤ IPRECHG ≤ 50 mA
ICHG
ITERM
Termination comparator threshold
for internally set termination
detection
ITERM
Termination current threshold for
programmable termination
detection
IBIAS(ITERM)
Current for external terminationsetting resistor
KITERM
tDGL(TERM)
CE = LO, (EN1,EN2) ≠ (LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop
and thermal loop not active
CE = LO, (EN1,EN2) = (LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop
and thermal loop not active
ITERM = 0% to 50% of ICHG
K factor for termination detection
threshold (externally set)
(bq24232H)
25
500
KISET/RISET
A
797
870
975
AΩ
70
88
106
AΩ
0.09 x ICHG
0.1 x ICHG
0.11 x
ICHG
0.033 x ICHG
0.040 x
ICHG
A
0.027 x ICHG
KITER x RITERM/RISET
A
72
75
78
CE = LO, (EN1,EN2) ≠ (LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop
and thermal loop not active
0.024
0.030
0.036
CE = LO, (EN1,EN2) = (LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop
and thermal loop not active
0.009
0.010
VBAT(REG)
–140 mV
VBAT(REG)
–100 mV
0.011
25
Recharge detection threshold
VIN > UVLO and VIN > VBAT + VIN(DT)
tDGL(RCH)
Deglitch time, recharge threshold
detected
tDGL(NO-IN)
Delay time, input power loss to
charger turnoff
VBAT = 3.6 V. Time measured from
VIN: 5 V → 3 V 1-μs fall time
IBAT(DET)
Sink current for battery detection
VBAT=2.5 V
tDET
Battery detection timer
BAT high or low
μA
A
Deglitch time, termination detected
VRCH
mA
5
ms
VBAT(REG)
–60 mV
V
62.5
ms
20
ms
7.5
10
250
mA
ms
BATTERY CHARGING TIMERS
tPRECHG
Precharge safety timer value
TMR = floating
1440
1800
2160
s
tMAXCHG
Charge safety timer value
TMR = floating
14400
18000
21600
s
tPRECHG
Precharge safety timer value
18 kΩ < RTMR < 72 kΩ
RTMR × KTMR
tMAXCHG
Charge safety timer value
18 kΩ < RTMR < 72 kΩ
10 × RTMR × KTMR
KTMR
Timer factor
30
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40
s
s
50
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Electrical Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BATTERY-PACK NTC MONITOR (1)
INTC
NTC bias current
VIN > UVLO and VIN > VBAT + VIN(DT)
VHOT
High-temperature trip point
Battery charging, VTS Falling
VHYS(HOT)
Hysteresis on high trip point
Battery charging, VTS Rising from VHOT
VCOLD
Low-temperature trip point
Battery charging, VTS Rising
VHYS(COLD)
Hysteresis on low trip point
Battery charging, VTS Falling from VCOLD
tDGL(TS)
Deglitch time, pack temperature
fault detection
Battery charging, VTS Falling
VDIS(TS)
TS function disable threshold
TS unconnected (applies with TD pin on
bq24230H)
72
75
78
μA
270
300
330
mV
2000
2100
30
mV
2200
mV
300
mV
50
ms
VIN-200 mV
V
125
°C
155
°C
20
°C
THERMAL REGULATION
TJ(REG)
Temperature regulation limit
TJ(OFF)
Thermal shutdown temperature
TJ(OFF-HYS)
Thermal shutdown hysteresis
TJ rising
LOGIC LEVELS ON EN1, EN2, CE, TD
VIL
Logic LOW input voltage
0
0.4
VIH
Logic HIGH input voltage
1.4
6.0
V
V
IIL
Input sink current
VIL = 0 V
1
μA
IIH
Input source current
VIH = 1.4 V
10
μA
ISINK = 5 mA
0.4
V
LOGIC LEVELS ON PGOOD, CHG
VOL
(1)
8
Output LOW voltage
These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC
with an R25 of 10 kΩ.
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7.6 Typical Characteristics
Typical Application Circuit, EN1 = 0, EN2 = 1, TA = 25°C, unless otherwise noted.
0.45
0.06
IL = 500 mA
IL = 1000 mA
VBAT - VOUT - Dropout Voltage - V
VIN - VOUT - Dropout Voltage - V
0.4
0.35
0.3
0.25
0.2
0.15
0.1
0.05
0
25
50
75
100
o
TJ - Junction Temperature - C
003
0.02
0.01
125
Figure 1. Dropout Voltage vs Temperature
0
25
50
75
100
o
TJ - Junction Temperature - C
125
Figure 2. Dropout Voltage vs Temperature
4.55
4.37
VIN = 5 V
IL = 1000 mA
VBAT - Regulation Voltage - V
4.52
VOUT - Output Voltage - V
VBAT = 3.9 V
0.04
0
0
4.49
4.46
4.43
4.4
4.37
4.36
4.35
4.34
4.36
4.32
4.31
0
25
50
75
100
o
TJ - Junction Temperature - C
125
Figure 3. Output Voltage vs Temperature
0
125
10.70
VOVP - Output Voltage Threshold - V
4.205
4.200
4.195
4.190
4.185
4.180
0
25
50
75
100
o
TJ - Junction Temperature - C
Figure 4. Output Regulation Voltage vs Temperature
4.210
VBAT - Regulation Voltage - V
0.05
10.65
10.60
VI Rising
10.55
10.50
10.45
VI Falling
10.40
10.35
10.30
10.25
10.20
25
50
75
100
125
150
0
TJ - Junction Temperature - °C
Figure 5. Battery Regulation Voltage vs Temperature
25
75
50
100
TJ - Junction Temperature - °C
125
Figure 6. Output Voltage Threshold vs Temperature
(bq24230H)
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Typical Characteristics (continued)
Typical Application Circuit, EN1 = 0, EN2 = 1, TA = 25°C, unless otherwise noted.
10.7
700
10.6
10.55
ILIM - Input Current - mA
VOVP - Output Voltage Threshold - V
800
VOVP = 10.5
10.65
VI = Rising
10.5
10.45
10.4
10.35
VI = Falling
10.3
600
500
USB500
400
300
200
USB100
100
10.25
0
10.2
0
25
50
75
100
o
TJ - Junction Temperature - C
5
125
Figure 7. Output Voltage Threshold vs Temperature
(bq24232H)
7
8
9
VI - Input Voltage - V
10
Figure 8. Input Current Limit Threshold vs Input Voltage
310
31.5
RISET = 2.9 kW
RISET = 2.9 kW
305
IBAT - Precharge Current - mA
IBAT - Fast Charge Current - mA
6
300
295
290
285
280
31
30.5
30
29.5
29
28.5
3
3.2
3.4
3.6
3.8
4
VBAT - Battery Voltage - V
4.2
2
2.2
2.4
2.6
2.8
VBAT - Battery Voltage - V
3
Figure 10. Precharge Current vs Battery Voltage
Figure 9. Fast-Charge Current vs Battery Voltage
10
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8 Detailed Description
8.1 Overview
The bq2423xH devices are integrated Li-ion linear chargers and system power-path management devices
targeted at space-limited portable applications. The device powers the system while simultaneously and
independently charging the battery. This feature reduces the number of charge and discharge cycles on the
battery, allows for proper charge termination, and enables the system to run with a defective or absent battery
pack. This feature also allows instant system turnon even with a totally discharged battery. The input power
source for charging the battery and running the system can be an AC adapter or a USB port. The devices feature
dynamic power-path management (DPPM), which shares the source current between the system and battery
charging and automatically reduces the charging current if the system load increases. When charging from a
USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current limit if the input
voltage falls below a threshold, thus preventing the USB port from crashing. The power-path architecture also
permits the battery to supplement the system current requirements when the adapter cannot deliver the peak
system currents.
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8.2 Functional Block Diagram
250 mV
VO (SC1)
VBAT
OUT- SC1
tDGL(SC2)
OUT- SC 2
Q1
IN
OUT
EN2
Short Detect
225 mV
Precharge
2. 25
. V
Fastcharge
VIN-LOW
USB100
USB500
ILIM
V REF-ILIM
USB-susp
ISET
TJ
TJ (REG)
Short Detect
VDPPM
VOUT
VO (REG)
Q2
VBAT(REG)
EN2
EN1
BAT
V OUT
CHARGEPUMP
I BIAS-ITERM
40 mV
Supplement
V LOWV
225 mV
ITERM
bq24232H
VRCH
VBAT(SC)
tDGL(RCH)
tDGL2(LOWV)
tDGL(TERM)
VIN
tDGL1(LOWV)
ITERM- floating
~3 V
BAT-SC
VBAT+VIN-DT
t DGL (NO-IN)
t DGL(PGOOD)
VUVLO
I NTC
V HOT
Charge Control
TS
t DGL (TS )
V COLD
V OVP
t BLK (OVP)
VDIS(TS)
EN1
EN2
USB Suspend
TD
bq24230H
CE
Halt timers
CHG
VIPRECHG
V CHG
I
VISET
Reset timers
Dynamically
Controlled
Oscillator
PGOOD
Fast- Charge
Timer
Timer fault
TMR
Pre -Charge
Timer
~100 mV
12
Timers disabled
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8.3 Feature Description
8.3.1 Undervoltage Lockout
The bq2423xH family remains in power-down mode when the input voltage at the IN pin is below the
undervoltage lockout (UVLO) threshold.
During the power-down mode, the host commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1
FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance.
The Q2 FET that connects BAT to OUT is ON. During power-down mode, the VOUT(SC2) circuitry is active and
monitors for overload conditions on OUT.
8.3.2 Power On
When VIN exceeds the UVLO threshold, the bq2423xH powers up. While VIN is below VBAT + VIN(DT), the host
commands at the control inputs (CE, EN1, and EN2) are ignored. The Q1 FET connected between IN and OUT
pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to
OUT is ON. During this mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.
When VIN rises above VBAT + VIN(DT), PGOOD is low to indicate that the valid power status and the CE, EN1, and
EN2 inputs are read. The device enters standby mode whenever (EN1, EN2) = (1, 1) or if an input overvoltage
condition occurs. In standby mode, Q1 is OFF and Q2 is ON. (If SYSOFF is high, FET Q2 is off). During standby
mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.
When the input voltage at IN is within the valid range: VIN > UVLO AND VIN > VBAT + VIN(DT) AND VIN < VOVP, and
the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)], all internal
timers and other circuit blocks are activated. The device checks for short circuits at the ISET and ILIM pins. If no
short conditions exists, the device switches on the input FET Q1 with a 100-mA current limit to check for a short
circuit at OUT. If VOUT rises above VSC, the FET Q1 switches to the current-limit threshold set by EN1, EN2, and
RILIM and the device enters normal operation where the system is powered by the input source (Q1 is on), and
the device continuously monitors the status of CE, EN1, and EN2 as well as the input voltage conditions.
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Feature Description (continued)
Begin Startup
I IN (MAX) 100 mA
PGOOD = Hi -Z
CHG = Hi -Z
BATTFET ON
V OUT short ?
V UVLO VOVP
High-impedance
Table 3. CHG Status Indicator
CHARGE STATE
CHG OUTPUT
Charging
Low (first charge cycle)
Charging terminated
High-impedance until power or CE is toggled
Recharging after termination
High-impedance
Carging suspended by thermal loop
Low (first charge cycle)
Safety timers expired
Flashing at 2Hz
IC disabled or no valid input power
High-impedance
8.3.4.6.1 Timer Fault
If the precharge timer expires before the battery voltage reaches VLOWV, the bq2423xH indicates a fault condition.
Additionally, if the battery current does not fall to ITERM before the fast-charge timer expires, a fault is indicated.
The CHG output flashes at approximately 2 Hz to indicate a fault condition.
8.3.4.7 Thermal Regulation and Thermal Shutdown
The bq2423xH contain a thermal regulation loop that monitors the die temperature. If the die temperature
exceeds TJ(REG), the device automatically reduces the charging current to prevent the die temperature from
increasing further. In some cases, the die temperature continues to rise despite the operation of the thermal loop,
particularly under high VIN and heavy OUT system load conditions. Under these conditions, if the die
temperature increases to TJ(OFF), the input FET Q1 is turned OFF. FET Q2 is turned ON to ensure that the
battery still powers the load on OUT. Once the device die temperature cools by TJ(OFF-HYS), the input FET Q1 is
turned on and the device returns to thermal regulation. Continuous overtemperature conditions result in a hiccup
mode. Safety timers are slowed proportionally to the charge current in thermal regulation. Battery termination is
disabled during thermal regulation and thermal shutdown.
Note that this feature monitors the die temperature of the bq2423xH. This is not synonymous with ambient
temperature. Self-heating exists due to the power dissipated in the IC because of the linear nature of the battery
charging algorithm and the LDO mode for OUT.
A modified charge cycle with the thermal loop active is shown in Figure 16:
20
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PRECHARGE
THERMAL
REGULATION
CC FAST
CHARGE
CV TAPER
DONE
VO(REG)
IO(CHG)
Battery Voltage
Battery Current
V(LOWV)
HI-z
I(PRECHG)
I(TERM)
TJ(REG)
IC Junction Temperature, TJ
Figure 16. Modified Charge Cycle With Thermal Loop Active
8.3.5 Battery Pack Temperature Monitoring
The bq2423xH features an external battery pack temperature monitoring input. The TS input connects to the
NTC resistor in the battery pack to monitor battery temperature and prevent dangerous overtemperature
conditions.
During charging, INTC is sourced to TS and the voltage at TS is continuously monitored. If, at any time, the
voltage at TS is outside of the operating range (VCOLD to VHOT), charging is suspended. The timers maintain their
values but suspend counting. When the voltage measured at TS returns to within the operation window, charging
is resumed and the timers continue counting. When charging is suspended due to a battery pack temperature
fault, the CHG pin remains low and continues to indicate charging.
For the bq24230H, battery pack temperature sensing is disabled when termination is disabled (TD = High) and
the voltage at TS is greater than VDIS(TS). The battery pack temperature monitoring is disabled in all devices by
connecting a 10-kΩ resistor from TS to VSS.
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The allowed temperature range for a 103AT-2 type thermistor is 0°C to 50°C. However, the user can increase
the range by adding two external resistors. See Figure 17 for the circuit. The values for Rs and Rp are calculated
using the following equations:
-(RTH + RTC ) ±
Rs =
Rp =
æ
ì
üö
VH ´ VC
2
´ (RTC - RTH )ý ÷
çç (RTH +RTC ) - 4 íRTH ´ RTC +
÷
(VH - VC ) ´ ITS
î
þø
è
2
(8)
VH ´ (R TH + RS )
ITS ´ (R TH + RS ) - VH
(9)
Where:
RTH: Thermistor Hot Trip Value found in thermistor data sheet
RTC: Thermistor Cold Trip Value found in thermistor data sheet
VH: IC's Hot Trip Threshold = 0.3V nominal
VC: IC's Cold Trip Threshold = 2.1V nominal
ITS: IC's Output Current Bias = 75µA nominal
NTC Thermsitor Semitec 103AT-4
Rs and Rp 1% values were chosen closest to calculated values
COLD TEMP RESISTANCE
AND TRIP THRESHOLD; Ω (°C)
HOT TEMP RESISTANCE AND
TRIP THRESHOLD; Ω (°C)
EXTERNAL BIAS RESISTOR,
RS (Ω)
EXTERNAL BIAS RESISTOR,
RP (Ω)
28000 (–0.6)
4000 (51)
0
∞
28480 (–1)
3536 (55)
487
845000
28480 (–1)
3021 (60)
1000
549000
33890 (–5)
4026 (51)
76.8
158000
33890 (–5)
3536 (55)
576
150000
33890 (–5)
3021 (60)
1100
140000
RHOT and RCOLD are the thermistor resistance at the desired hot and cold temperatures, respectively. The
temperature window cannot be tightened more than the thermistor connected to TS, it can only be extended.
INTC
bq2407x
TS
RS
+
PACK+
TEMP
VCOLD
RP
+
PACK-
VHOT
Figure 17. Extended TS Temperature Thresholds
22
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8.4 Device Functional Modes
8.4.1 Explanation of Deglitch Times and Comparator Hysteresis
Figures not to scale
VOVP
VOVP - Vhys(OVP)
VIN
Typical Input Voltage
Operating Range
t < tDGL(OVP)
VBAT + VIN(DT)
VBAT + VIN(DT) - Vhys(INDT)
UVLO
UVLO - Vhys(UVLO)
PGOOD
tDGL(PGOOD)
tDGL(OVP)
tDGL(NO-IN)
tDGL(PGOOD)
Figure 18. Power Up, Power Down
tDGL1(LOWV)
VBAT
VLOWV
t < tDGL1(LOWV)
tDGL1(LOWV)
tDGL2(LOWV)
ICHG
Fast-Charge
Fast-Charge
IPRE-CHG
t < tDGL2(LOWV)
Pre-Charge
Pre-Charge
Figure 19. Precharge to Fast-Charge, Fast- to Precharge Transition – tDGL1(LOWV), tDGL2(LOWV)
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Device Functional Modes (continued)
VBAT
VRCH
Re-Charge
t < tDGL(RCH)
tDGL(RCH)
Figure 20. Recharge – tDGL(RCH)
Turn
Q2 OFF
Force
Q2 ON
tREC(SC2)
Turn
Q2 OFF
tREC(SC2)
Force
Q2 ON
VBAT - VOUT
Recover
VO(SC2)
t < tDGL(SC2)
tDGL(SC2)
tDGL(SC2)
t < tDGL(SC2)
Figure 21. OUT Short-Circuit – Supplement Mode
VCOLD
VCOLD - Vhys(COLD)
t < tDGL(TS)
Suspend
Charging
tDGL(TS)
VTS
Resume
Charging
VHOT - Vhys(HOT)
VHOT
Figure 22. Battery Pack Temperature Sensing – TS Pin. Battery Temperature Increasing
24
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The bq2423xH devices power the system while simultaneously and independently charging the battery. The input
power source for charging the battery and running the system can be an AC adapter or a USB port. The devices
feature dynamic power-path management (DPPM), which shares the source current between the system and
battery charging and automatically reduces the charging current if the system load increases. When charging
from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current limit if the
input voltage falls below a threshold, preventing the USB port from crashing. The power-path architecture also
permits the battery to supplement the system current requirements when the adapter cannot deliver the peak
system currents.
The bq24232xH is configureable to be host controlled for selecting different input current limits based on the
input source connected, or a fully stand alone device for applications that do not support multiple types of input
sources.
9.2 Typical Application
VIN = VUVLO to VOVP , IFASTCHG = 200 mA, IIN(MAX) = 500 mA, Battery Temperature Charge Range 0°C to 50°C,
6.25-hour Fast Charge Safety Timer.
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Typical Application (continued)
R4
1.5 kΩ
R5
1.5 kΩ
Adaptor
DC+
IN
C HG
PGOOD
SYSTEM
OUT
C1
1μF
GND
C2
4.7μF
VSS
bq24232H
HOST
EN2
EN1
TS
TD
PACK -
R1
56.2 kΩ
ILIM
C3
4.7μF
ITERM
TEMP
PACK+
R2
2.94 kΩ
ISET
CE
BAT
R3
4.35 kΩ
Figure 23. Using the bq24230H in a Host-Controlled Charger Application
9.2.1 Design Requirements
•
•
•
•
•
•
26
Supply voltage = 5 V
Fast-charge current of approximately 200 mA; ISET - pin 16
Input Current Limit =500 mA; ILIM - pin 12
Termination Current = 25 mA - pin 15
Safety timer duration, Fast charge = 6.25 hours; TMR – pin 14
TS – Battery Temperature Sense = 10 kΩ NTC (103AT-2)
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Typical Application (continued)
9.2.2 Detailed Design Procedure
9.2.2.1 Calculations
9.2.2.1.1 Program the Fast-Charge Current (ISET):
RISET = KISET / ICHG
KISET = 870 AΩ from the electrical characteristics table.
RISET = 870 AΩ/0.2 A = 4.35 kΩ
Select the closest standard value, which for this case is 4.32 kΩ. Connect this resistor between ISET (pin 16)
and VSS.
9.2.2.1.2 Program the Input Current Limit (ILIM)
RILIM = KILIM / II_MAX
KILIM = 1530 AΩ from the electrical characteristics table.
RISET = 1530 AΩ / 0.5 A = 3.06 kΩ
Select the closest standard value, which for this case is 3.06 kΩ. Connect this resistor between ILIM (pin 12) and
VSS.
9.2.2.1.3 Program the Termination Current Threshold (ITERM)
RITERM = RISET × ITERM / KITERM
KITERM = 0.03 A from electrical characteristics table
RITERM = 4.32 kΩ × 0.025 A/0.03 A = 3.6 kΩ
Select the closest standard value, which for this case is 3.57 kΩ. Connect this resistor between ITERM (pin 15)
and VSS
9.2.2.1.4 Program 6.25-Hour Fast-Charge Safety Timer (TMR)
RTMR = tMAXCHG / (10 × KTMR )
KTMR = 40 s/kΩ from the electrical characteristics table.
RTMR = (6.25 hr × 3600 s/hr) / (10 × 40 s/kΩ) = 56.25 kΩ
Select the closest standard value, which for this case is 56.2 kΩ. Connect this resistor between TMR (pin 2) and
VSS.
9.2.2.2 TS Function
Use a 10-kΩ NTC thermistor in the battery pack (103AT). To disable the temperature sense function, use a fixed
10-kΩ resistor between the TS (pin 1) and VSS. Pay close attention to the linearity of the chosen NTC so that it
provides the desired hot and cold turnoff thresholds.
9.2.2.3
CHG and PGOOD
LED Status: connect a 1.5-kΩ resistor in series with a LED between OUT and CHG and OUT and PGOOD.
Processor Monitoring Status: connect a pullup resistor (approximately 100 kΩ) between the power rail of the
processor and CHG and PGOOD.
9.2.2.4 Selecting IN, OUT, AND BAT Pin Capacitors
In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin,
input, output, and battery pins. Using the values shown on the application diagram is recommended. After
evaluation of these voltage signals with real system operational conditions, the user can determine if capacitance
values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast,
high-amplitude, pulsed load applications.
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Typical Application (continued)
NOTE
If designed with high input voltage sources (bad adapters or wrong adapters), the
capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated
values so a 16-V capacitor may be adequate for a 30-V transient (verify tested rating with
capacitor manufacturer).
9.2.2.5 Sleep Mode
After entering sleep mode for >20 ms, the internal FET connection between the IN and OUT pin is disabled and
pulling the input to ground does not discharge the battery, other than the leakage on the BAT pin. If the user has
a full 1000-mAHr battery and the leakage is 10 μA, then it takes 1000 mAHr/10 μA = 100000 hours (11.4 years)
to discharge the battery. The self-discharge of the battery is typically five times higher.
spacer
9.2.3 Application Curves
28
Figure 24. Adapter Plug-In With Battery Connected
RLOAD = 25Ω
Figure 25. Battery Detection -- Insertion
Figure 26. Battery Detection -- Removal
Figure 27. Entering and Exiting DPPM Mode
RLOAD = 25 Ω to 9 Ω
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Typical Application (continued)
Figure 28. Entering And Exiting Battery Supplement Mode,
RLOAD = 25 Ω to 4.5 Ω
Figure 29. Charger On/Off Using CE
Figure 30. OVP FAULT, VIN = 6 V to 15 V
RLOAD = 25 Ω
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9.3 System Examples
9.3.1 Stand-Alone Charger
VIN = VUVLO to VOVP , IFASTCHG = 200 mA, IIN(MAX) = 500 mA, 25-mA Termination Current, ISET mode (EN1=0,
EN2=1), Battery Temperature Charge Range 0°C to 50°C, 6.25-hour Fast Charge Safety Timer.
R5
1.5 kΩ
R6
1.5 kΩ
Adaptor
DC+
IN
CH G
PGOOD
SYSTEM
OUT
C1
1 μF
GND
C2
4.7μF
VSS
bq24232H
EN 2
EN 1
TS
CE
BAT
R1
3.57 kΩ
IS E T
IT E R M
PACK -
IL IM
PACK +
TEMP
TMR
C3
4.7 μF
R2
2.94 kΩ
R4
56 .2 kΩ
R3
4 .32 kΩ
Figure 31. Using the bq24232H in a Stand-Alone Charger Application
The selection of components follows the Host-Controlled example above. The difference is that the EN1, EN2,
and CE pins are hardwired for the required settings. See Table 1 for the EN1 and EN2 settings.
30
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10 Power Supply Recommendations
10.1 Requirements for OUT Output
To provide an output voltage on SYS, the bq2423xH require either a power supply from 4.35 V to 6.0 V input for
bq24230H and from 4.35 V to 10 V for bq24232H to fully charge a battery.The supply must have at least 100 mA
current rating connected to IN; or, a single-cell Li-Ion battery with voltage > VBATUVLO connected to BAT. The
source current rating needs to be at least 1.5 A in order to provide maximum output current to SYS.
10.2 USB Sources and Standard AC Adapters
In order for charging to occur the source voltage measured at the IN terminals of the IC, factoring in cable/trace
losses from the source, must be greater than the VINDPM threshold (in USB mode), but less than the maximum
values shown above. The current rating of the source must be higher than the load requirements for OUT in the
application. For charging at a desired charge current of ICHRG, IIN > (ISYS+ ICHRG). The charger limits IIN to
the current limit setting of EN1/EN2.
10.3 Half-Wave Adapters
Some low-cost adapters implement a half rectifier topology, which causes the adapter output voltage to fall below
the battery voltage during part of the cycle. To enable operation with low-cost adapters under those conditions,
the bq2423xH family keeps the charger on for at least 20 ms (typical) after the input power puts the part in sleep
mode. This feature enables use of external low-cost adapters using 50-Hz networks.
11 Layout
11.1 Layout Guidelines
•
•
•
•
To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) must be placed as close as possible to the bq2423xH, with short
trace runs to both IN, OUT, and GND (thermal pad).
All low-current GND connections must be kept separate from the high-current charge or discharge paths from
the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
The high current charge paths into the IN pin and from the OUT pin must be sized appropriately for the
maximum charge current in order to avoid voltage drops in these traces.
The bq2423xH family is packaged in a thermally enhanced MLP package. The package includes a thermal
pad to provide an effective thermal contact between the IC and the printed-circuit board (PCB); this thermal
pad is also the main ground connection for the device. Connect the thermal pad to the PCB ground
connection. Full PCB design guidelines for this package are provided in the application report entitled:
QFN/SON PCB Attachment (SLUA271).
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11.2 Layout Example
Figure 32. Layout Example
32
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11.3 Thermal Package
The bq2423xH is packaged in a thermally enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed-circuit board (PCB). The power pad must be
directly connected to the Vss pin. Full PCB design guidelines for this package are provided in the application
report entitled: QFN/SON PCB Attachment (SLUA271). The most common measure of package thermal
performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air surrounding the
package surface (ambient). The mathematical expression for θJA is:
θJA = (TJ - T) / P
Where:
TJ = chip junction temperature
T = ambient temperature
P = device power dissipation
Factors that can greatly influence the measurement and calculation of θJA include:
•
•
•
•
•
Whether the device is board mounted
Trace size, composition, thickness, and geometry
Orientation of the device (horizontal or vertical)
Volume of the ambient air surrounding the device under test and airflow
Whether other surfaces are in close proximity to the device being tested
Due to the charge profile of Li-ion batteries, the maximum power dissipation is typically seen at the beginning of
the charge cycle when the battery voltage is at its lowest. Typically, after fast charge begins, the pack voltage
increases to approximately 3.4 V within the first 2 minutes. The thermal time constant of the assembly typically
takes a few minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum
voltage to use. This is easy to verify, with the system and a fully discharged battery, by plotting temperature on
the bottom of the PCB under the IC (pad must have multiple vias), the charge current and the battery voltage as
a function of time. The fast-charge current starts to taper off if the part goes into thermal regulation.
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged :
P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT)
The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is
recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage
and nominal ambient temperatures) and use the feature for nontypical situations such as hot environments or
higher than normal input source voltage. With that said, the IC still performs as described, if the thermal loop is
always active.
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
•
QFN/SON PCB Attachment, SLUA271
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 4. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
bq24230H
Click here
Click here
Click here
Click here
Click here
bq24232H
Click here
Click here
Click here
Click here
Click here
12.3 Trademarks
Bluetooth is a registered trademark of Bluetooth SIG, Inc.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
34
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
BQ24232HRGTR
ACTIVE
VQFN
RGT
16
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
24232H
BQ24232HRGTT
ACTIVE
VQFN
RGT
16
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
24232H
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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