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bq24314, bq24316
SLUS763D – JULY 2007 – REVISED APRIL 2016
bq2431x Overvoltage and Overcurrent Protection IC and
Li+ Charger Front-End Protection IC
1 Features
3 Description
•
The bq24314 and bq24316 devices are highly
integrated circuits designed to provide protection to
Li-ion batteries from failures of the charging circuit.
The IC continuously monitors the input voltage, the
input current, and the battery voltage. In case of an
input overvoltage condition, the IC immediately
removes power from the charging circuit by turning
off an internal switch. In the case of an overcurrent
condition, it limits the system current at the threshold
value, and if the overcurrent persists, switches the
pass element OFF after a blanking period.
Additionally, the IC also monitors its own die
temperature and switches off if it becomes too hot.
The
input
overcurrent
threshold
is
userprogrammable.
1
•
•
•
•
•
•
•
Provides Protection for Three Variables:
– Input Overvoltage, With Rapid Response in
< 1 μs
– User-Programmable Overcurrent With Current
Limiting
– Battery Overvoltage
30-V Maximum Input Voltage
Supports up to 1.5-A Input Current
Robust Against False Triggering Due to Current
Transients
Thermal Shutdown
Enable Input
Status Indication – Fault Condition
Available in Space-Saving Small 8-Pin 2 × 2 SON
and 12-Pin 4 × 3 SON Packages
The IC can be controlled by a processor and also
provides status information about fault conditions to
the host.
Device Information
2 Applications
•
•
•
•
•
PART NUMBER
Mobile Phones and Smart Phones
PDAs
MP3 Players
Low-Power Handheld Devices
Bluetooth™ Headsets
bq24314
bq24316
PACKAGE
(1)
BODY SIZE (NOM)
WSON (8)
2.00 mm × 2.00 mm
VSON (8)
3.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Application Schematic
AC Adapter
VDC
1 IN
OUT 8
1 mF
1 mF
GND
bq24080
Charger IC
bq24316DSG
SYSTEM
VBAT 6
VSS
ILIM
FAULT 4
2
7
CE 5
Copyright © 2016 Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq24314, bq24316
SLUS763D – JULY 2007 – REVISED APRIL 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
5
6
7
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ................................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................. 10
7.4 Device Functional Modes........................................ 12
8
Applications and Implementation ...................... 14
8.1 Application Information............................................ 14
8.2 Typical Application .................................................. 14
9
Power Supply Recommendations...................... 18
9.1 Powering Accessories............................................. 18
10 Layout................................................................... 19
10.1 Layout Guidelines ................................................. 19
10.2 Layout Example .................................................... 19
11 Device and Documentation Support ................. 20
11.1
11.2
11.3
11.4
11.5
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
20
12 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (October 2007) to Revision D
Page
•
Added Device Information table, ESD Rating table, Thermal Information table, Timing Requirements table, Overview
section, Feature Description, Device Functional Modes section, Application and Implementations section, Power
Supply Recommendations section, Layout section, Device Documentation Support, and Mechanical, Packaging,
and Orderable Information sections ....................................................................................................................................... 1
•
Replaced the ORDERING INFORMATION table with the Device Information table ............................................................ 1
Changes from Revision B (September 2007) to Revision C
•
Page
Changed the MARKING column of the ORDERING INFORMATION table .......................................................................... 1
Changes from Revision A (September 2007) to Revision B
Page
•
Changed Electrical Characteristics: operating current typ value from 500 μA to 400 μA ...................................................... 5
•
Changed Electrical Characteristics: bq24314 input overvoltage protection threshold min value from 5.67 V to 5.71 V. ..... 5
2
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SLUS763D – JULY 2007 – REVISED APRIL 2016
5 Pin Configuration and Functions
DSG Package
8-Pin WSON
Top View
DSJ Package
8-Pin VSON
Top View
IN
1
8
OUT
VSS
2
7
ILIM
NC
3
6
VBAT
FAULT
4
5
CE
Thermal
Pad
IN
1
12
NC
IN
2
11
OUT
VSS
3
10
OUT
FAULT
4
9
ILIM
NC
5
8
VBAT
NC
6
7
CE
Thermal
Pad
Pin Functions
PIN
NAME
I/O
DESCRIPTION
VSON
WSON
CE
7
5
I
Chip enable input. Active low. When CE = High, the input FET is off. Internally pulled down.
FAULT
4
4
O
Open-drain output, device status. FAULT = Low indicates that the input FET Q1 has been
turned off due to input overvoltage, input overcurrent, battery overvoltage, or thermal shutdown.
ILIM
9
7
I/O
Input overcurrent threshold programming. Connect a resistor to VSS to set the overcurrent
threshold.
IN
1, 2
1
I
NC
5, 6, 12
3
—
These pins may have internal circuits used for test purposes. Do not make any external
connections at these pins for normal operation.
OUT
10, 11
8
O
Output terminal to the charging system. Connect external 1-μF ceramic capacitor (minimum) to
VSS.
Thermal
PAD
—
—
—
There is an internal electrical connection between the exposed thermal pad and the VSS pin of
the device. The thermal pad must be connected to the same potential as the VSS pin on the
printed-circuit board. Do not use the thermal pad as the primary ground input for the device.
The VSS pin must be connected to ground at all times.
VBAT
8
6
I
VSS
3
2
—
Input power, connect to external DC supply. Connect external 1-μF ceramic capacitor
(minimum) to VSS. For the 12-pin (DSJ-suffix) device, ensure that pins 1 and 2 are connected
together on the PCB at the device.
Battery voltage sense input. Connect to pack positive terminal through a resistor.
Ground terminal
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Input voltage
MIN
MAX
IN (with respect to VSS)
–0.3
30
OUT (with respect to VSS)
–0.3
12
ILIM, FAULT, CE, VBAT (with respect to VSS)
–0.3
7
UNIT
V
Input current
IN
2
A
Output current
OUT
2
A
Output sink current
FAULT
15
mA
Junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
3.3
26
V
Input current, IN pin
1.5
A
Output current, OUT pin
1.5
A
15
90
kΩ
0
125
°C
VIN
Input voltage
IIN
IOUT
RILIM
OCP programming resistor
TJ
Junction temperature
UNIT
6.4 Thermal Information
bq24314, bq24316
THERMAL METRIC (1)
DSG (WSON)
DSJ (VSON)
8 PINS
12 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
58.6
49.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
67.9
60.1
°C/W
RθJB
Junction-to-board thermal resistance
29.7
24.9
°C/W
ψJT
Junction-to-top characterization parameter
1.2
2.4
°C/W
ψJB
Junction-to-board characterization parameter
30.3
24.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
7.6
11.9
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.5 Electrical Characteristics
over junction temperature range –40°C to 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IN
UVLO
Undervoltage lockout, input power
detected threshold
CE = Low, VIN increasing from 0 V to 3 V
2.6
2.7
2.8
V
VHYS-UVLO
Hysteresis on UVLO
CE = Low, VIN decreasing from 3 V to 0 V
200
260
300
mV
TDGL(PGOOD)
Deglitch time, input power detected
status
CE = Low. Time measured from VIN 0 V → 5 V,
1-µs rise-time, to output turning ON
IDD
Operating current
CE = Low, No load on OUT pin,
VIN = 5 V, RILIM = 25 kΩ
ISTDBY
Standby current
CE = High, VIN = 5 V
8
ms
400
600
μA
65
95
μA
170
280
mV
5.71
5.85
6
6.6
6.8
7
25
60
110
mV
1500
mA
mA
INPUT TO OUTPUT CHARACTERISTICS
VDO
Drop-out voltage IN to OUT
CE = Low, VIN = 5 V, IOUT = 1 A
INPUT OVERVOLTAGE PROTECTION
VOVP
Input overvoltage
protection threshold
VHYS-OVP
Hysteresis on OVP
bq24314
CE = Low, VIN increasing from 5 V to 7.5 V
bq24316
CE = Low, VIN decreasing from 7.5 V to 5 V
V
V
INPUT OVERCURRENT PROTECTION
IOCP
Input overcurrent protection threshold
range
IOCP
Input overcurrent protection threshold
300
CE = Low, RILIM = 25 kΩ,
930
1000
1070
BATTERY OVERVOLTAGE PROTECTION
BVOVP
Battery overvoltage protection
threshold
CE = Low, VIN > 4.4 V
4.30
4.35
4.4
V
VHYS-BOVP
Hysteresis on BVOVP
CE = Low, VIN > 4.4 V
200
275
320
mV
IVBAT
Input bias current on
VBAT pin
DSG Package
VBAT = 4.4 V, TJ = 25°C
10
DSJ Package
VBAT = 4.4 V, TJ = 85°C
10
nA
THERMAL PROTECTION
TJ(OFF)
Thermal shutdown temperature
TJ(OFF-HYS)
Thermal shutdown hysteresis
140
150
20
°C
°C
LOGIC LEVELS ON CE
VIL
Low-level input voltage
0
0.4
V
VIH
High-level input voltage
IIL
Low-level input current
VCE = 0 V
1
μA
IIH
High-level input current
VCE = 1.8 V
15
μA
1.4
V
LOGIC LEVELS ON FAULT
VOL
Output low voltage
ISINK = 5 mA
0.2
V
IHI-Z
Leakage current, FAULT pin HI-Z
VFAULT = 5 V
10
μA
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6.6 Timing Requirements
MIN
NOM
MAX
UNIT
IN
tDGL(PGOOD)
CE = Low. Time measured from VIN 0 V
→ 5 V, 1-μs rise-time,
to output turning ON
Deglitch time, input power
detected status
8
ms
INPUT OVERVOLTAGE PROTECTION
tPD(OVP)
Input OV propagation delay (1)
CE = Low
tON(OVP)
Recovery time from input
overvoltage condition
CE = Low, Time measured from
VIN 7.5 V → 5 V, 1-μs fall-time
1
μs
8
ms
176
μs
64
ms
176
μs
INPUT OVERCURRENT PROTECTION
tBLANK(OCP)
Blanking time, input overcurrent detected
tREC(OCP)
Recovery time from input overcurrent condition
BATTERY OVERVOLTAGE PROTECTION
tDGL(BOVP)
(1)
6
CE = Low, VIN > 4.4 V. Time measured
from VVBAT rising from 4.1 V to 4.4 V to
FAULT going low.
Deglitch time, battery overvoltage
detected
Not tested in production. Specified by design.
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6.7 Typical Characteristics
Test conditions (unless otherwise noted) for typical operating performance: VIN = 5 V, CIN = 1 μF, COUT = 1 μF,
RILIM = 25 kΩ, RBAT = 100 kΩ, TA = 25°C, VPU = 3.3 V (see Figure 11 for the Typical Application Circuit)
280
2.75
260
2.7
VIN Increasing
240
VIN = 4 V
220
VDO @ 1A - mV
VUVLO, VHYS-UVLO - V
2.65
2.6
2.55
200
VIN = 5 V
180
160
2.5
140
VIN Decreasing
2.45
2.4
-50
120
100
-30
-10
10
30
50
70
Temperature - °C
90
110
0
130
50
100
150
Temperature - °C
Figure 1. Undervoltage Lockout vs Free-Air Temperature
Figure 2. Dropout Voltage (IN to OUT) vs Free-Air
Temperature
5.88
6.82
6.8
5.86
6.78
VOVP, VHYS-OVP - V
VOVP, VHYS-OVP - V
VIN Increasing
6.76
6.74
5.84
VIN Increasing
5.82
VIN Decreasing
5.8
6.72
6.7
-50
VIN Decreasing
-30
-10
10
30
50
70
Temperature - °C
90
110
5.78
-50
130
-30
-10
10
30
50
70
90
110
130
Temperature - °C
Figure 3. Overvoltage Threshold Protection (bq24316) vs
Free-Air Temperature
Figure 4. Overvoltage Threshold Protection (bq24314) vs
Free-Air Temperature
985
1600
984
1400
983
1200
982
IOCP - mA
IOCP - mA
1000
800
981
980
979
600
978
400
977
200
0
0
976
10
20
30
40
50
60
RILIM - kW
70
80
90
100
Figure 5. Input Overcurrent Protection vs ILIM Resistance
975
-50
-30
-10
10
30
50
70
Temperature - °C
90
110
130
Figure 6. Input Overcurrent Protection vs Free-Air
Temperature
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Typical Characteristics (continued)
4.4
2.5
4.35
BVOVP (VVBAT Increasing)
2
1.5
4.25
IVBAT - nA
BVOVP - V
4.3
4.2
1
4.15
0.5
4.1
4.05
-50
Bat-OVP Recovery (VVBAT Decreasing)
-30
-10
10
30
50
70
Temperature - °C
90
110
0
-50
130
Figure 7. Battery Overvoltage Protection vs Free-Air
Temperature
-30
-10
10
30
50
70
Temperature - °C
90
110
130
Figure 8. Leakage Current (VBAT Pin) vs Free-Air
Temperature
900
800
IDD (CE = Low)
IDD, ISTDBY - mA
700
600
500
400
300
200
ISTDBY (CE = High)
100
0
0
5
10
15
20
25
30
35
VIN - V
Figure 9. Supply Current (bq24314) vs Input Voltage
8
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7 Detailed Description
7.1 Overview
The bq24314 and bq24316 devices monitor the input voltage, input current, and the battery voltage to protect the
charging system of a Li-Ion battery. The protection features can be enabled through the /CE pin.
When enabled, the system is protected against input overvoltage by turning off an internal switch, immediately
removing power from the charging circuit. The system is protected against an overcurrent condition by limiting
the input current to a safe value for a blanking duration before disconnecting the input from the output by turning
the switch off. The overcurrent threshold is user-programmable. Additionally, the device also monitors its own die
temperature and switches off if it becomes too hot.
7.2 Functional Block Diagram
Q1
IN
Charge Pump,
Bandgap,
Bias Gen
OUT
VBG
ISNS
ILIM
Current limiting
loop
ILIMREF
OFF
OCP comparator
ILIMREF - Δ
t BLANK(OCP)
ISNS
FAULT
VIN
VBG
COUNTERS,
CONTROL,
AND STATUS
OVP
VIN
CE
VBG
t DGL(PGOOD)
UVLO
VBAT
THERMAL
SHUTDOW
VSS
VBG
t DGL(BOVP)
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7.3 Feature Description
7.3.1 Power Down
The device remains in power-down mode when the input voltage at the IN pin is below the undervoltage
threshold VUVLO. The FET Q1 connected between IN and OUT pins is off, and the status output, FAULT, is set to
Hi-Z.
7.3.2 Power-On Reset
The device resets when the input voltage at the IN pin exceeds the UVLO threshold. All internal counters and
other circuit blocks are reset. The IC then waits for duration tDGL(PGOOD) for the input voltage to stabilize. If, after
tDGL(PGOOD), the input voltage and battery voltage are safe, FET Q1 is turned ON. The IC has a soft-start feature
to control the inrush current. The soft-start minimizes the ringing at the input (the ringing occurs because the
parasitic inductance of the adapter cable and the input bypass capacitor form a resonant circuit). Figure 12
shows the power-up behavior of the device. Because of the deglitch time at power-on, if the input voltage rises
rapidly to beyond the OVP threshold, the device will not switch on at all, instead it will go into protection mode
and indicate a fault on the FAULT pin, as shown in Figure 13.
7.3.3 Operation
The device continuously monitors the input voltage, the input current, and the battery voltage as described in
detail in the following sections.
7.3.3.1 Input Overvoltage Protection
If the input voltage rises above VOVP, the internal FET Q1 is turned off, removing power from the circuit. As
shown in Figure 14 to Figure 17, the response is very rapid, with the FET turning off in less than a microsecond.
The FAULT pin is driven low. When the input voltage returns below VOVP – VHYS-OVP (but is still above VUVLO), the
FET Q1 is turned on again after a deglitch time of tON(OVP) to ensure that the input supply has stabilized.
Figure 18 shows the recovery from input OVP.
7.3.3.2 Input Overcurrent Protection
The overcurrent threshold is programmed by a resistor RILIM connected from the ILIM pin to VSS. Figure 5 shows
the OCP threshold as a function of RILIM, and may be approximated by Equation 1:
IOCP = 25 ÷ RILIM
where
•
•
current is in A
and resistance is in kΩ
(1)
If the load current tries to exceed the IOCP threshold, the device limits the current for a blanking duration of
tBLANK(OCP). If the load current returns to less than IOCP before tBLANK(OCP) times out, the device continues to
operate. However, if the overcurrent situation persists for tBLANK(OCP), the FET Q1 is turned off for a duration of
tREC(OCP), and the FAULT pin is driven low. The FET is then turned on again after tREC(OCP) and the current is
monitored all over again. Each time an OCP fault occurs, an internal counter is incremented. If 15 OCP faults
occur in one charge cycle, the FET is turned off permanently. The counter is cleared either by removing and reapplying input power, or by disabling and re-enabling the device with the CE pin. Figure 19 to Figure 21 show
what happens in an overcurrent fault.
To prevent the input voltage from spiking up due to the inductance of the input cable, Q1 is turned off slowly,
resulting in a soft-stop, as shown in Figure 21.
7.3.3.3 Battery Overvoltage Protection
The battery overvoltage threshold BVOVP is internally set to 4.35 V. If the battery voltage exceeds the BVOVP
threshold, the FET Q1 is turned off, and the FAULT pin is driven low. The FET is turned back on once the battery
voltage drops to BVOVP – VHYS-BOVP (see Figure 22 and Figure 23). Each time a battery overvoltage fault occurs,
an internal counter is incremented. If 15 such faults occur in one charge cycle, the FET is turned off permanently.
The counter is cleared either by removing and re-applying input power, or by disabling and re-enabling the
device with the CE pin. In the case of a battery overvoltage fault, Q1 is switched OFF gradually (see Figure 22).
10
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Feature Description (continued)
7.3.3.4 Thermal Protection
If the junction temperature of the device exceeds TJ(OFF), the FET Q1 is turned off, and the FAULT pin is driven
low. The FET is turned back on when the junction temperature falls below TJ(OFF) – TJ(OFF-HYS).
7.3.3.5 Enable Function
The IC has an enable pin which can be used to enable or disable the device. When the CE pin is driven high, the
internal FET is turned off. When the CE pin is low, the FET is turned on if other conditions are safe. The OCP
counter and the Bat-OVP counter are both reset when the device is disabled and re-enabled. The CE pin has an
internal pulldown resistor and can be left floating.
NOTE
The FAULT pin functionality is also disabled when the CE pin is high.
7.3.3.6 Fault Indication
The FAULT pin is an active-low open-drain output. It is in a high-impedance state when operating conditions are
safe, or when the device is disabled by setting CE high. With CE low, the FAULT pin goes low whenever any of
these events occurs:
• Input overvoltage
• Input overcurrent
• Battery overvoltage
• IC Overtemperature
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Feature Description (continued)
Power Down
All IC functions OFF
FAULT = HiZ
V(IN) > V(UVLO) ?
Any State
if V(IN) < V (UVLO),
go to Power Down
No
Any State
if CE = Hi,
go to Reset
Yes
Reset
Timers reset
Counters reset
FAULT = HiZ
FET off
No
CE = Low ?
V(IN) < V(OVP) ?
No
Turn off FET
FAULT = Low
No
CE = Hi ?
Yes
Go to Reset
Yes
No
I < IOCP ?
No
Turn off FET
FAULT = Low
Incr OCP counter
Wait tREC(OCP)
count VUVLO – VHYS-UVLO + RDSON × IACCESSORY.
Within this voltage range, the reverse current capability is the same as the forward capability, 1.5 A.
NOTE
There is no overcurrent protection in this direction.
18
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Powering Accessories (continued)
IN
Q1
OUT
VOUT
Charge Pump,
Bandgap,
Bias Gen
Figure 26. Powering an Accessory – Internal Power Path
10 Layout
10.1 Layout Guidelines
•
•
•
This device is a protection device, and is meant to protect down-stream circuitry from hazardous voltages.
Potentially, high voltages may be applied to this IC. It has to be ensured that the edge-to-edge clearances of
PCB traces satisfy the design rules for high voltages.
The device uses SON packages with a PowerPAD™. For good thermal performance, the PowerPAD must be
thermally coupled with the PCB ground plane. In most applications, this will require a copper pad directly
under the IC. This copper pad must be connected to the ground plane with an array of thermal vias.
CIN and COUT must be located close to the IC. Other components like RILIM and RBAT should also be located
close to the IC.
10.2 Layout Example
VBAT
VIN
GND
GND
BAT+
GND
VOUT
To GATE of FET
Figure 27. Recommended Layout
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Product Folder Links: bq24314 bq24316
19
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SLUS763D – JULY 2007 – REVISED APRIL 2016
www.ti.com
11 Device and Documentation Support
11.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
bq24314
Click here
Click here
Click here
Click here
Click here
bq24316
Click here
Click here
Click here
Click here
Click here
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
PowerPAD, E2E are trademarks of Texas Instruments.
Bluetooth is a trademark of Bluetooth SIG, Inc.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
20
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Copyright © 2007–2016, Texas Instruments Incorporated
Product Folder Links: bq24314 bq24316
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
BQ24314DSGR
ACTIVE
WSON
DSG
8
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
CBV
Samples
BQ24314DSGT
ACTIVE
WSON
DSG
8
250
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
CBV
Samples
BQ24316DSGR
ACTIVE
WSON
DSG
8
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
CBW
Samples
BQ24316DSGT
ACTIVE
WSON
DSG
8
250
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
CBW
Samples
BQ24316DSJR
ACTIVE
VSON
DSJ
12
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BZC
Samples
BQ24316DSJT
ACTIVE
VSON
DSJ
12
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BZC
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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