User's Guide
SLUU365 – June 2009
bq2435x DSG EVM for Li-Ion Charger Front-End
Protection IC
This user's guide describes the features, setup, and operation of the bq2435xEVM evaluation module.
Included are the bill of materials, board layout, and schematic.
1
2
3
4
Contents
Introduction ................................................................................................................... 2
1.1
General Description ................................................................................................ 2
1.2
EVM Features ....................................................................................................... 2
1.3
I/O Description ...................................................................................................... 2
1.4
Controls and Key Parameters Setting............................................................................ 2
1.5
Recommended Operating Conditions ............................................................................ 3
Test Summary ................................................................................................................ 3
2.1
Definitions ............................................................................................................ 3
2.2
Equipment ........................................................................................................... 3
2.3
Equipment Setup.................................................................................................... 4
2.4
Procedure ............................................................................................................ 5
PCB Layout Guideline ....................................................................................................... 6
Bill of Materials, Board Layout, and Schematic .......................................................................... 6
4.1
Bill of Materials ...................................................................................................... 6
4.2
Board Layout ........................................................................................................ 7
4.3
Schematic .......................................................................................................... 10
List of Figures
1
2
3
4
5
6
Original Test Setup for HPA398 (bq2435x DSG EVM) ................................................................. 5
Top Layer ..................................................................................................................... 7
Bottom Layer ................................................................................................................. 8
Top Silk Screen .............................................................................................................. 8
Top Assembly ................................................................................................................ 9
bq243550 Schematic ...................................................................................................... 10
List of Tables
1
Bill of Materials ............................................................................................................... 6
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1
Introduction
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1
Introduction
1.1
General Description
The bq2435x evaluation module (EVM) is a complete charger module for evaluating a charger front-end
protection and charger solution using the bq2435x and bq2057C devices. It is designed to deliver up to
560 mA of charge current to Li-ion or Li-polymer applications. The charger front-end protection current is
designed to 1.2 A.
The bq2435x protects the charging system against three types of failures: input overvoltage when the ac
adapter fails to regulate its voltage, load overcurrent when failures such as a short circuit occur in the
charging system, and battery overcharge.
For details, see the bq2435x data sheet (SLUS943).
1.2
EVM Features
•
•
•
•
•
•
•
•
•
•
1.3
1.4
I/O Description
Jack
Description
J1–DC+
AC adapter, positive output
J1–DC–
AC adapter, negative output, ground
J2–FAULT
bq24355 FAULT pin
J2–VBAT
bq2435x VBAT pin
J2–GATDRV
bq2435x GATDRV pin
J2–CHGIN
bq2435x CHGIN pin
J3–BATEN
bq24355 BATEN pin
J3–OUT
bq2435x OUT pin
J3–BAT+
Battery positive output
J3–GND
Ground
J4–BAT+
Connect to battery positive output
J4–BAT–
Connect to battery negative output, ground
Controls and Key Parameters Setting
Jack (1)
Description
Factory Setting
JP1
If on, high-side current sensing resistor is disabled
Jumper on
JP2
bq24355 BATEN pin logic input, pull low to enable
Jumper (BATEN, GND) on
JP3
bq2435x GATDRV pin
Jumper off
JP4
bq2057C BAT pin connection to bq2435x
Jumper on
(1)
2
Evaluation module for bq2435x DSG
Evaluation module for bq2057C charger integrated circuit (IC)
Input operating range for bq2435x 4.5 V–26 V
Input operating range for bq24080 4.5 V–6.5 V
Input overvoltage protection.
Input overcurrent protection.
Battery overvoltage protection.
LED Indication for status signals.
Test points for key signals available for testing purpose. Easy probe hook-up
Jumpers available. Easy to change connections
Short JP1, JP4, JP5, and JP6, and disconnect JP7 to use on board bq2057C as charger; to use external charger to control
bq2435x, disconnect JP1, JP4, JP5, and JP6 and short JP7.
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Test Summary
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1.5
Jack (1)
Description
Factory Setting
JP5
bq2057C VCC pin connection to bq2435x
Jumper on
JP6
bq2057C CC pin connection to bq2435x
Jumper on
JP7
If on, low-side current sensing resistor is disabled
Jumper off
Recommended Operating Conditions
Symbol
Description
Minim
um
Supply voltage, VIN
Input voltage from ac adapter input
Battery voltage, VBAT
Voltage applied at VBAT terminal of J4
Supply current, IAC
Maximum input current from ac adapter input
0
Charge current, Ichrg
Battery charge current
Test Summary
2.1
Definitions
Maxim
um
Unit
4.5
5
26
V
0
3–4.2
5
V
1.5
A
0.05
Operating junction temperature
range, TJ
2
Typical
0.56
0
1
A
125
°C
This procedure details how to configure the evaluation board. On the test procedure, the following naming
conventions are followed. See the schematic for details.
VXXX
External voltage supply name (VIN, VBAT, VOUT)
LOADW:
External load name (LOADR, LOADI)
V(TPyyy) :
Voltage at internal test point TPyyy. For example, V(TP1) means the voltage at
TP1.
V(Jxx):
Voltage at jack terminal Jxx.
V(TP(XXXXX)):
Voltage at test point “XXXXX”. For example, V(ACDET) means the voltage at
the test point which is marked as “ACDET”.
V(XXX, YYY):
Voltage across point XXX and YYY.
I(JXX(YYY)):
Current going out from the YYY terminal of jack XX.
Jxx(BBB):
Terminal or pin BBB of jack xx
Jxx ON :
Internal jumper Jxx terminals are shorted
Jxx OFF:
Internal jumper Jxx terminals are open
Jxx (-YY-) ON:
Internal jumper Jxx adjacent terminals marked as “YY” are shorted
Measure:→ A,B
Check specified parameters A, B. If measured values are not within specified
limits the unit under test has failed.
Observe → A,B
Observe if A, B occur. If they do not occur, the unit under test has failed.
Assembly drawings have location for jumpers, test points and individual components
2.2
2.2.1
Equipment
Power Supplies
Power Supply 1 (PS 1): a power supply capable of supplying 10 V at 2 A is required.
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Test Summary
2.2.2
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Load 1
A 10-V (or above), 2-A (or above) electronic load that can operate at constant current mode.
2.2.3
Load 2
A 10-V (or above), 2-A (or above) electronic load that can operate at constant voltage mode.
2.2.4
Meters
Four Fluke 75 multimeters (equivalent or better)
Or:
Three equivalent voltage meters and one equivalent current meter
The current meter must be capable of measuring 2-A+ current.
2.2.5
Wire Gauge
All wires connected to the EVM input power supply and output load must use at least AWG 22. The
maximum current is up to 1 A.
2.3
Equipment Setup
1.
2.
3.
4.
5.
6.
7.
8.
Set the PS 1 for 0 V ±100 mVdc, 2 ± 0.1 A current limit, and then disable the output.
Connect the output of PS 1 to J1 (DC+, DC–).
Connect a voltage meter across J1 (DC+, DC–).
Connect the output of the Load 1 in series with a current meter (multimeter) to J2 (CHGIN) and J3
(GND). Turn on the power of the Load 1. Set the load current to 1.5 A ±50 mA but disable the output.
Connect output of the Load 2 in series with a current meter (multimeter) to J4 (BAT+, BAT–).
Connect a voltage meter across J4 (BAT+, BAT–).
Set the voltage of Load 2 to 3.6 V ±0.1 V, and disable output of Load 2.
JP1: ON, JP2 (BATEN, GND): ON, JP3: OFF, JP4: ON, JP5: ON, JP6: ON, JP7: OFF.
After the preceding steps have been taken, the test setup for HPA398 (bq2435x DSG EVM) appears as is
shown in Figure 1.
4
bq2435x DSG EVM for Li-Ion Charger Front-End Protection IC
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Test Summary
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HPA398 bq2435xEVM
JP7
J1
Power
Supply 1
V
J4
JP1
BAT-
DCDC+
V
BAT+
U1
Ibat
CFET APPLICATION
CIRCUIT
I
Load
2
JP6 JP5 JP4
JP3 JP2
FAULT
VBAT
GATDRV
CHGIN
BATEN
OUT
BAT+
GND
U2
J2
J3
I
I
Load
1
Figure 1. Original Test Setup for HPA398 (bq2435x DSG EVM)
2.4
Procedure
2.4.1
1.
2.
3.
4.
Charger Current and Voltage Regulation
Ensure that steps in Section 2.3 are followed.
Enable output of PS 1.
Increase the output voltage of PS 1 to 5 V ±0.1 V.
Enable output of Load 2.
Measure → V(J2(OUT)) = 3.6 V ±200 mV
Measure → Ibat = 560 mA ±70 mA
Observe → D2 on, D3 on, D6 off, D7 on.
2.4.2
CFET Input Overvoltage Protection
1. Increase the voltage of PS 1 to 8 V ±0.1 V.
Observe → D2 on, D3 off, D6 off, D7 off.
2. Decrease the voltage of PS 1 to 5 V ±0.1 V.
Observe → D2 on, D3 on, D6off, D7 on.
2.4.3
CFET Load Overcurrent Protection
1. Enable the output of the Load 1.
Observe → D2 on, D3 off, D6 off, D7 off.
2. Disable the output of the Load 1.
Observe → D2 on, D3 on, D6 off, D7 on.
3. Decrease the voltage of PS 1 to 0 V ±0.1 V.
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PCB Layout Guideline
3
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PCB Layout Guideline
1. It is critical that the exposed power pad on the backside of the bq2435x package be soldered to the
printed-circuit board (PCB) ground. Ensure that sufficient thermal vias are located underneath the IC,
connecting to the ground plane on the other layers.
2. The high-current charge paths into ACIN and from CHGIN, OUT pins must be sized appropriately for
the maximum charge current in order to avoid voltage drops in these traces.
3. Decoupling capacitors for ACIN, CHGIN must be placed and make the interconnections to the IC as
short as possible.
4. Resistors for VBAT pin must be placed close to the corresponding IC pins and make the
interconnections to the IC as short as possible.
4
Bill of Materials, Board Layout, and Schematic
4.1
Bill of Materials
Table 1. Bill of Materials
6
bq24350
-001
bq24352 002
bq24355 003
RefDes
Value
Description
Size
Part Number
MFR
1
1
1
C1
1uF
Capacitor, Ceramic, 35V,
X5R, 10%
603
Std
Std
3
3
3
C2, C3, C5
1uF
Capacitor, Ceramic, 10V,
X7R, 10%
603
Std
Std
1
1
1
C4
0.1uF
Capacitor, Ceramic, 16V,
X7R, 10%
805
Std
Std
1
1
1
C6
0.1uF
Capacitor, Ceramic, 10V,
X7R, 10%
603
Std
Std
1
1
1
C7
220uF
Capacitor, Electrolytic, 25V,
20%
0.327 X 0.327
inch
UUD1E221MNL1GS
Nichicon
1
1
1
D1
BZT52C6V8S Diode, Zener, 200mW, 6.8V
SOD-323
BZT52C6V8S
General
3
3
3
D2, D3, D6
Green
Diode, LED, Green, 2.1-V,
20-mA, 6-mcd
603
LTST-C190GKT
Lite On
2
2
2
D4, D7
Red
Diode, LED, Red, 2.1-V,
20-mA, 6-mcd
603
LTST-C190CKT
Lite On
1
1
1
D5
BAT54C
Diode, Dual Schottky,
200-mA, 30-V
SOT23
BAT54C
VishayLiteon
2
2
2
J1, J4
ED1514/2DS
Terminal Block, 2-pin, 6-A,
3.5mm
0.27 x 0.25
inch
ED1514/2DS
OST
2
2
2
J2, J3
ED1516/4DS
Terminal Block, 4-pin, 6-A,
3.5mm
0.55 x 0.25
inch
ED1516/4DS
OST
5
5
5
JP1, JP4,
JP5, JP6,
JP7
PEC02SAAN
Header, 2-pin, 100mil
spacing
0.100 inch x 2
PEC02SAAN
Sullins
2
2
2
JP2, JP3
PTC03SAAN
Header, Male 3-pin, 100mil
spacing, (36-pin strip)
0.100 inch x 3
PTC03SAAN
Sullins
5
5
5
JP1, JP2,
JP4, JP5,
JP6
929950-00
Shorting jumpers, 2-pin,
100mil spacing,
929950-00
3M/ESD
2
2
0
R1, R2
0
Resistor, Chip, 1/16W, 1%
402
Std
Std
0
0
2
R3, R4
0
Resistor, Chip, 1/16W, 1%
402
Std
Std
2
2
2
R5, R6
200k
Resistor, Chip, 1/16W, 5%
402
Std
Std
2
2
2
R7, R8
200k
Resistor, Chip, 1/16-W, 5%
603
Std
Std
2
2
2
R9, R10
0.2
Resistor, Metal Film, 1/4 watt, 1206
1%
Std
Std
1
1
1
R11
20k
Resistor, Chip, 1/16-W, 5%
603
Std
Std
1
1
1
R12
1k
Resistor, Chip, 1/16-W, 5%
603
Std
Std
1
1
1
R13
100
Resistor, Chip, 1/16-W, 5%
603
Std
Std
1
1
1
R14
6.2k
Resistor, Chip, 1/16-W, 5%
603
Std
Std
4
4
4
R15, R16,
R17, R18
1.5k
Resistor, Chip, 1/16-W, 5%
603
Std
Std
bq2435x DSG EVM for Li-Ion Charger Front-End Protection IC
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Bill of Materials, Board Layout, and Schematic
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Table 1. Bill of Materials (continued)
bq24350
-001
bq24352 002
bq24355 003
RefDes
Value
Description
Size
Part Number
MFR
1
1
1
R19
51
Resistor, Chip, 1/16-W, 5%
603
Std
Std
4
4
4
6-32 NYL nuts
NY HN 632
H620-ND
Building
Fasteners
4
4
4
ST1,ST2,S
T3,ST4
4816
STANDOFF M/F HEX 6-32
NYL .500"
sf_thvt_325_rn
d
4816
Keystone
8
8
8
TP1,
TP3,
TP5,
TP7,
white
Test Point, White, Thru Hole
Color Keyed
0.100 x 0.100
inch
5002
Keystone
1
1
1
TP9
white
Test Point, White, Thru Hole
Color Keyed
0.100 x 0.100
inch
5001
Keystone
1
0
0
U1
bq24350DSG IC, OVER-VOLTAGE AND
OVER-CURRENT
CHARGER FRONT-END
SON-8
BQ24350DSG
TI
0
1
0
U1
bq24352DSG IC, OVER-VOLTAGE AND
OVER-CURRENT
CHARGER FRONT-END
SON-8
BQ24352DSG
TI
0
0
1
U1
bq24355DSG IC, OVER-VOLTAGE AND
OVER-CURRENT
CHARGER FRONT-END
SON-8
BQ24355DSG
TI
1
1
1
U2
BQ2057CSN
IC, Charge Management,
One or Two Cell Li-Ion or
Li-Pol Charger
S0-8
BQ2057CSN
TI
1
1
1
--
HPA398
PCB, 2.8 In x 2.8 In x 0.062
In
PCB
Any
TP2,
TP4,
TP6,
TP8
Notes: 1. Number 0 in left side columns means do not use this component.
2. OPEN in value column means do not use this component.
3. Std in part number column means standard manufacturer’s part number.
4. Std in MFR column means standard manufacturer.
4.2
Board Layout
Figure 2. Top Layer
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Bill of Materials, Board Layout, and Schematic
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Figure 3. Bottom Layer
Figure 4. Top Silk Screen
8
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Bill of Materials, Board Layout, and Schematic
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Figure 5. Top Assembly
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Bill of Materials, Board Layout, and Schematic
Schematic
+
4.3
www.ti.com
Figure 6. bq243550 Schematic
10
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EVALUATION BOARD/KIT IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES
ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have
electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental
measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does
not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling
(WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from
the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER
AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF
MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.
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INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or
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Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the product. This
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No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or
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FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES
ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and can radiate radio
frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which are
designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may
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EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 4.5 V to 26 V and the output voltage range of 0 V to 4.2 V.
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions
concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.
Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 70°C. The EVM is designed to operate
properly with certain components above 125°C as long as the input and output ranges are maintained. These components include but are
not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified
using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation,
please be aware that these devices may be very warm to the touch.
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Copyright © 2009, Texas Instruments Incorporated
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