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BQ24392QRSERQ1

BQ24392QRSERQ1

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    UFQFN10

  • 描述:

    IC BATT MFUNC USB 10UQFN

  • 数据手册
  • 价格&库存
BQ24392QRSERQ1 数据手册
Product Folder Order Now Technical Documents Support & Community Tools & Software BQ24392-Q1 SLIS160D – AUGUST 2014 – REVISED MARCH 2017 BQ24392-Q1 Dual SPST USB 2.0 High Speed Switch With USB Battery Charging Specification Revision 1.2 Detection 1 Features 3 Description • • The BQ24392-Q1 is a dual single-pole single-throw (SPST) USB 2.0 high-speed isolation switch with charger detection capabilities for use with micro and mini-USB ports. This USB switch allows mobile phones, tablets, and other battery operated electronics to be charged from different adapters with minimal system software. The device’s charger detection circuitry can support USB Battery Charging Specification version 1.2 (BCv1.2) compliant, Apple™, TomTom™, and other non-standard chargers. 1 • • • • • • • Qualified for Automotive Applications AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range – Device HBM ESD Classification Level 2 – Device CDM ESD Classification Level C4B USB 2.0 High Speed Switch Detects USB Battery Charging Specification Version 1.2 (BCv1.2) Compliant Chargers Compatible Accessories – Dedicated Charging Port – Standard Downstream Port – Charging Downstream Port Non-Standard Chargers – Apple™ Charger – TomTom™ Charger – USB Chargers Not Compliant With Battery Charging Specification Version 1.2 (BCv1.2) –2-V to 28-V VBUS Voltage Range ESD Performance Tested per JESD 22 – 4000-V Human-Body Model – 1500-V Charged-Device Model (C101) ESD Performance DP_CON/DM_CON to GND – ±8-kV Contact Discharge (IEC 61000-4-2) The BQ24392-Q1 device is powered through VBUS when a charger is attached to the micro or mini-USB port and has a 28 V tolerance to avoid the need for external protection. Device Information(1) PART NUMBER BQ24392-Q1 PACKAGE UQFN (10) BODY SIZE (NOM) 2.05 mm × 1.55 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. 480-Mbps USB 2.0 Eye Diagram With USB Switch 2 Applications • • Rear Seat Entertainment GPS Systems Copyright © 2017, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. BQ24392-Q1 SLIS160D – AUGUST 2014 – REVISED MARCH 2017 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 5 6 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 7 7.1 Overview ................................................................... 7 7.2 Functional Block Diagram ......................................... 7 7.3 Feature Description................................................... 8 7.4 Device Functional Modes.......................................... 9 8 Application and Implementation ........................ 10 8.1 Application Information............................................ 10 8.2 Typical Application ................................................. 11 9 Power Supply Recommendations...................... 12 10 Layout................................................................... 13 10.1 Layout Guidelines ................................................. 13 10.2 Layout Example .................................................... 14 11 Device and Documentation Support ................. 15 11.1 11.2 11.3 11.4 Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 15 15 15 15 12 Mechanical, Packaging, and Orderable Information ........................................................... 15 4 Revision History Changes from Revision C (January 2016) to Revision D Page • Changed From: BQ24932-Q1 To: BQ24392-Q1 in the Description ...................................................................................... 1 • Moved the Storage temperature range to the Absolute Maximum Ratings table. ................................................................. 4 • Changed Handling Ratings To: ESD Ratings......................................................................................................................... 4 • Changed From: BQ24932-Q1 To: BQ24392-Q1 in the Overview ......................................................................................... 7 • Changed title From: Using the BQ24932 GPIOs To: Using the BQ24392-Q1 GPIOs......................................................... 10 Changes from Revision B (January 2015) to Revision C • Changed diode direction from left facing to right facing in Application Schematic. ............................................................. 11 Changes from Revision A (September 2014) to Revision B • 2 Page Updated Features .................................................................................................................................................................. 1 Changes from Original (August 2014) to Revision A • Page Page Initial full version release of document ................................................................................................................................... 1 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated BQ24392-Q1 www.ti.com SLIS160D – AUGUST 2014 – REVISED MARCH 2017 5 Pin Configuration and Functions 10 CHG_DET RSE Package 10-Pin (UQFN) (Top View) 1 9 VBUS DM_HOST 2 8 DM_CON DP_HOST 3 7 DP_CON CHG_AL_N 4 6 GND GOOD_BAT 5 SW_OPEN Not to scale Pin Functions PIN NO. NAME I/O DESCRIPTION 1 SW_OPEN O USB switch status indicator Open-drain output. 10 kΩ external pull-up resistor required SW_OPEN = LOW indicates when switch is connected SW_OPEN = HIGH-Z indicates when switch is not connected 2 DM_HOST I/O D– signal to transceiver 3 DP_HOST I/O D+ signal to transceiver O Charging status indicator Open-drain output. 10 kΩ external pull-up resistor required. CHG_AL_N = LOW indicates when charging allowed CHG_AL_N = HIGH-Z indicates when charging is not allowed I Battery status indication from system This pin indicates the status of the battery GOOD_BAT = LOW indicates a dead battery GOOD_BAT = HIGH indicates a good battery – Not internally connected 4 CHG_AL_N 5 GOOD_BAT 6 GND 7 DP_CON I/O D+ signal from USB connector 8 DM_CON I/O D– signal from USB connector 9 VBUS I Supply pin from USB connector O Charger detection indicator Push-pull output to the system CHG_DET = LOW indicates when a charger is not detected CHG_DET = HIGH indicates when a charger detected 10 CHG_DET Copyright © 2014–2017, Texas Instruments Incorporated Submit Documentation Feedback 3 BQ24392-Q1 SLIS160D – AUGUST 2014 – REVISED MARCH 2017 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over –40℃ to 125℃ temperature range (unless otherwise noted) VBUS CHG_AL_N Input Voltage Tstg MIN MAX –2 28 –2 28 DM_HOST –0.3 7 DP_HOST –0.3 7 GOOD_BAT –0.3 7 DP_CON –0.3 7 DM_CON –0.3 7 CHG_DET –0.3 7 Storage temperature range –65 150 UNIT V °C 6.2 ESD Ratings VALUE Human body model (HBM), per AEC Q100-002 V(ESD) (1) Electrostatic discharge Charged device model (CDM), per AEC Q100-011 (1) UNIT ±4000 Corner pins (DP_CON and DM_CON to GND) ±8000 Other pins ±1500 V AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.3 Recommended Operating Conditions MIN MAX UNIT 4.75 5.25 V GOOD_BAT 0 VBUS DM_HOST 0 3.6 DP_HOST 0 3.6 DM_CON 0 3.6 DP_CON 0 3.6 VBUS 6.4 Thermal Information BQ24392-Q1 THERMAL METRIC (1) RSE UNIT 10 PINS RθJA Junction-to-ambient thermal resistance 167.7 °C/W RθJC(top) Junction-to-case (top) thermal resistance 78.8 °C/W RθJB Junction-to-board thermal resistance 95.8 °C/W ψJT Junction-to-top characterization parameter 4.7 °C/W ψJB Junction-to-board characterization parameter 95.9 v (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated BQ24392-Q1 www.ti.com SLIS160D – AUGUST 2014 – REVISED MARCH 2017 6.5 Electrical Characteristics VBUS = 4.5 V to 5.5 V, TA = –40°C to 125°C (unless otherwise noted) PARAMETER VBUS_VALI TEST CONDITIONS VBUS Valid threshold MIN Rising VBUS threshold TYP MAX 3.5 UNIT V D VOH CHG_DET VOL CHG_DET, CHG_DET, SW_OPEN, SW_OPEN, CHG_AL_N CHG_AL_N VIH High-level input voltage VIL Low-level input voltage RPD Internal pull-down resistance tDBP Dead battery provision timer VUSBIO Analog signal range RON ON-state resistance RON(flat) ON-state resistance flatness ΔRON ON- state resistance match between channels ICC-SW CHG_DET (OFF) IUSBI/O (ON) IUSBI/O IOL = 2 mA 0.4 V 0.5 950 32 0 DM_CON, DP_CON, DM_HOST, DP_HOST VDM_HOST and VDP_HOST = 0 to 3.6 V, IDP_CON and IDM_CON = –2 mA V kΩ 45 Mins 3.6 V 6 8 Ω 1.1 2.4 Ω VDM_HOST and VDP_HOST = 0.4 V, IDP_CON and IDM_CON = –2 mA 0.5 VVBUS = 5 V, USB Switch ON; VIH(GOOD_BAT)= 1.1 V 250 350 µA VVBUS = 5 V, USB Switch ON; VIH(GOOD_BAT) = 2.5 V 80 115 µA Current consumption with USB switch off VVBUS = 5 V; USB Switch OFF 45 75 µA Output port leakage current with USB switch on VI = OPEN, VO = 0.3 V or 2.7 V, Switch ON 50 90 nA Leakage current with USB switch off VI = 0.3 V, VO = 2.7 V or VI = 2.7 V, VO = 0.3 V, Switch OFF 45 75 nA Current consumption Capacitance with USB switch off DP_HOST, DM_HOST CO(OFF) Capacitance with USB switch off DP_CON, DM_CON CI(ON) Capacitance with USB switch on DP_HOST, DM_HOST CO(ON) Capacitance with USB switch on DP_CON, DM_CON BW Bandwidth RL = 50 Ω, Switch ON OISO Isolation with USB switch off f = 240 MHz, RL = 50 Ω, Switch OFF XTALK Crosstalk f = 240 MHz, RL = 50 Ω (1) V V GOOD_BAT (OFF) CI(OFF) 3.5 1.1 (ON) ICC-SW IOH = –2 mA VBUS (1 ) Ω 2 pF 10 pF 11 pF 11 pF 1 GHz DC bias = 0 V or 3.6 V, f = 10 MHz, Switch OFF DC bias = 0 V or 3.6 V, f = 10 MHz, Switch ON –26 dB –30.5 dB CHG_DET max value will be clamped at 7 V when VVBUS > 7 V Copyright © 2014–2017, Texas Instruments Incorporated Submit Documentation Feedback 5 BQ24392-Q1 SLIS160D – AUGUST 2014 – REVISED MARCH 2017 www.ti.com 6.6 Typical Characteristics Copyright © 2017, Texas Instruments Incorporated Figure 1. 480-Mbps USB 2.0 Eye Diagram with No Device 6 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Figure 2. 480-Mbps USB 2.0 Eye Diagram with USB Switch Copyright © 2014–2017, Texas Instruments Incorporated BQ24392-Q1 www.ti.com SLIS160D – AUGUST 2014 – REVISED MARCH 2017 7 Detailed Description 7.1 Overview The BQ24392-Q1 is a USB 2.0 high-speed isolation switch with charger detection capabilities for use with micro and mini-USB ports. Upon plugin of a Battery Charging Specification 1.2 (BCv1.2) compliant, Apple™, TomTom™, or other USB charger into a micro or mini-USB connector, the device will automatically detect the charger and operate the USB 2.0 high-speed isolation switch. The BQ24392-Q1 device is powered through VBUS when a charger is attached to the micro or mini-USB port and has a 28-V tolerance to avoid the need for external protection. 7.2 Functional Block Diagram BQ24392 Supply Detect VBUS DM_CON USB HOST DM_HOST DP_HOST DP_CON Switch Matrix Matrix Micro USB ID_CON GND SYSTEM & CHARGER GOOD_BAT SW_OPEN Logic DP/DM Comparator CHG_AL_N CHG_DET Copyright © 2017, Texas Instruments Incorporated Copyright © 2014–2017, Texas Instruments Incorporated Submit Documentation Feedback 7 BQ24392-Q1 SLIS160D – AUGUST 2014 – REVISED MARCH 2017 www.ti.com 7.3 Feature Description 7.3.1 Charger Detection POWERUP VVBUS >VVBUS_UV IDLE GOOD_BAT = 1 VVBUS >VVBUS(valid) DATA CONTACT DETECTION 600-ms Timeout Feature USB BCv 1.2 compliant Not USB BCv 1.2 compliant CHECK VOLTAGE LEVEL ON DP_CON & DM_CON PRIMARY DETECTION SDP charger Not SDP charger SECONDARY DETECTION Standard Downstream Port (SDP) GOOD_BAT=1 USB SWITCH ON GOOD_BAT=0 USB SWITCH OFF Dedicated Charging Port (DCP) Apple Charger TomTom Charger No Charger Charging Downstream Port (CDP) GOOD_BAT=1 GOOD_BAT=0 USB SWITCH ON USB SWITCH OFF GOOD_BAT=0 Start Dead Battery Provision (DBP) Timer 32 Mins Expire Disable charging Copyright © 2017, Texas Instruments Incorporated Figure 3. Logic Tree 8 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated BQ24392-Q1 www.ti.com SLIS160D – AUGUST 2014 – REVISED MARCH 2017 Feature Description (continued) When a micro or mini-USB accessory is inserted into the connector and once VVBUS is greater than VVBUS_VALID threshold, the BQ24392-Q1 will enter into the Data Contact Detection (DCD) state which includes a 600-ms timeout feature that is prescribed in the USB Battery Charging Specification version 1.2 (BCv1.2). If the micro or mini-USB accessory is determined to be USB BCv1.2 compliant, a 130-ms debounce period will initiate and the BQ24392-Q1 will proceed to its primary detection and then secondary detection states to determine if a Dedicated Charging Port (DCP), Standard Downstream Port (SDP), or Charging Downstream Port (CDP) is attached to the USB-port. The minimum detection time for a DCP, SDP, and CDP is 130 ms, but can be as long as 600 ms due to the slow plug in effect. If the GOOD_BAT pin is high, the USB 2.0 switches are automatically closed to enable data transfer after the device detects a Standard Downstream Port (SDP) or Charging Downstream Port (CDP) was connected. If Data Contact Detection (DCD) fails, the BQ24392-Q1 proceeds to detect whether an Apple or TomTom charger was inserted by checking the voltage level on DP_CON and DM_CON. Thus, for Apple and TomTom chargers, detection time typically takes ~600 ms. The 3 output pins CHG_AL_N, CHG_DET, and SW_OPEN change their status at the end of detection. Table 1 is the detection table with the GPIO status for each type of supported charger. More information on how to use the GPIOs is available in Using the BQ24392-Q1 GPIOs . Table 1. Detection Table Device Type Standard Downstream Port VBUS > 3.5 V DP_CON (D+) Pull-down R to GND DM_CON (D–) GOOD_BAT (Input) CHG_AL_N (Output) CHG_DET (Output) SW_OPEN (Output) Switch Status Charge Current HIGH LOW LOW LOW Connected Charge with 100mA/ Change the input current based on enumeration LOW LOW LOW High-Z Not Connected Charge with 100 mA HIGH LOW HIGH LOW Connected Charge with full current LOW LOW HIGH High-Z Not Connected Charge with 100 mA Pull-down R to GND Charging Downstream Port > 3.5 V Dedicated Charging Port > 3.5 V Short to D– Short to D+ X LOW HIGH High-Z Not Connected Charge with full current Apple Charger > 3.5 V 2.0 V < VDP_CON < 2.8 V 2.0 V < VDM_CON < 2.8 V X LOW HIGH High-Z Not Connected Charge with full current TomTom Charger > 3.5 V 2.0 V < VDP_CON < 3.1 V 2.0 V < VDM_CON < 3.1 V X LOW HIGH High-Z Not Connected Charge with full current PS/2 Charger > 3.5 V Pull-up R to VVBUS Pull-up R to VVBUS X LOW LOW High-Z Not Connected Charge with 100 mA Non-compliant USB Charger > 3.5 V Open Open X LOW LOW High-Z Not Connected Charge with 100 mA Any Device < 3.5 V Open Open X High-Z LOW High-Z Not Connected No Charge Any Device DBP Timer Expired > 3.5 V X X LOW High-Z LOW High-Z Not Connected No Charge Pull-down R to GND VDM_SRC If a charger has been detected and the GOOD_BAT pin is low, a Dead Battery Provision (DBP) timer is initiated. If the GOOD_BAT continues to be low for 30 minutes (maximum of 45 minutes), charging is disabled and CHG_AL_N goes into the High-Z state to indicate this. Toggling GOOD_BAT high after the DBP timer expires restarts detection and the DBP timer. 7.4 Device Functional Modes The BQ24392-Q1 has three functional modes: 1. Nothing inserted 2. Accessory inserted and detection running 3. Accessory inserted and detected Copyright © 2014–2017, Texas Instruments Incorporated Submit Documentation Feedback 9 BQ24392-Q1 SLIS160D – AUGUST 2014 – REVISED MARCH 2017 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information 8.1.1 Using the BQ24392-Q1 GPIOs 8.1.1.1 CHG_AL and CHG_DET The BQ24392-Q1 has 2 charger indicators, CHG_AL_N and CHG_DET, that the host can use to determine whether it can charge and if it can charge at a low or high current. Table 2 demonstrates how these outputs should be interpreted. CHG_AL_N is an open drain output and is active when the output of the pin is low. CHG_DET is a push-pull output and is high in the active state. Table 2. BQ24392-Q1 Outputs CHG_AL_N CHG_DET High-Z X Charging is not allowed Low Low Low-current charging is allowed Low High High-current charging is allowed The system must define what is meant by low-current and high-current charging. If CHG_DET is high, a system could try to draw 2 A, 1.5 A, or 1.0 A. If the system is trying to support greater than 1.5-A chargers, then the system has to use a charger IC that is capable of monitoring the VBUS voltage as it tries to pull the higher current values. If the voltage on VBUS starts to drop because that high of a current is supported then the system has to reduce the amount of current it is trying to draw until it finds a stable state with VBUS not dropping. 8.1.1.2 SW_OPEN SW_OPEN is an open drain output that indicates whether the USB switches are opened or closed. In the High-Z state the switches are open and in the active, or low state, the switches are closed. The host should monitor this pin to know when the switches are closed or open. 8.1.1.3 GOOD_BAT GOOD_BAT is used by the host controller to indicate the status of the battery to the BQ24392-Q1. This pin affects the switch status for a SDP or CDP, and it also affects the Dead Battery Provision (DBP) timer as discussed in the Charger Detection section. 8.1.1.4 Slow Plug-in Event As you insert a charger into the USB receptacle, the pins are configured so that the VBUS and GND pins make contact first. This presents a problem as the BQ24392-Q1 (or any other charger detection IC) requires access to the D+ and D– lines to run detection. This is why the BQ24392-Q1 has a standard 130-ms debounce time after VBUS valid to run the detection algorithm. This delay helps minimize the effects of the D+ and D– lines making contact after VBUS and GND. Figure 4 is from the datasheet of a standard male micro-USB connector and shows how the data connections (red line) are slightly recessed from the power connections (blue line). 10 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated BQ24392-Q1 www.ti.com SLIS160D – AUGUST 2014 – REVISED MARCH 2017 Data Lines VBUS and Ground Figure 4. Data Connections Recessed from Power Connections However, in some cases the charger is inserted very slowly, causing the VBUS and GND to make contact long before D+ and D–. Due to this effect, there is no guaranteed detection time as the detection time can vary based on how long it takes the user to insert the charger. If insertion takes longer than 600 ms, the detection algorithm of the BQ24392-Q1 will timeout and detect the charger as a non-standard charger. 8.2 Typical Application The BQ24392-Q1 device is used between the micro or mini-USB connector port and USB host to enable and disable the USB data path and detect chargers that are inserted into the micro or mini-USB connector. 2.2Ω VBUS DM_HOST USB HOST 1pF-10pF ESD 2.2Ω 1 pF ESD 3.3V 10 kΩ BQ24392 10 kΩ DP_CON USB PORT 2.2Ω 1 pF ESD GND GOOD_BAT SYSTEM & CHARGER 1 µF~ 10 µF DP_HOST DM_CON 100 kΩ 0.1 µF SW_OPEN CHG_AL_N CHG_DET Diode 0.5V Copyright © 2017, Texas Instruments Incorporated Figure 5. Application Schematic Copyright © 2014–2017, Texas Instruments Incorporated Submit Documentation Feedback 11 BQ24392-Q1 SLIS160D – AUGUST 2014 – REVISED MARCH 2017 www.ti.com Typical Application (continued) 8.2.1 Design Requirements VBUS requires 1-μF – 10-μF and 0.1-μF bypass capacitors to reduce noise from circuit elements by providing a low impedance path to ground for the unwanted high frequency content. The 0.1-μF capacitor filters out higher frequencies and has a lower series inductance while the 1 μF ~ 10 μF capacitor filters out the lower frequencies and has a much higher series inductance. Using both capacitors will provide better load regulation across the frequency spectrum. SW_OPEN and CHG_AL_N are open-drain outputs that require a 10-kΩ pull-up resistor to VDDIO and VBUS. VBUS, DM_CON, and DP_CON are recommended to have an external resistor of 2.2 Ω to provide extra ballasting to protect the chip and internal circuitry. DM_CON and DP_CON are recommended to have a 1-pF external ESD protection diode rated for 8-kV IEC protection to prevent failure in case of an 8-kV IEC contact discharge. VBUS is recommended to have a 1-pF ~ 10-pF external ESD Protection Diode rated for 8-kV IEC protection to prevent failure in case of an 8-kV IEC contact discharge CHG_DET is a push-pull output pin. An external pull-up and diode are shown to depict a typical 3.3-V system. The pull-up resistor and diode are optional. The pull-up range on the CHG_DET pin is from 3.5 V to VVBUS. When VVBUS > 7 V, CHG_DET will be clamped to 7 V. 8.2.2 Detailed Design Procedure The minimum pull-up resistance for the open-drain data lines is a function of the pull-up voltage VPU, output logic LOW voltage VOL(max), and Output logic LOW current IOL. RPU(MIN) = (VPU – VOL/MAX) / IOL (1) The maximum pull-up resistance for the open-drain data lines is a function of the maximum rise time of the desired signal, tr, and the bus capacitance, Cb. RPU(MAX) = tr / (0.8473 × Cb) (2) 8.2.3 Application Curves Copyright © 2017, Texas Instruments Incorporated Figure 6. 480-Mbps USB 2.0 Eye Diagram with No Device Copyright © 2017, Texas Instruments Incorporated Figure 7. 480-Mbps USB 2.0 Eye Diagram with USB Switch 9 Power Supply Recommendations Power to the device is supplied through the VBUS pin from the device that is inserted into the mini or micro-USB port. The power from the inserted devices should follow BCv1.2 specification. 12 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated BQ24392-Q1 www.ti.com SLIS160D – AUGUST 2014 – REVISED MARCH 2017 10 Layout 10.1 Layout Guidelines Place VBUS bypass capacitors as close to VBUS pin as possible and avoid placing the bypass caps near the DP/DM traces. The high speed DP/DM traces should always be matched lengths and must be no more than 4 inches; otherwise, the eye diagram performance may be degraded. A high-speed USB connection is made through a shielded, twisted pair cable with a differential characteristic impedance of 90 Ω ±15%. In layout, the impedance of DP and DM traces should match the cable characteristic differential 90-Ω impedance. Route the high-speed USB signals using a minimum of vias and corners. This reduces signal reflections and impedance changes. When a via must be used, increase the clearance size around it to minimize its capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of picking up interference from the other layers of the board. Be careful when designing test points on twisted pair lines; through-hole pins are not recommended. When it becomes necessary to turn 90°, use two 45° turns or an arc instead of making a single 90° turn. This reduces reflections on the signal traces by minimizing impedance discontinuities. Do not route USB traces under or near crystals, oscillators, clock signal generators, switching regulators, mounting holes, magnetic devices or IC’s that use or duplicate clock signals. Avoid stubs on the high-speed USB signals because they cause signal reflections. If a stub is unavoidable, then the stub should be less than 200 mm. Route all high-speed USB signal traces over continuous planes (VCC or GND), with no interruptions. Avoid crossing over anti-etch, commonly found with plane splits. Due to high frequencies associated with the USB, a printed circuit board with at least four layers is recommended; two signal layers separated by a ground and power layer as shown in Figure 8. Signal 1 aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa GND Plane aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa Power Plane Signal 2 Copyright © 2017, Texas Instruments Incorporated Figure 8. Four-Layer Board Stack-Up The majority of signal traces should run on a single layer, preferably Signal 1. Immediately next to this layer should be the GND plane, which is solid with no cuts. Avoid running signal traces across a split in the ground or power plane. When running across split planes is unavoidable, sufficient decoupling must be used. Minimizing the number of signal vias reduces EMI by reducing inductance at high frequencies. Copyright © 2014–2017, Texas Instruments Incorporated Submit Documentation Feedback 13 BQ24392-Q1 SLIS160D – AUGUST 2014 – REVISED MARCH 2017 www.ti.com 10.2 Layout Example LEGEND VIA to VBUS Plane Polygonal Copper Pour Pull resistor VIA to GND Plane (Inner Layer) To controller Bypass capacitors Pull-up resistor Ballast protection 10 CHG_DET USB connector 1 SW_OPEN VBUS 9 2 DM_HOST DM_CON 8 3 DP_HOST DP_CON 7 4 CHG_AL_N GND 6 Impedance matched USB traces Impedance matched USB traces USB connector GOOD_BAT 5 To controller Pull-up resistor From Controller Figure 9. Package Layout 14 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated BQ24392-Q1 www.ti.com SLIS160D – AUGUST 2014 – REVISED MARCH 2017 11 Device and Documentation Support 11.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.2 Trademarks E2E is a trademark of Texas Instruments. Apple is a trademark of Apple. TomTom is a trademark of TomTom International. All other trademarks are the property of their respective owners. 11.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2014–2017, Texas Instruments Incorporated Submit Documentation Feedback 15 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) BQ24392QRSERQ1 ACTIVE UQFN RSE 10 3000 RoHS & Green NIPDAUAG Level-3-260C-168 HR -40 to 125 EXH (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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