BQ25302
BQ25302
SLUSCZ3 – OCTOBER
2020
SLUSCZ3 – OCTOBER 2020
www.ti.com
BQ25302 Standalone 1-Cell 2.0-A Buck Battery Charger
1 Features
2 Applications
•
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•
•
•
•
•
•
•
•
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Standalone charger and easy to configure
High-efficiency, 1.2-MHz, synchronous switchmode buck charger
– 94.3% charge efficiency at 1A from 5-V input
Single input to support USB input
– Support 4.1-V - 6.2-V input voltage range with
28-V absolute maximum input voltage rating
– Input Voltage Dynamic Power Management
(VINDPM) tracking battery voltage
High integration
– Integrated reverse blocking and synchronous
switching MOSFET
– Internal input and charge current sense
– Internal loop compensation
– Integrated bootstrap diode
4.1-V / 4.2-V / 4.35-V / 4.4-V charge voltage
2.0-A maximum fast charge current
200-nA low battery leakage current at 4.5-V VBAT
4-µA VBUS supply current in IC disable mode
Charge current thermal regulation at 120°C
Precharge current: 10% of fast charge current
Termination current: 10% of fast charge current
Charge accuracy
– ±0.5% charge voltage regulation
– ±10% charge current regulation
Safety
– Thermal regulation and thermal shutdown
– Input Under-Voltage Lockout (UVLO) and OverVoltage Protection (OVP)
– Battery overcharge protection
– Safety timer for precharge and fast charge
– Charge disabled if current setting pin ICHG is
open or short
– Cold/hot battery temperature protection
– Fault report on STAT pin
Available in WQFN 3x3-16 package
Wireless speaker
Barcode scanner
Gaming
Cradle charger
Cordless power tool
Building Automation
Medical
3 Description
The BQ25302 is a highly-integrated standalone
switch-mode battery charger for single cell Li-Ion and
Li-polymer batteries. The BQ25302 supports 4.1-V to
6.2-V input voltage and 2-A fast charge. The
integrated current sensing topology of the device
enables high charge efficiency and low BOM cost.
The best-in-class 200-nA low quiescent current of the
device conserves battery energy and maximizes the
shelf time for portable devices. The BQ25302 is
available in a 3x3 WQFN package for easy 2-layer
layout and space limited applications.
Device Information
PART NUMBER(1)
PACKAGE
BQ25302
(1)
BODY SIZE (NOM)
RTE
3.00mm x 3.00mm
For all available packages, see the orderable addendum at
the end of the data sheet.
1 …+
VBUS
SW
VBUS
Q1
2.2 …F
Q2
47 nF
10 …F
BTST
Q3
PMID
PGND
2.2 …F
REGN
REGN
BAT
2.2 …F
REGN
ICHG
TS
VSET
Thermal Pad
Simplified Application
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
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© 2020 Texas
Instruments
Incorporated
intellectual
property
matters
and other important disclaimers. PRODUCTION DATA.
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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Description (continued).................................................. 3
6 Pin Configuration and Functions...................................4
7 Specifications.................................................................. 6
7.1 Absolute Maximum Ratings ....................................... 6
7.2 ESD Ratings .............................................................. 6
7.3 Recommended Operating Conditions ........................6
7.4 Thermal Information ...................................................7
7.5 Electrical Characteristics ............................................7
7.6 Timing Requirements ............................................... 10
7.7 Typical Characteristics.............................................. 11
8 Detailed Description......................................................12
8.1 Overview................................................................... 12
8.2 Functional Block Diagram......................................... 13
8.3 Feature Description...................................................14
8.4 Device Functional Modes..........................................18
9 Application and Implementation.................................. 20
9.1 Application Information............................................. 20
9.2 Typical Applications.................................................. 20
10 Power Supply Recommendations..............................27
11 Layout........................................................................... 28
11.1 Layout Guidelines................................................... 28
11.2 Layout Example...................................................... 28
12 Device and Documentation Support..........................30
12.1 Device Support....................................................... 30
12.2 Documentation Support.......................................... 30
12.3 Receiving Notification of Documentation Updates..30
12.4 Support Resources................................................. 30
12.5 Trademarks............................................................. 30
12.6 Electrostatic Discharge Caution..............................30
12.7 Glossary..................................................................30
13 Mechanical, Packaging, and Orderable
Information.................................................................... 31
4 Revision History
2
DATE
REVISION
NOTES
October 2020
*
Initial release.
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5 Description (continued)
The BQ25302 supports 4.1-V to 6.2-V input to charge single cell batteries. The BQ25302 provides up to 2-A
continuous fast charge current to a single cell battery. The device features fast charging for portable devices. Its
input voltage regulation delivers maximum charging power to the battery from input source. The solution is highly
integrated with an input reverse-blocking FET (RBFET, Q1), high-side switching FET (HSFET, Q2), and low-side
switching FET (LSFET, Q3).
The BQ25302 features lossless integrated current sensing to reduce power loss and BOM cost with minimized
component count. It also integrates a bootstrap diode for the high-side gate drive and battery temperature
monitor to simplify system design. The device initiates and completes a charging cycle without host control. The
BQ25302 charge voltage and charge current are set by external resistors. The BQ25302 detects the charge
voltage setting at startup and charges the battery in four phases: battery short, pre-conditioning, constant
current, and constant voltage. At the end of the charging cycle, the charger automatically terminates if the
charge current is below the termination current threshold and the battery voltage is above the recharge
threshold. When the battery voltage falls below the recharge threshold, the charger will automatically start
another charging cycle. The charger provides various safety features for battery charging and system
operations, including battery temperature monitoring based on negative temperature coefficient (NTC)
thermistor, charge safety timer, input over-voltage and over-current protections, as well as battery over-voltage
protection. Pin open and short protection is also built in to protect against the charge current setting pin ICHG
accidently open or short to GND. The thermal regulation regulates charge current to limit die temperature during
high power operation or high ambient temperature conditions.
The STAT pin output reports charging status and fault conditions. When the input voltage is removed, the device
automatically enters HiZ mode with very low leakage current from battery to the charger device. The BQ25302 is
available in a 3 mm x 3 mm thin WQFN package.
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2
STAT
3
ICHG
4
PMID
BTST
SW
SW
15
14
13
Thermal
Pad
12
GND
11
GND
10
BAT
9
POL
5
6
7
VSET
8
NC
REGN
TS
1
EN
VBUS
16
6 Pin Configuration and Functions
(Not to scale)
Figure 6-1. RTE Package 16-Pin WQFN Top View
Table 6-1. Pin Functions
PIN
I/O(1)
DESCRIPTION
NAME
NO.
VBUS
1
P
Charger Input Voltage. The internal n-channel reverse block MOSFET (RBFET) is connected between
VBUS and PMID with VBUS on source. Place a 2.2uF ceramic capacitor from VBUS to GND and place it
as close as possible to IC.
PMID
16
P
Connected to the drain of the reverse blocking MOSFET (RBFET) and the drain of high-side MOSFET
(HSFET). Place ceramic 10μF on PMID to GND and place it as close as possible to IC.
13,14
P
Switching node. Connected to output inductor. Internally SW is connected to the source of the n-channel
HSFET and the drain of the n-channel LSFET. Connect the 0.047μF bootstrap capacitor from SW to BTST.
BTST
15
P
High-Side FET Driver Supply. Internally, the BTST is connected to the cathode of the internal boost-strap
diode. Connect the 0.047μF bootstrap capacitor from SW to BTST.
GND
11,12
P
Ground. Connected directly to thermal pad on the top layer. A single point connection is recommended
between power ground and analog ground near the IC GND pins.
REGN
2
P
Low-Side FET driver positive supply output. Connect a 2.2μF ceramic capacitor from REGN to GND. The
capacitor should be placed close to the IC.
BAT
10
AI
Battery Voltage Sensing Input. Connect this pin to the positive terminal of the battery pack and the node of
inductor output terminal. 10-µF capacitor is recommended to connect to this pin.
TS
7
AI
Battery Temperature Protection Voltage Input. Connect a negative temperature coefficient thermistor
(NTC). Program temperature window with a resistor divider from REGN to TS and TS to GND. Charge
suspends when TS pin voltage is out of range. When TS pin is not used, connect a 10-kΩ resistor from
REGN to TS and a 10-kΩ resistor from TS to GND. It is recommended to use a 103AT-2 thermistor.
ICHG
4
AI
Charge current program input. Connect a 1% resistor RICHG from this pin to ground to program the
charge current as ICHG = KICHG / RICHG (KICHG = 40,000). No capacitor is allowed to connect at this pin.
When ICHG pin is pulled to ground or left open, the charger stop switching and STAT pin starts blinking.
AO
Charge Status Indication Output. This pin is open drain output. Connect this pin to REGN via a current
limiting resistor and LED. The STAT pin indicates charger status as:
•
Charge in progress: STAT pin is pulled LOW
•
Charge completed, charge disabled by EN: STAT pin is OPEN
•
Fault conditions: STAT pin blinks.
SW
STAT
3
Charge Voltage Setting Input. VSET pin sets battery charge voltage. Program battery regulation voltage
with a resistor pull-down from VSET to GND:
•
Floating (R > 200kΩ±10%): 4.1V
•
Shorted to GND (R < 510Ω): 4.2V
•
R = 51kΩ ± 10%: 4.35V
•
R = 10kΩ ± 10%: 4.4V
VSET
9
AI
POL
5
AI
This pin must be floating.
EN
6
AI
Device Disable Input. The device is enabled with EN pin floating or pulled low. The device is disabled if EN
pin is pulled high.
The maximum allowed capacitance on this pin is 50pF.
4
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Table 6-1. Pin Functions (continued)
PIN
NAME
NC
8
Thermal Pad
(1)
NO.
17
I/O(1)
DESCRIPTION
-
No connection. Keep this pin floating or grounded.
-
Ground reference for the device that is also the thermal pad used to conduct heat from the device. This
connection serves two purposes. The first purpose is to provide an electrical ground connection for the
device. The second purpose is to provide a low thermal-impedance path from the device die to the PCB.
This pad should be tied externally to a ground plane. Ground layer(s) are connected to thermal pad
through vias under thermal pad.
AI = Analog input, AO = Analog Output, AIO = Analog input Output, DI = Digital input, DO = Digital Output, DIO = Digital input Output,
P = Power
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7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)
PARAMETER
VBUS (converter not switching)
Voltage Range (with respect to GND)
Voltage Range (with respect to GND)
MIN
MAX
–2
28
V
PMID(converter not switching)
–0.3V
28
V
SW
–2V(3)
20
V
BTST
–0.3V
25.5
V
STAT
–0.3V
5.5
V
BAT
–0.3V
11
V
BTST to SW
–0.3V
5.5
V
ICHG
–0.3V
5.5
V
REGN
–0.3V
5.5
V
POL
–0.3V
5.5
V
/EN
–0.3V
5.5
V
TS
–0.3V
5.5
V
–0.3V
11(2)
VSET
STAT
Output Sink Current
UNIT
mA
20
mA
Junction temperature
TJ
–40C
150
ºC
Storage temperature
Tstg
–65C
150
ºC
(1)
(2)
(3)
REGN
V
6
Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
The absolute maximum rating is specified at 11V DC voltage and up to 13V for a maximum 100us
-3V for 10ns transient
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/
JEDEC JS-001, all pins(1)
±2000
Charged device model (CDM), per JEDEC
specification JESD22-C101, all pins(2)
±250
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
PARAMETER
6
MIN
NOM
4.1
MAX
UNIT
VVBUS
Input voltage
VBAT
Battery voltage
6.2
V
4.4
V
IVBUS
Input current
2
A
ISW
Output current (SW)
2
A
TA
Ambient temperature
–40
L
Effective inductance
0.7
1
µH
CVBUS
Effective VBUS capacitance
1.1
2.2
µF
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85
°C
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7.3 Recommended Operating Conditions (continued)
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
CPMID
Effective PMID capacitance
PARAMETER
5
10
MAX
UNIT
µF
CBAT
Effective BAT capacitance
5
10
µF
7.4 Thermal Information
THERMAL METRIC
DEVICE
(JEDEC(1))
UNIT
RθJA
Junction-to-ambient thermal resistance
45.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
48.5
°C/W
RθJB
Junction-to-board thermal resistance
19.0
°C/W
ΨJT
Junction-to-top characterization parameter
1.3
°C/W
ΨJB
Junction-to-board characterization parameter
19.0
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
7.9
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Electrical Characteristics
VVBUS_UVLOZ < VVBUS < VVBUS_OVP and VVBUS > VBAT + VSLEEP, TJ = -40°C to +125°C, and TJ = 25°C for typical values
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
QUIESCENT CURRENT
IVBUS_REVS
VBUS reverse current from BAT/SW VBAT = VSW = 4.5V, VBUS is shorted to GND,
to VBUS, TJ = -40°C - 85°C
measure VBUS reverse current
IQ_VBUS_DIS
VBUS leakage current in disable
mode, TJ = -40°C - 85°C
IQ_BAT_DIS
IQ_BAT_HIZ
0.07
3
µA
VBUS = 5V, VBAT = 4V, charger is
disabled, /EN is pulled high
4.1
µA
Leakage current from battery in
disable mode, TJ = -40°C - 65°C
VBUS = 5V, VBAT = 4V, charger is disabled,
POL is grounded /EN is floating
1.0
µA
BAT and SW pin leakage current in
HiZ mode, TJ = -40°C - 65°C
VBAT = VSW = 4.5V, VBUS floating
1.0
µA
6.2
V
0.17
VBUS POWER UP
VVBUS_OP
VBUS operating range
4.1
VVBUS_UVLOZ
VBUS power on reset
VBUS rising
VVBUS_UVLOZ_HYS
VBUS power on reset hysteresis
VBUS falling
VVBUS_LOWV
A condition to turnon REGN
VBUS rising, REGN turns on, VBAT = 3.2V
VVBUS_LOWV_HYS
A condition to turnon REGN,
hysteresis
VBUS falling, REGN turns off, VBAT = 3.2V
VSLEEP
Enter sleep mode threshold
VSLEEPZ
3.0
3.80
250
3.8
3.90
V
mV
4.00
300
V
mV
VBUS falling, VBUS - VBAT, VVBUS_LOWV < V
< VBATREG
30
60
100
mV
Exit sleep mode threshold
VBUS rising, VBUS - VBAT, VVBUS_LOWV < V
BAT < VBATREG
110
157
250
mV
VVBUS_OVP_RISE
VBUS overvoltage rising threshold
VBUS rising, converter stops switching
6.20
6.40
6.60
VVBUS_OVP_HYS
VBUS overvoltage falling hysteresis
VBUS falling, converter stops switching
Top reverse blocking MOSFET onresistance between VBUS and
PMID (Q1)
VREGN = 5V
BAT
500
V
mV
MOSFETS
RDSON_Q1
40
65
mΩ
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7.5 Electrical Characteristics (continued)
VVBUS_UVLOZ < VVBUS < VVBUS_OVP and VVBUS > VBAT + VSLEEP, TJ = -40°C to +125°C, and TJ = 25°C for typical values
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
RDSON_Q2
High-side switching MOSFET onresistance between PMID and SW
(Q2)
VREGN = 5V
50
82
mΩ
RDSON_Q3
Low-side switching MOSFET onresistance between SW and GND
(Q3)
VREGN = 5V
45
72
mΩ
BATTERY CHARGER
VBATREG
ICHG
Charge voltage regulation
Charge current regulation
VSET pin floating, TJ = -40°C to +85°C
4.078
4.100
4.118
V
VSET pin is grounded, TJ = -40°C to +85°C
4.178
4.200
4.218
V
Connect VSET pin to 51kΩ resistor, TJ =
-40°C to +85°C
4.328
4.350
4.371
V
Connect VSET pin to 10kΩ resistor, TJ =
-40°C to +85°C
4.376
4.400
4.418
V
ICHG set at 1.72A with RICHG=23.2kΩ, VBAT
= 3.8V, VBUS = 5V
1.55
1.72
1.89
A
ICHG set at 1.0A with RICHG=40.2kΩ, VBAT
= 3.8V, VBUS = 5V
0.90
1.00
1.10
A
ICHG set at 0.5A with RICHG=78.7kΩ, VBAT
= 3.8V, VBUS = 5V
0.40
0.517
0.60
A
ITERM
Termination current
ICHG = 1.72A, 10% of ICHG,
RICHG=23.2kΩ, BATREG = 4.2V, VBUS =
5V
138
172
206
mA
ITERM
Termination current
ICHG = 1.0A, 10% of ICHG,
RICHG=40.2kΩ, BATREG = 4.2V, VBUS =
5V
70
100
130
mA
ITERM
Termination current
ICHG=500mA, ITERM =63mA
RICHG=78.7kΩ, BATREG = 4.2V, VBUS =
5V
33
63
93
mA
ICHG = 1.72A, 10% of ICHG, R
ICHG=23.2kΩ, VBATREG = 4.2V, VBAT = 2.5V,
VBUS = 5V
115
172
225
mA
ICHG=40.2kΩ,
ICHG = 1.72A, 10% of ICHG, R
VBATREG = 4.2V, VBAT = 2.5V,
VBUS = 5V
50
100
150
mA
ICHG = 1.72A, 10% of ICHG, R
ICHG=78.7kΩ, VBATREG = 4.2V, VBAT = 2.5V,
VBUS = 5V
28
63
98
mA
Short to precharge
2.05
2.20
2.35
1.85
2.00
2.15
24
30
36
IPRECHG
VBAT_SHORT_RISE
Precharge current
VBAT short rising threshold
VBAT_SHORT_FALL
VBAT short falling threshold
Precharge to battery short
IBAT_SHORT
Battery short current
VBAT < VBAT_SHORT_FALL, VBUS = 5V
V
V
mA
VBAT_LOWV_RISE
Rising threshold
Precharge to fast charge
2.90
3.00
3.10
V
VBAT_LOWV_FALL
Falling threshold
Fast charge to precharge
2.60
2.70
2.80
V
VRECHG_HYS
Recharge hysteresis below VBATREG VBAT falling
110
160
216
mV
4.0
4.07
4.2
V
4.15
4.28
4.41
V
2.1
2.25
2.4
A
101.9
103.5
105
%
INPUT VOLTAGE / CURRENT REGULATION
VINDPM_MIN
Minimum input voltage regulation
VBAT = 3.5V, measured at PMID pin
VINDPM
Input voltage regulation
VBAT = 4V, measured at PMID pin, VINDPM =
1.044*VBAT + 0.125V
IINDPM_2A_5V
Input current regulation
VVBUS = 5V
BATTERY OVER-VOLTAGE PROTECTION
VBAT_OVP_RISE
8
Battery overvoltage rising threshold
VBAT rising, as percentage of VBATREG
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7.5 Electrical Characteristics (continued)
VVBUS_UVLOZ < VVBUS < VVBUS_OVP and VVBUS > VBAT + VSLEEP, TJ = -40°C to +125°C, and TJ = 25°C for typical values
(unless otherwise noted)
PARAMETER
VBAT_OVP_FALL
TEST CONDITIONS
Battery overvoltage falling threshold VBAT falling, as percentage of VBATREG
MIN
TYP
100.0
101.6
103.1
MAX UNIT
%
2.7
3
3.3
V
5.2
6.2
6.7
A
CONVERTER PROTECTION
VBTST_REFRESH
Bootstrap refresh comparator
threshold
(VBTST - VSW) when LSFET refresh pulse is
requested, VBUS = 5V
IHSFET_OCP
HSFET cycle by cycle over current
limit threshold
STAT INDICATION
ISTAT_SINK
STAT pin sink current
6
mA
FBLINK
STAT pin blink frequency
1
Hz
FBLINK_DUTY
STAT pin blink duty cycle
50
%
THERMAL REGULATION AND THERMAL SHUTDOWN
TREG
TSHUT
Junction temperature regulation
accuracy
111
120
133
°C
Thermal shutdown rising threshold
Temperature increasing
150
°C
Thermal shutdown falling threshold
Temperature decreasing
125
°C
BUCK MODE OPERATION
FSW
PWM switching frequency
DMAX
Maximum PWM Duty Cycle
SW node frequency
1.02
1.20
1.38 MHz
97.0
%
REGN LDO
VREGN_UVLO
REGN UVLO
VVBUS rising
VREGN
REGN LDO output voltage
VVBUS = 5V, IREGN = 0 to 16mA
4.2
3.85
V
5.0
V
ICHG SETTING
VICHG
ICHG pin regulated voltage
RICHG_SHORT_FALL
Maximum resistance to disable
charge
993
VBUS=5V
RICHG_OPEN_RISE
Minimum resistance to disable
charge
VBUS=5V,
RICHG_MAX
Maximum programmable resistance
VBUS=5V
at ICHG
RICHG_MIN_SLE0
Minimum programmable resistance
at ICHG
VBUS=5V
RICHG_HIGH
ICHG setting resistor threshold to
clamp precharge and termination
current to 63mA
RICHG > RICHG_HIGH
KICHG
Charge current ratio
KICHG
Charge current ratio
KICHG
Charge current ratio
998
1003
mV
1.00
kΩ
565
kΩ
250.00
17.40
kΩ
kΩ
60.0
65.0
70.0
ICHG set at 1.72A with RICHG = 23.2kΩ, V
VBUS=5V, ICHG = KICHG / RICHG
36000
40000
44000
AxΩ
ICHG set at 1.0A with RICHG = 40.2kΩ, V
3.8V, VBUS = 5V, ICHG = KICHG / RICHG
36000
40280
44000
AxΩ
ICHG set at 0.5A with RICHG = 78.7kΩ, V
3.8V, VBUS = 5V, ICHG = KICHG / RICHG
32000
40700
48000
AxΩ
BAT=3.8V,
BAT =
BAT =
kΩ
COLD/HOT THERMISTOR COMPARATOR
VT1%
TCOLD (0°C) threshold, charge
suspended if thermistor temperature VTS rising, as percentage to VREGN
is below T1
72.68
73.5
74.35
%
VT1%
VTS falling
70.68
71.5
72.33
%
VT3%
THOT (45°C) threshold, charge
suspended if thermistor temperature VTS falling, as percentage to VREGN
is above T_HOT
46.35
47.25
48.15
%
As Percentage to VREGN
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7.5 Electrical Characteristics (continued)
VVBUS_UVLOZ < VVBUS < VVBUS_OVP and VVBUS > VBAT + VSLEEP, TJ = -40°C to +125°C, and TJ = 25°C for typical values
(unless otherwise noted)
PARAMETER
VT3%
VTS rising
TEST CONDITIONS
As percentage to VREGN
MIN
TYP
47.35
48.25
MAX UNIT
49.15
%
0.40
V
LOGIC I/O PIN CHARACTERESTICS (POL, EN)
VILO
Input low threshold
Falling
VIH
Input high threshold
Rising
IBIAS
High-level leakage current at /EN pin /EN pin is pulled up to 1.8 V
1.3
V
1.0
µA
7.6 Timing Requirements
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
VBUS/BAT POWER UP
tVBUS_OV
VBUS OVP reaction-time
VBUS rising above VBUS_OV threshold
to converter turnoff
200
ns
tCHG_ON_EN
Delay from enable at /EN pin to
charger power on
/EN pin voltage rising
245
ms
/EN pin is grounded, batttery present
275
ms
tCHG_ON_VBUS Delay from VBUS to charge start
BATTERY CHARGER
tSAFETY_FAST
Charge safety timer
Fast charge safety timer 20 hours
tSAFETY_PRE
Charge safety timer
Precharge safety timer
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15.0
20.0
24.0
hr
1.5
2.0
2.5
hr
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7.7 Typical Characteristics
Charge Regulation Voltage (V)
4.5
4.4
4.3
4.2
4.1
3.9
-40
fSW = 1.2 MHz
Inductance 1 uH
VBUS = 5 V
Inductor DCR = 14.6 mΩ
VBATREG = 4.1V
VBATREG = 4.2V
VBATREG = 4.35V
VBATREG = 4.4V
4
-20
0
20
40
60
80
100
Junction Temperature (oC)
120
140
Copy
Figure 7-2. Battery Charge Regulation Voltage vs. Junction
Temperature
Figure 7-1. Battery Charge Efficiency vs. Charge Current
4.4
2
1.75
4.3
Charge Current (A)
VINDPM (V)
1.5
4.2
4.1
1.25
1
0.75
0.5
4
3.9
-40
-20
0
20
40
60
80
100
Junction Temperature (oC)
120
Charge Current = 1.72A
Charge Current = 1A
Charge Current = 0.52A
0.25
VINDPM = 4.1V
VINDPM = 4.3V
0
-40
140
-20
0
VIND
Figure 7-3. VINDPM vs. Junction Temperature
20
40
60
80
100
Junction Temperature (oC)
120
140
ICHG
Figure 7-4. Charge Current vs. Junction Temperature
2
41200
1.8
41000
1.4
40800
1.2
KICHG
Charge Current (A)
1.6
1
0.8
40600
40400
0.6
0.4
40200
0.2
0
0
20
40
60
80 100 120
RICHG (k:)
140
160
180
200
40000
0.2
0.4
RICH
Figure 7-5. Charge Current vs. Charge Current Setting
Resistance RICHG
0.6
0.8
1
1.2 1.4 1.6
Charge Current (A)
1.8
2
2.2
KICH
Figure 7-6. KICHG vs. Charge Current
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8 Detailed Description
8.1 Overview
The BQ25302 is a highly integrated standalone switch-mode battery charger for single cell Li-Ion and Li-polymer
batteries with charge voltage and charge current programmable by an external resistor. It includes an input
reverse-blocking FET (RBFET, Q1), high-side switching FET (HSFET, Q2), low-side switching FET (LSFET, Q3),
and bootstrap diode for the high-side gate drive as well as current sensing circuitry.
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8.2 Functional Block Diagram
VBUS
PMID
VVBUS_LOWV
+
RBFET (Q1)
UVLO
VVBUS
±
IIN
Q1 Gate
Control
VBAT + VSLEEP
+
VVBUS
REGN
EN_REGN
SLEEP
±
EN_CHARGE
REGN
LDO
BTST
FBO
ICHG
VVBUS
SNS
VBUS_OV
+
VVBUS_OV
±
VPMID
±
HSFET (Q2)
VINDPM
SW
+
IIN
BAT
+
+
BATOVP
104% × V BAT_REG
IINDPM
Converter
Control
REGN
±
±
ILSFET_UCP
IC TJ
LSFET (Q3)
+
+
TREG
+
±
±
+
±
BAT
IQ3
UCP
PGND
IQ2
±
Q2_OCP
+
IHSFET_OCP
VBAT_REG
±
VBTST - VSW
ICHG
EN_CHARGE
ICHG_REG
REFRESH
+
VBTST_REFRESH
±
BAT
Converter
Control State
Machine
IC TJ
TSHUT
+
TSHUT
±
ICHG
VREG -VRECHG
RECHRG
+
±
BAT
ICHG
TERMINATION
VSET
+
ITERM
±
REF/EN
VBAT_LOWV
BATLOWV
±
EN
BATSHORT
±
BAT
VTCOLD
VTS
VTHOT
+
SUSPEND
VSHORT
±
SUSPEND
STAT
AGND
+
+
Charger
Control State
Machine
BAT
±
POL
+
VTS
VTS
TS
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8.3 Feature Description
8.3.1 Device Power Up
The EN pin enable or disable the device. When the device is disabled, the device draws minimum current from
VBUS pin. POL grouding or floating determines the polority of the EN pin. The device can be powered up from
either VBUS or by enabling the device from EN pin.
8.3.1.1 Power-On-Reset (POR)
The EN pin can enable or disable the device. When the device is disabled, the device is in disable mode and it
draws minimum current at VBUS. When the device is enabled, if VBUS rises above V VBUS_UVLOZ, the device
powers part of internal bias and comparators and starts Power on Reset (POR).
8.3.1.2 REGN Regulator Power Up
The internal bias circuits are powered from the input source. The REGN supplies internal bias circuits as well as
the HSFET and LSFET gate drive. The REGN also provides voltage rail to STAT LED indication. The REGN is
enabled when all the below conditions are valid:
•
•
Chip is enabled by EN pin
VVBUS above VVBUS_UVLOZ
•
•
VVBUS above VBAT + VSLEEPZ
After sleep comparator deglitch time, VSET detection time, and REGN delay time
REGN remains on at fault conditions. REGN is powered by VBUS only and REGN is off when VBUS power is
removed.
8.3.1.3 Charger Power Up
Following REGN power-up, if there is no fault conditions, the charger powers up with soft start. If there is any
fault, the charger will remain off until fault is clear. Any of the fault conditions below gates charger power-up:
• VVBUS > VVBUS_OVP
• Thermistor cold/hot fault on TS pin
• VBAT > VBAT_OVP
• Safety timer fault
• ICHG pin is open or short to GND
• Die temperature is above TSHUT
8.3.1.4 Charger Enable and Disable by EN Pin
The charger can be enabled or disabled by EN pin pulled high or low. The charger is in disable mode when
disabled.
8.3.1.5 Device Unplugged from Input Source
When V BUS is removed from an adaptor, the device stays in HiZ mode and the leakage current from the battery
to BAT pin and SW pin is less than IQ_BAT_HIZ.
8.3.2 Battery Charging Management
The BQ25302 charges 1-cell Li-Ion battery with up to 2.0-A charge current from 4.1-V to 6.2-V input voltage. A
new charge cycle starts when the charger power-up conditions are met. The charge voltage is set by external
resistor connected at VSET pin and charge current are set by external resistors at ICHG pin. The charger
terminates the charging cycle when the charging current is below termination threshold ITERM and charge voltage
is above recharge threshold (VBATREG - VRECHG_HYS), and device is not in IINDPM or thermal regulation. When a
fully charged battery's voltage is discharged below recharge threshold, the device automatically starts a new
charging cycle with safety timer reset. To initiate a recharge cycle, the conditions of charger power-up must be
met. The STAT pin output indicates the charging status of charging (LOW), charging complete or charge
disabled (HIGH) or charging faults (BLINKING).
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8.3.2.1 Battery Charging Profile
The device charges the battery in four phases: battery short, preconditioning, constant current, constant voltage.
The device charges battery based on charge voltage set by VSET pin and charge current set by ICHG pin as
well as actual battery voltage. The battery charging profile is shown in Figure 8-1. The battery short current is
provided by internal linear regulator.
Table 8-1. Charging Current Setting
MODE
BATTERY VOLTAGE VBAT
CHARGE CURRENT
TYPICAL VALUE
VBAT < VBAT_SHORT
IBAT_SHORT
30 mA
VBAT_SHORT < VBAT < VBAT_LOWV
IPRECHG
10% of ICHG
VBAT_LOWV < VBAT
ICHG
Set by ICHG resistor
Battery Short
Precharge
Fast Charge
Regulation Voltage VBATREG
Battery Voltage
Fast Charge Current ICHG
Charge Current
VBAT_LOWV
VBAT_SHORT
IPRECHG
ITERM
IBAT_SHORT
Time
Trickle Charge
Pre-charge
Fast Charge
Voltage Regulation
Safety Timer Expiration if
Charge is not Terminated
Figure 8-1. Battery Charging Profile
8.3.2.2 Precharge
The device charges the battery at 10% of set fast charge current in precharge mode. When RICHG > RICHG_HIGH,
the precharge current is clamped at 63mA.
8.3.2.3 Charging Termination
The device terminates a charge cycle when the battery voltage is above recharge threshold and the charge
current is below termination current. After a charging cycle is completed, the charger is terminated and the
system load is powered from battery. Termination is temporarily disabled when the charger device is in input
current regulation or thermal regulation mode and the charging safety timer is counted at half the clock rate. The
charge termination current is 10% of set fast charge current if R ICHG < R ICHG_HIGH. The termination current is
clamped at 63mA if RICHG > RICHG_HIGH.
8.3.2.4 Battery Recharge
A charge cycle is completed when battery is fully charged with charge terminated. If the battery voltage
decreases below the recharge threshold (V BATREG - V RECHG_HYS), the charger is enabled with safety timer reset
and enabled.
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8.3.2.5 Charging Safety Timer
The device has built-in safety timer to prevent extended charging cycle due to abnormal battery conditions. The
safety timer is 20 hours when the battery voltage is above V BAT_LOWV threshold and 2 hours below V BAT_LOWV
threshold. When the safety timer expires, charge is suspended until the safety timer is reset. Safety timer is reset
and charge starts under one of the following conditions:
• Battery voltage falls below recharge threshold
• VBUS voltage is recycled
• EN pin is toggled
• Battery voltage transits across VBAT_SHORT threshold
• Battery voltage transits across VBAT_LOWV threshold
If the safety timer expires and the battery voltage is above recharge threshold, the charger is suspended and the
STAT pin is open. If the safety timer expires and the battery voltage is below the recharge threshold, the charger
is suspended and the STAT pin blinks to indicate a fault. The safety timer fault is cleared with safety timer reset.
During input current regulation, thermal regulation, the safety timer counts at half the original clock frequency
and the safety timer is doubled. During TS fault, V BUS_OVP, V BAT_OVP, ICHG pin open and short, and IC thermal
shutdown faults, the safety timer is suspended. Once the fault(s) is clear, the safety timer resumes to count.
8.3.2.6 Thermistor Temperature Monitoring
The charger device provides a single thermistor input TS pin for battery temperature monitor. RT1 and RT2
programs the cold temperature T1 and hot temperature T3. In the equations, R NTC,T1 is NTC thermistor
resistance value at temperature T1 and R NTC,T3 is NTC thermistor resistance values at temperature T3.
Assuming RHOT = 0, select 0°C to 45°C for battery charge temperature range, then NTC thermistor 103AT-2
resistance R NTC,T1 = 27.28 kΩ ( at 0°C) and R NTC,T3 = 4.91 kΩ (at 45°C), from the Equation 1 and Equation 2,
RT1 and RT2 are derived as:
• RT1 = 4.527 kΩ
• RT2 = 23.26 kΩ
On top of the calculation results, adding RHOT resisitor can shift HOT temperature T3 up and only slightly shift
up COLD temperature T1. The actual temperature T3 can be looked up in a NTC resistance table based on (R
NTC,T3 - RHOT) and T1 can be looked up in a NTC resistance table based on (R NTC,T1 - RHOT). Because R
NTC,T1 is much higher than R NTC,T3, RHOT can adjust HOT temperature significantly with mimimal affect on
COLD temperature. RHOT is optional.
REGN
RT1
RHOT
TS
RT2
RTH
103AT
Figure 8-2. Battery Temperature Sensing Circuit
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T1
T1
T3
T1 %
T3%
T1 %
T3
T3%
(1)
%
(2)
8.3.3 Charging Status Indicator (STAT)
The device indicates charging state on the open drain STAT pin. The STAT pin can drive a LED that is pulled up
to REGN rail through a current limit resistor.
Table 8-2. STAT Pin State
CHARGING STATE
STAT INDICATOR
Charging in progress (including recharge)
LOW
Charging complete
HIGH
HiZ mode, sleep mode, charge disable
HIGH
Safety timer expiration with battery voltage above recharge threshold
HIGH
Charge faults:
1. VBUS input over voltage
2. TS cold/hot faults
3. Battery over voltage
4. IC thermal shutdown
5. Safety timer expiration with battery voltage below recharge threshold
6. ICHG pin open or short
BLINKING at 1 Hz
with 50% duty cycle
8.3.4 Protections
8.3.4.1 Voltage and Current Monitoring
The device closely monitors the input voltage and input current for safe operation.
8.3.4.1.1 Input Over-Voltage Protection
This device integrates the functionality of an input over-voltage protection (OVP). The input OVP threshold is V
VBUS_OVP_RISE. During an input over-voltage event, the converter stops switching and safety timer stops counting
as well. The converter resumes switching and the safety timer resumes counting once the VBUS voltage drops
back below (V VBUS_OVP_RISE - V VBUS_OVP_HYS). The REGN LDO remains on during an input over-voltage event.
The STAT pin blinks during an input OVP event.
8.3.4.1.2 Input Voltage Dynamic Power Management (VINDPM)
When the input current of the device exceeds the current capability of the power supply, the charger device
regulates PMID voltage by reducing charge current to avoid crashing the input power supply. VINDPM
dynamically tracks the battery voltage. The actual VINDPM is the higher of V INDPM_MIN and (1.044*VBAT +
125mV).
8.3.4.1.3 Input Current Limit
The device has built-in input current limit. When the input current is over the threshold IINDPM, the converter duty
cycle is reduced to reduce input current.
8.3.4.1.4 Cycle-by-Cycle Current Limit
High-side (HS) FET current is cycle-by-cycle limited. Once the HSFET peak current hits the limit IHSFET_OCP, the
HSFET shuts down until the current is reduced below a threshold.
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8.3.4.2 Thermal Regulation and Thermal Shutdown
The device monitors the junction temperature T J to avoid overheating the chip and limit the device surface
temperature. When the internal junction temperature exceeds thermal regulation limit T REG, the device lowers
down the charge current. During thermal regulation, the average charging current is usually below the
programmed battery charging current. Therefore, termination is disabled and the safety timer runs at half the
clock rate.
Additionally, the device has thermal shutdown built in to turn off the charger when device junction temperature
exceeds T SHUT. The charger is reenabled when the junction temperature is 25°C below T SHUT. During thermal
shutdown, the safety timer stops counting and it resumes when the temperature drops below the threshold.
8.3.4.3 Battery Protection
8.3.4.3.1 Battery Over-Voltage Protection (VBAT_OVP)
The battery voltage is clamped at 3.5% above the battery regulation voltage. When the battery voltage is over V
the converter stops switching until the battery voltage is below the falling threshold. During a
battery over-voltage event, the safety timer stops counting and STAT pin reports the fault and it resumes once
the battery voltage falls below the falling threshold. A 7-mA pull-down current is on the BAT pin once BAT_OVP
is triggered. BAT_OVP may be triggered in charging mode, termination mode, and fault mode.
BAT_OVP_RISE,
8.3.4.3.2 Battery Short Circuit Protection
When the battery voltage falls below the VBAT_SHORT threshold, the charge current is reduced to IBAT_SHORT.
8.3.4.4 ICHG Pin Open and Short Protection
To protect against ICHG pin is short or open, the charger immediately shuts off once ICHG pin is open or short to
GND and STAT pin blinks to report the fault. At powerup, if ICHG pin is detected open or short to GND, the
charge will not power up until the fault is clear.
8.4 Device Functional Modes
8.4.1 Disable Mode, HiZ Mode, Sleep Mode, Charge Mode, Termination Mode, and Fault Mode
The device operates in different modes depending on VBUS voltage, battery voltage, and EN pin, POL pin, and
ICHG pin connection. The functional modes are listed in the following table.
Table 8-3. Device Functional Modes
MODE
Disable Mode
CONDITIONS
REGN LDO
CHARGE ENABLED
STAT PIN
Device is disable
OFF
NO
OPEN
OFF
NO
OPEN
OFF
NO
OPEN
ON
YES
SHORT to GND
VVBUS < VVBUS_UVLOZ and
HiZ Mode
device is enabled
VVBUS > VVBUS_UVLOZ
and
Sleep Mode
VVBUS < VBAT + VSLEEPZ and
device is enabled
VVBUS > VVBUS_LOWV and
Charge Mode
VVBUS > VBAT + VSLEEPZ and
device is enabled, no faults,
charge is not terminated
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Table 8-3. Device Functional Modes (continued)
MODE
CONDITIONS
REGN LDO
CHARGE ENABLED
STAT PIN
ON
NO
OPEN
ON
NO
BLINKING
VVBUS > VVBUS_LOWV and
Charge Termination
Mode
Fault Mode
VVBUS > VBAT + VSLEEPZ and
device is enabled, no faults,
charge is terminated
VBUS_OVP, TS cold/hot, VBAT_OVP, IC
thermal shutdown, safety timer fault,
ICHG pin open or short
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
9.1 Application Information
A typical application consists of a single cell battery charger for Li-Ion, Li-polymer batteries used in a wide range
of portable devices and accessories. It integrates an input reverse-block FET (RBFET, Q1), high-side switching
FET (HSFET, Q2), and low-side switching FET (LSFET, Q3). The Buck converter output is connected to the
battery directly to charge the battery and power system loads. The device also integrates a bootstrap diode for
high-side gate drive.
9.2 Typical Applications
The typical applications in this section include a standalone charger without power path, a standalone charger
with external power path, and a typical application with MCU programmed charge current.
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9.2.1 Typical Application
The typical application in this section includes a standalone charger without power path.
VBUS
SW
VBUS
Q1
2.2 …F
Q2
10 …F
47 nF
BTST
Q3
PMID
PGND
2.2 …F
REGN
BAT
STAT
REGN
REGN
REGN
2.2 …F
TS
ICHG
VSET
GND
Figure 9-1. Typical Application Diagram (1-µH inductor is recommended)
9.2.1.1 Design Requirements
Table 9-1. Design Requirements
PARAMETER
VALUE
Input Voltage
4.1V to 6.2V
Input Current
2.0A
Fast Charge Current
2.0A
Battery Regulation Voltage
4.1V/4.2V/4.35V/4.4V
9.2.1.2 Detailed Design Procedure
9.2.1.2.1 Charge Voltage Settings
Battery charge voltage is set by a resistor connected at the VSET pin. When the REGN LDO startup conditions
are met, and before the REGN LDO powers up, the internal VSET detection circuit is enabled to detect VSET pin
resistance and set battery charge voltage accordingly. The VSET detection circuit is disabled after detection is
complete and changing resistance values on the fly does not change the battery charge voltage. VSET detection
is reenabled once the REGN LDO is recycled.
9.2.1.2.2 Charge Current Setting
The charger current is set by the resistor value at the ICHG pin according to the equation below:
ICHG (A) = KICHG (A·Ω) / RICHG(Ω)
KICHG is a coefficient that is listed in Electrical Characteristics table and R ICHG is the resistor value from ICHG pin
to GND. KICHG is typically 40,000 (A·Ω) and it is slightly shifted up at lower charge current setting. The KICHG vs.
ICHG typical characteresitc curve is shown in Figure 7-6.
9.2.1.2.3 Inductor Selection
The 1.2-MHz switching frequency allows the use of small inductor and capacitor values to maintain an inductor
saturation current higher than the charging current (ICHG) plus half the ripple current (IRIPPLE):
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ISAT ≥ ICHG + (1/2) IRIPPLE
(3)
The inductor ripple current depends on the input voltage (V VBUS), the duty cycle (D = VBAT/VVBUS), the switching
frequency (fS) and the inductance (L).
IRIPPLE =
VIN ´ D ´ (1 - D)
fs ´ L
(4)
The maximum inductor ripple current occurs when the duty cycle (D) is 0.5 or approximately 0.5. Usually
inductor ripple is designed in the range between 20% and 40% maximum charging current as a trade-off
between inductor size and efficiency for a practical design.
9.2.1.2.4 Input Capacitor
Design input capacitance to provide enough ripple current rating to absorb the input switching ripple current.
Worst case RMS ripple current is half of the charging current when the duty cycle is 0.5. If the converter does not
operate at 50% duty cycle, then the worst case capacitor RMS current ICin occurs where the duty cycle is closest
to 50% and can be estimated using Equation 5.
ICIN = ICHG ´ D ´ (1 - D)
(5)
A low ESR ceramic capacitor such as X7R or X5R is preferred for the input decoupling capacitor and should be
placed as close as possible to the drain of the high-side MOSFET and source of the low-side MOSFET. The
voltage rating of the capacitor must be higher than the normal input voltage level. A rating of 16-V or higher
capacitor is preferred for 5-V input voltage.
9.2.1.2.5 Output Capacitor
Ensure that the output capacitance has enough ripple current rating to absorb the output switching ripple current.
The equation below shows the output capacitor RMS current ICOUT calculation.
ICOUT =
IRIPPLE
2´ 3
» 0.29 ´ IRIPPLE
(6)
The output capacitor voltage ripple can be calculated as follows:
DVO =
ö
VOUT æ
V
1 - OUT ÷
2 ç
V
8LCfs è
IN ø
(7)
At certain input and output voltage and switching frequency, the voltage ripple can be reduced by increasing the
output filter LC.
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9.2.1.3 Application Curves
SW
VBUS
VBAT
REGN
STAT
IBAT
STAT
IBAT
VBUS = 5 V
ICHG = 2A
Device Enabled
Figure 9-2. Power Up from VBUS
VBUS = 5 V
VBAT = 1.5V - 4.2V
ICHG = 2 A
VBATREG = 4.2V
Figure 9-3. Charge Cycle with Battery Simulator
VBUS
SW
STAT
IBAT
VBUS = 5 V - 10V - 5V
Adaptor Currrent Limit: 1A
ICHG = 2A
VBAT =3.5V
VBUS = 5 V
Figure 9-4. VBUS into and out of Over Voltage
Protection (OVP)
From ICHG = 2A to ICHG pin
short
Figure 9-5. ICHG Pin Short Circuit Protection
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9.2.2 Typical Application with External Power Path
In the case where a system needs to be immediately powered up from VBUS when the battery is overdischarged
or dead, the application circuit shown in Figure 9-6 can be used to provide a power path from VBUS/PMID to
VSYS. PFET Q4 is an external PFET that turns on to supply VSYS from the battery when VBUS is removed;
PFET Q4 turns off when VBUS is plugged in and VSYS is supplied from VBUS/PMID.
VSYS
10 µF
VBUS
PMID
R
Q4
VBUS
SW
VBUS
Q1
2.2 …F
Q2
47 nF
10 …F
BTST
REGN
REGN
Q3
PGND
2.2 …F
REGN
STAT
BAT
REGN
ICHG
TS
GND
Figure 9-6. Typical Application Diagram with Power Path
9.2.2.1 Design Requirements
For design requirements, see Section 9.2.1.1.
24
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9.2.3 Typical Application with MCU Programmable Charge Current
In some application cases, the charge current needs to be controlled by a MCU. In those cases, the GPIOs of
the MCU can be used for on/off control of the charge current setting resistors RICHG1 and RICHG2 as shown in
Figure 9-7. With GPIO1 and GPIO2 on/off control, three levels of charge current can be programmed. If the
charge current needs to be controlled smoothly in a wide range, a PWM output of the MCU can be used to
generate an average DC voltage output to program the charge current as shown in the Figure 9-7. The charge
current can be calculated as: (1V - VPWM) / (RICHG1 + RICHG2). VPWM is the averaged DC voltage of the PWM
output and it must be lower than 1 V. The regulated voltage at the ICHG pin is 1 V.
VBUS
SW
VBUS
Q1
2.2 …F
Q2
47 nF
10 …F
BTST
Q3
PMID
PGND
2.2 …F
REGN
BAT
STAT
REGN
REGN
REGN
2.2 …F
TS
MCU
RICHG1
GPIO1
RICHG2
ICHG
GPIO2
GND
Figure 9-7. Typical Application with MCU Programmed Charge Current
VBUS
SW
VBUS
Q1
2.2 …F
Q2
47 nF
10 …F
BTST
Q3
PMID
PGND
2.2 …F
REGN
BAT
STAT
REGN
REGN
REGN
2.2 …F
TS
MCU
RICHG2
PWM
RICHG1
ICHG
GND
Figure 9-8. Typical Application with MCU Programmed Charge Current
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9.2.3.1 Design Requirements
For design requirements, see Section 9.2.1.1.
26
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10 Power Supply Recommendations
In order to provide an output voltage on the BAT pin, the device requires a power supply between 4.1 V and 6.2
V Li-Ion battery with positive terminal connected to BAT. The source current rating needs to be at least 2 A in
order for the buck converter to provide maximum output power to BAT or the system connected to BAT pin.
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11 Layout
11.1 Layout Guidelines
The switching node rise and fall times should be minimized for minimum switching loss. Proper layout of the
components to minimize high frequency current path loop (see Figure 11-1) is important to prevent electrical and
magnetic field radiation and high frequency resonant problems. Follow this specific order carefully to achieve the
proper layout.
•
•
•
•
•
•
•
•
•
Place input capacitor as close as possible to PMID pin and GND pin and use shortest copper trace
connection or GND plane.
Put output capacitor near to the inductor output terminal and the charger device. Ground connections need to
be tied to the IC ground with a short copper trace or GND plane
Place inductor input terminal to SW pin as close as possible and limit SW node copper area to lower
electrical and magnetic field radiation. Do not use multiple layers in parallel for this connection. Minimize
parasitic capacitance from this area to any other trace or plane.
Route analog ground separately from power ground if possible. Connect analog ground and power ground
together using thermal pad as the single ground connection point under the charger device. It is acceptable to
connect all grounds to a single ground plane if multiple ground planes are not available.
Decoupling capacitors should be placed next to the device pins and make trace connection as short as
possible.
It is critical that the exposed thermal pad on the backside of the device be soldered to the PCB ground.
Ensure that there are sufficient thermal vias directly under the IC, connecting to the ground plane on the other
layers
Ensure that the number and sizes of vias allow enough copper for a given current path
Try to avoid ground planes in parallel with high frequency traces in other layers.
See the EVM design for the recommended component placement with trace and via locations.
+
+
±
Figure 11-1. High Frequency Current Path
11.2 Layout Example
The device pinout and component count are optimized for a 2 layer PCB design. The 2-layer PCB layout
example is shown in Figure 11-2.
28
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Top layer
GND
Bottom layer
1 µH
Vias
BTST
SW
SW
15
14
13
10 µF
GND
REGN
2
11
GND
STAT
3
10
BAT
ICHG
4
9
VSET
5
6
7
8
NC
12
TS
1
/EN
VBUS
POL
2.2 µF
PMID
VBUS
16
10 µF
2.2 µF
BAT
47 nF
Figure 11-2. Layout Example
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation see the following:BQ25300, BQ25301, BQ25302, BQ25320 Evaluation Module User's
Guide
12.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.7 Glossary
TI Glossary
30
This glossary lists and explains terms, acronyms, and definitions.
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13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
12-Apr-2023
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
BQ25302RTER
ACTIVE
WQFN
RTE
16
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
B25302
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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