User's Guide
SLUUAA7A – July 2013 – Revised August 2014
User's Guide for bq25570 Battery Charger Evaluation
Module for Energy Harvesting
This user’s guide describes the bq25570 evaluation module (EVM), how to perform a stand-alone
evaluation and how to allow the EVM to interface with the system and host. The boost charger output is
configured to deliver up to 4.2-V maximum voltage to its output, VSTOR, using external resistors. This
voltage will be applied to the storage element as long as the storage element voltage at VBAT is above
the internally programmed undervoltage of 2.0 V. The integrated buck converter provides up to 1.8 V and
100 mA at VOUT. The VBAT_OK indicator toggles high when VSTOR ramps up to 3.0 V and toggles low
when VSTOR ramps down to 2.8 V.
1
2
3
4
5
Contents
Introduction ................................................................................................................... 2
1.1
EVM Features ....................................................................................................... 2
1.2
General Description ................................................................................................ 2
1.3
Design and Evaluation Considerations .......................................................................... 3
1.4
EVM Schematic ..................................................................................................... 4
1.5
EVM I/O Connections .............................................................................................. 5
EVM Performance Specification Summary ............................................................................... 7
Test and Measurment Summary........................................................................................... 7
3.1
Test Setups and Results ........................................................................................... 8
Bill of Materials and Board Layout ....................................................................................... 17
4.1
Bill of Materials .................................................................................................... 17
4.2
EVM Board Layout ................................................................................................ 18
PCB Layout Guideline ..................................................................................................... 20
List of Figures
1
EVM Schematic .............................................................................................................. 4
2
Test Setup for Measuring Boost Charger Efficiency .................................................................... 9
3
Charger Efficiency versus Input Voltage .................................................................................. 9
4
Charger Efficiency versus Input Current ................................................................................ 10
5
Test Setup for Measuring Buck Converter Efficiency
11
6
Buck Converter Efficiency versus Output Current
11
7
8
9
10
11
12
13
14
15
.................................................................
....................................................................
Test Setup for Performing Load Transient on Buck Output ..........................................................
50-mA Load Transient on VOUT ...........................................................................................
Charger Operational Waveforms During 50-mA Load Transient ....................................................
Buck Operational Waveforms During 50-mA Load Transient ........................................................
Test Setup for Charging a Super Capacitor from Buck Output ......................................................
Charging a Super Cap from VOUT ........................................................................................
EVM PCB Top Assembly ..................................................................................................
EVM PCB Top Layer ......................................................................................................
EVM PCB Bottom Layer ...................................................................................................
12
12
13
14
15
15
18
18
19
List of Tables
1
2
................................................. 5
Bill of Materials ............................................................................................................. 17
I/O Connections and Configuration for Evaluation of bq25570 EVM
SLUUAA7A – July 2013 – Revised August 2014
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User's Guide for bq25570 Battery Charger Evaluation Module for Energy
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Copyright © 2013–2014, Texas Instruments Incorporated
1
Introduction
1
Introduction
1.1
EVM Features
•
•
•
•
•
•
1.2
www.ti.com
Evaluation module for bq25570
Ultra-low power boost charger and buck converter with battery management for energy harvester
applications
Resistor-programmable settings for over voltage providing flexible battery management
Programmable push-pull output indicator for battery status (VBAT_OK)
Test points for key signals available for testing purpose – easy probe hook-up.
Jumpers available – easy to change settings
General Description
The bq25570 is an integrated energy harvesting Nano-Power management solution that is well suited for
meeting the special needs of ultra-low power applications. The product is specifically designed to
efficiently acquire and manage the microwatts (µW) to miliwatts (mW) of power generated from a variety of
high output impedance (HiZ) DC sources like photovoltaic (solar) or thermal electric generators; or with an
AC/DC rectifier, a piezoelectric generator. The bq25570 implements a highly efficient, pulse-frequency
modulated (PFM) boost converter/charger targeted toward products and systems, such as wireless sensor
networks (WSN) which have stringent power and operational demands. Assuming a depleted storage
element has been attached, the bq25570 DC-DC boost converter/charger that requires only microwatts of
power to begin operating in cold start mode. Once the boost converter output, VSTOR, reaches ~1.8 V
and can now power the converter, the main boost converter can now more efficiently extract power from
low voltage output harvesters such as thermoelectric generators (TEGs) or single and dual cell solar
panels. For example, assuming the HiZ input source can provide at least 5 µW typical and the load on
VSTOR (including the storage element leakage current) is less than 1 µA of leakage current, the boost
converter can be started with VIN_DC as low as 330 mV typical, and once VSTOR reaches 1.8 V, can
continue to harvest energy down to VIN_DC ≃ 120 mV. The integrated PFM buck converter is also
powered from VSTOR and, assuming enough input power is available, provides up to 100 mA from the
VOUT pin. The VOUT voltage is externally programmed to slightly less than the VSTOR voltage.
HiZ DC sources have a maximum output power point (MPP) that varies with ambient conditions. For
example, a solar panel's MPP varies with the amount of light on the panel and with temperature. The MPP
is listed by the harvesting source manufacturer as a percentage of its open circuit (OC) voltage. Therefore,
the bq25570 implements a programmable maximum power point tracking (MPPT) sampling network to
optimize the transfer of power into the device. The bq25570 periodically samples the open circuit input
voltage every 16 seconds by disabling the boost converter for 256 ms and stores the programmed MPP
ratio of the OC voltage on the external reference capacitor (C2) at VREF_SAMP. Typically solar cells are
at their MPP when loaded to ~70–80% of their OC voltage and TEGs at ~50%. While the storage element
is less than the user programmed maximum voltage (VBAT_OV), the boost charger loads the harvesting
source until VIN_DC reaches the MPP (voltage at VREF_SAMP). This results in the boost charger
regulating the input voltage of the converter until the output reaches VBAT_OV, thus transferring the
maximum amount of power currently available per ambient conditions to the output.
The battery undervoltage, VBAT_UV, threshold is checked continuously to ensure that the internal battery
FET, connecting VSTOR to VBAT, does not turn on until VSTOR is above the VBAT_UV threshold (2.0
V).The over voltage (VBAT_OV) setting initially is lower than the programmed value at startup (varies on
conditions) and is updated after the first ~32 ms. Subsequent updates are every ~64 ms. The VBAT_OV
threshold sets maximum voltage on VSTOR and the boost converter stops switching when the voltage on
VSTOR reaches the VBAT_OV threshold. The open circuit input voltage (VIN_OC) is measured every ~16
seconds in order for the Maximum Power Point Tracking (MPPT) circuit to sample and hold the input
regulation voltage. This periodic update continually optimizes maximum power delivery based on the
harvesting conditions.
2
User's Guide for bq25570 Battery Charger Evaluation Module for Energy
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Introduction
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The bq25570 was designed with the flexibility to support a variety of energy storage elements. The
availability of the sources from which harvesters extract their energy can often be sporadic or timevarying. Systems will typically need some type of energy storage element, such as a re-chargeable
battery, super capacitor, or conventional capacitor. The storage element will make certain constant power
is available when needed for the systems. In general, the storage element also allows the system to
handle any peak currents that can not directly come from the input source. It is important to remember
that batteries and super capacitors can have significant leakage currents that need to be included with
determining the loading on VSTOR.
To prevent damage to a customer’s storage element, both maximum and minimum voltages are monitored
against the internally programmed under-voltage (VBAT_UV) and user programmed over-voltage
(VBAT_OV) levels.
To further assist users in the strict management of their energy budgets, the bq25570 toggles a user
programmable battery good flag (VBAT_OK), checked every 64 ms, to signal the microprocessor when
the voltage on an energy storage element or capacitor has risen above (OK_HYST threshold) or dropped
below (OK_PROG threshold) a pre-set critical level. To prevent the system from entering an undervoltage
condition or if starting up into a depleted storage element, it is highly recommended to isolate the system
load from VSTOR by 1) setting VBAT_OK equal to the buck converter's enable signal VOUT_EN and 2)
using an NFET to invert the BAT_OK signal so that it drives the gate of PFET, which isolates the system
load from VSTOR.
For details, see the bq25570 data sheet (SLUSBH2).
1.3
Design and Evaluation Considerations
This user's guide is not a replacement for the data sheet. Reading the data sheet first will help in
understanding the operations and features of this IC. In this document, “battery” or "VBAT" will be used
but one could substitute any appropriate storage element.
System Design Tips
Compared to designing systems powered from an AC/DC converter or large battery (for example, low
impedance sources), designing systems powered by HiZ sources requires that the system load-per-unit
time (for example, per day for solar panel) be compared to the expected loading per the same time unit.
Often there is not enough real time input harvested power (for example, at night for a solar panel) to run
the system in full operation. Therefore, the energy harvesting circuit collects more energy than being
drawn by the system when ambient conditions allow and stores that energy in a storage element for later
use to power the system. See SLUC461 for an example spreadsheet on how to design a real solar-panelpowered system in three easy steps:
1. Referring the system rail power back to VSTOR
2. Referring the required VSTOR power back to bq255xx input power
3. Computing the minimum solar panel area from the input power requirement
As demonstrated in the spreadsheet, for any boost converter, you must perform a power balance, POUT /
PIN = (VSTOR × ISTOR) / (VIN × IIN)= η where η is the estimated efficiency for the same or very similar
configuration in order to determine the minimum input power needed to supply the desired output power.
This IC is a highly efficient charger for a storage element such as a battery or super capacitor. The main
difference between a battery and a super capacitor is the capacity curve. The battery typically has little or
no capacity below a certain voltage, where as the capacitor does have capacity at lower voltages. Both
can have significant leakage currents that will appear as a DC load on VSTOR/VBAT.
SLUUAA7A – July 2013 – Revised August 2014
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3
Introduction
1.4
www.ti.com
EVM Schematic
Figure 1 is the schematic for this EVM.
VSTOR
VSTOR
TP4
VIN1
VSTOR
4.99M
JP1
VOC_SAMP
R4
10M
J1
4.99M
0.1V-4.0V
VIN J2
L1
GND
C4
4.7uF
0.1uF
VSTOR
C10
+
GND
J5
GND
VBAT
TP5
J6
J7
JP4 80%
JP1 to R3-R5
50%
R5
C5
VBAT
VOC_SAMP
VIN
TP6
C6
TP3
LBOOST TP2
LBUCK
1.8V (Adj. 1.3V-5.05V), 50mA
L2
J11
5
EN
17
18
19
16
LBUCK
NC
VBAT
VSTOR
22uF
6
VSS
15
VOUT
14
VBAT_OK
13
VOUT_SET
12
OK_PROG
11
C9
1
TP8
VOUT
J9
GND
GND
J12
GND
OK_HYST
VREF_SAMP
+
C3
J13
BAT_OK
10
VOC_SAMP
4
NC
3
9
4.7uF
0.1uF
TP9
VRDIV
C7
BQ25570RGR
BQ25570RGR
VBAT_OV
VOC_SAMP
C1
VIN_DC
VOUT_EN
1
C8
VSS
2
8
+
1
7
VIN1
20
21
PWPD
TP1
LBOOST
U1
GND
J8
VOUT
10 uH
J3
4.2V (Adj. up to 5.25V)
VBAT
J10
100u
22uH
GND
4.2V (Adj. up to 5.25V), 100mA
J4
1
R3
GND
VRDIV
VRDIV
BAT_OK
R6
VREF_SAMP
GND
TP7
JP5
JP6
887k
VOUT_EN
VRDIV
C2
0.01uF
R1
7.5M
R7
6.98M
R2
5.76M
R8
5.36M
R9
4.22M
VBAT
VBAT
/EN
GND
R10
8.66M
JP2
VSTOR
VSTOR
VOUT_EN
GND
JP3
1
Not Installed
Figure 1. EVM Schematic
4
User's Guide for bq25570 Battery Charger Evaluation Module for Energy
Harvesting
Copyright © 2013–2014, Texas Instruments Incorporated
SLUUAA7A – July 2013 – Revised August 2014
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Introduction
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1.5
EVM I/O Connections
Table 1. I/O Connections and Configuration for Evaluation of bq25570 EVM
Headers and
Terminals
Description
Comments/Recommended Setting
J1–VIN
Input source (+)
J2 - VIN/GND
Input source terminal block
J3–GND
Input source return (–)
If VIN_DC is higher than VSTOR and VSTOR is equal to VBAT_OV, the input VIN_DC is pulled to ground
through a small resistance to stop further charging of the attached battery or capacitor. It is critical that if
this case is expected, the impedance of the source attached to VIN_DC be higher than 20 Ω and not a
low impedance source.
J4 - VSTOR
Boost charger output (+)
Buck converter input
J5 - VSTOR/GND
Boost charger output terminal block
J6 - GND
Boost charger return (-)
J7– VBAT
Rechargeable storage element connection (+)
J8 - VBAT/GND
Rechargeable storage element terminal block
J9–GND
Rechargeable storage element connection return (–)
J10 – VOUT
Buck converter output (+)
J11 - VOUT/GND
Buck converter output terminal block
J12 -GND
Buck converter output (-)
J13 – BAT_OK
Battery Status Indicator (+/-)
Test Points
TP1
Input source (+)
TP2
Boost charger switching node
TP3
Buck converter switching node
TP4
Boost charger output, VSTOR (+)
TP5
Rechargeable storage element connection, BAT_SEC (+)
TP6
Buck converter output, VOUT (+)
TP7
VRDIV node
TP8
Output return (-)
TP9
Input return (-)
CAUTION Providing an additional low impedance current path in parallel with the feedback resistors , for
example, with a 10 MΩ scope probe attached, will degrade regulation accuracy.
Jumpers
JP1 – VOC_SAMP
VOC_SAMP = external resistors sized to configure the IC Uninstalled (NOTE: Do not install if JP4 shunt is installed)
to regulate VIN to 75% of VOC_SAMP.
JP2 - /EN
/EN = GND enables the IC. /EN=VSTOR disables the IC.
/EN=GND
JP3 - VOUT_EN
VOUT_EN = VSTOR enables the buck converter when
VSTOR is up VOUT_EN = GND disables the buck
converter
VOUT_EN=VSTOR (NOTE: Do not install if JP6 shunt is installed)
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Introduction
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Table 1. I/O Connections and Configuration for Evaluation of bq25570 EVM (continued)
Headers and
Terminals
Description
Comments/Recommended Setting
JP4 - VOC_SAMP
VOC_SAMP = 80% configures the IC to regulate VIN to
80% of OCV. VOC_SAMP = 50% configures the IC to
regulate VIN to 50% of OCV.
JP4 = 80% (NOTE: Do not install if JP1 shunt is installed)
JP5 - VREF_SAMP to
GND
VREF_SAMP = GND
Uninstalled (NOTE: Providing an additional leakage path for the VREF_SAMP capacitor for example,
through a 10 MΩ scope probe attached to VREF_SAMP, will degrade input voltage regulation
performance).
JP6 - VBAT_OK to
VOUT_EN
BAT_OK=VOUT_EN configures the buck converter to be
enabled only when VSTOR is greater than the VBAT_OK
threshold per the resistors (2.786V on the EVM)
Uninstalled (NOTE: Do not install if JP3 shunt is installed)
6
User's Guide for bq25570 Battery Charger Evaluation Module for Energy
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EVM Performance Specification Summary
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2
EVM Performance Specification Summary
See Data Sheet “Recommended Operating Conditions” for component adjustments. For details about the
resistor programmable settings, see bq25570 data sheet (SLUSBH2).
MIN
NOM
UNIT
VIN(DC)
DC input voltage into VIN_DC
VIN_Start-up(DC)
DC minimum start-up voltage into depleted storage element, no load attached
to VSTOR or VOUT and IBATLEAK 1MΩ is
recommended. However, during board assembly, contaminants such as solder flux and even some board
cleaning agents can leave residue that may form parasitic resistors across the physical resistors and/or
from one end of a resistor to ground, especially in humid, fast airflow environments. This can result in the
voltage regulation and threshold levels changing significantly from those expected per the installed resistor
values. Therefore, it is highly recommended that no ground planes be poured near the voltage setting
resistors. In addition, the boards must be carefully cleaned, possibly rotated at least once during cleaning,
and then rinsed with de-ionized water until the ionic contamination of that water is well above 50 MOhm. If
this is not feasible, then it is recommended that the sum of the voltage setting resistors be reduced to at
least 5X below the measured ionic contamination.
Revision History
Changes from Original (July 2013) to A Revision ........................................................................................................... Page
•
Changed contents in the bill of materials ............................................................................................. 17
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
20
Revision History
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EVALUATION MODULES
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expressly acknowledges, represents, and agrees, and takes sole responsibility and risk with respect to, the following:
1.
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Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de
l'utilisateur pour actionner l'équipement.
Concernant les EVMs avec appareils radio
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est
autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout
brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain
maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à
l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente
(p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante.
Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel
d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans
cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2014, Texas Instruments Incorporated
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Important Notice for Users of EVMs Considered “Radio Frequency Products” in Japan
EVMs entering Japan are NOT certified by TI as conforming to Technical Regulations of Radio Law of Japan.
If user uses EVMs in Japan, user is required by Radio Law of Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and
Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of
Japan,
Use EVMs only after user obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or
Use of EVMs only after user obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect
to EVMs. Also, do not transfer EVMs, unless user gives the same notice above to the transferee. Please note that if user does not
follow the instructions above, user will be subject to penalties of Radio Law of Japan.
http://www.tij.co.jp
【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 本開発キットは技術基準適合証明を受けておりません。 本製品の
ご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。
日本テキサス・インスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
http://www.tij.co.jp
Texas Instruments Japan Limited
(address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan
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www.ti.com/computers
DLP® Products
www.dlp.com
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Industrial
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Logic
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RFID
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www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
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Copyright © 2014, Texas Instruments Incorporated
