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Table of Contents
User’s Guide
BQ25620 and BQ25622 Evaluation Module
ABSTRACT
This user's guide provides detailed testing instructions for the BQ25620 and BQ25622 evaluation modules
(EVM). Also included are descriptions of the necessary equipment, equipment setup, and procedures. The
reference documentation contains the printed-circuit board layouts, schematics, and the bill of materials (BOM).
Throughout this user's guide, the abbreviations EVM, BQ25620EVM, BQ25622EVM, BMS050, and the term
evaluation module are synonymous with the BMS050 evaluation module, unless otherwise noted.
Table of Contents
1 Introduction.............................................................................................................................................................................2
1.1 EVM Features.................................................................................................................................................................... 2
1.2 General Descriptions..........................................................................................................................................................2
2 Testing Procedures.................................................................................................................................................................4
2.1 Equipment.......................................................................................................................................................................... 4
2.2 Hardware Setup................................................................................................................................................................. 4
2.3 Software Setup...................................................................................................................................................................5
2.4 Test Procedure................................................................................................................................................................... 7
3 PCB Layout Guideline.......................................................................................................................................................... 10
4 Board Layout, Schematic, and Bill of Materials................................................................................................................. 11
4.1 Board Layout.................................................................................................................................................................... 11
4.2 Schematic........................................................................................................................................................................ 13
4.3 Bill of Materials.................................................................................................................................................................15
5 Revision History................................................................................................................................................................... 17
List of Figures
Figure 2-1. Test Setup for BQ25620EVM and BQ25622EVM..................................................................................................... 4
Figure 2-2. BQStudio Device Type Selection Window.................................................................................................................5
Figure 2-3. BQStudio Charger Selection Window....................................................................................................................... 5
Figure 2-4. Main Window of BQ25620/2 EVM Software..............................................................................................................6
Figure 4-1. BMS050 Top Layer.................................................................................................................................................. 11
Figure 4-2. BMS050 Internal Layer 1......................................................................................................................................... 11
Figure 4-3. BMS050 Internal Layer 2.........................................................................................................................................12
Figure 4-4. BMS050 Bottom Layer............................................................................................................................................ 12
Figure 4-5. BQ25620EVM Schematic........................................................................................................................................13
Figure 4-6. BQ25622EVM Schematic........................................................................................................................................14
List of Tables
Table 1-1. Device Data Sheets.................................................................................................................................................... 2
Table 1-2. EVM I/O Connections................................................................................................................................................. 2
Table 1-3. EVM Jumper Shunt and Switch Installation................................................................................................................ 3
Table 1-4. Recommended Operating Conditions.........................................................................................................................3
Table 4-1. BMS050 Bill of Materials...........................................................................................................................................15
Trademarks
All trademarks are the property of their respective owners.
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BQ25620 and BQ25622 Evaluation Module
1
Introduction
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1 Introduction
The BMS050 evaluation module (EVM) is a complete charger module for evaluating the BQ25620 and
BQ25622 devices. The BQ25620 and BQ25622 are I2C-controlled single-cell chargers with NVDC Power Path
Management, Integrated ADC, and OTG Output.
For detailed features and operation, see Table 1-1 table for a list of devices and their data sheets.
Table 1-1. Device Data Sheets
Device
Data Sheet
EVM Label
BQ25620
SLUSEG2
BQ25620EVM
BQ25622
SLUSEG2
BQ25622EVM
1.1 EVM Features
This EVM supports the following features:
•
•
•
•
•
•
•
•
Evaluation module for the BQ25620 or BQ25622 devices.
Narrow VDC (NVDC) power path management for powering the systems and charging the battery.
Supports I2C communication for systems configuration and status reporting.
Test points for key signals available for testing purposes.
Jumpers for easy configuration.
One push-button for wake-up and reset input with adjustable timers.
Charge status (STAT) and Power Good (PG) LEDS for charging monitoring.
Connections for EV2400 or USB2ANY interface board controllers.
This EVM does not include the EV2400 or USB2ANY interface boards. To evaluate the EVM, an EV2400 or
USB2ANY must be ordered separately.
1.2 General Descriptions
Table 1-2 lists the input and output connections available on this EVM and their respective descriptions.
Table 1-2. EVM I/O Connections
Terminal
Description
J1(2) - VIN
Positive rail of the charger input voltage
J1(1) - GND
Ground
J2(1) - SYSTEM Positive rail of the charger system output voltage,
typically connected to the system load
2
J2(2) - GND
Ground
J3(1) - VPB
Positive rail of the charger output voltage for power
bank applications in reverse boost mode (OTG).
This output also shares the rail with the VIN input
rail in forward buck mode
J3(2)-GND
Ground
J4(3) BATTERY
Positive rail of the charger battery input, connected
to the positive terminal of the external battery
J4(2) - ext_ts
Connection available for external thermistor if
required
J4(1) - GND
Ground
J5
Input source Micro B USB port
J6
I2C connector for the USB2ANY interface board
J7
I2C connector for the EV2400 interface board
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Introduction
Table 1-3 lists the jumper and shunt installations available on this EVM and their respective descriptions.
Table 1-3. EVM Jumper Shunt and Switch Installation
Header
BQ25620 Setting BQ25622
Setting
Description
JP1
Not applicable
Not Installed
Not Installed
JP2
SCL pull-up rail. Not required if using EV2400 or USB2ANY
Not Installed
Not Installed
JP3
SDA pull-up rail. Not required if using EV2400 or USB2ANY
Not Installed
Not Installed
JP4
Not applicable
Not Installed
Not Installed
JP5
BQ25620EVM: Not applicable.BQ25622EVM: Connects ILIM pin resistor to ILIM pin.
Not Installed
Not Installed
JP6
BQ25620EVM: Micro B USB input D- connection to charger D- pin BQ25622EVM: Not
applicable.
Installed
Installed
JP7
PG pin LED indicator connection. On PG enabled chargers, this indicates the Power Good
status
Installed
Installed
JP8
STAT pin LED indicator connection. This indicates the current charger status
Installed
Installed
JP9
BQ25620EVM: Micro B USB input D- connection to charger D- pin BQ25622EVM: Not
applicable.
Installed
Installed
JP10
Used to connect USB2ANY SDA and SCL lines to a power rail on the PCB.
JP11
BQ25620EVM: TS resistor divider pull-up rail to REGN. BQ25622EVM: TS resistor divider
pull-up rail to TS_BIAS.
JP12
BQ25620EVM: Charger D+ pin and charger D- pin short connection. Connect this on D+/Ddetection enabled chargers to simulate the connection of a DCP-type USB port as defined
by USB BC1.2 and set IINDPM register to highest setting. BQ25622EVM: Not applicable.
Installed
Not Installed
JP13
Connect 10 kohm in parallel with TS resistor network to simulate a battery at 25 C.
Disconnect if using external thermistor.
Installed
Installed
JP14
CE pin connection to ground to enable charging. When removed, CE pin pulls up to SYS
through 10 kohm to disable charge
Installed
Installed
JP15
Not applicable
S1
Not Installed
Short pins 1-2
Not Installed
QON control switch. Press either for exiting Shipping Mode or System Reset.
Default Off
Not Installed
Short pins 2-3
Not Installed
Default Off
Table 1-4 lists the recommended operating conditions for this EVM.
Table 1-4. Recommended Operating Conditions
Symbol
Description
Min
VVBUS, VVAC
Input voltage applied to VBUS pin
3.9
VBAT
Battery voltage applied to BAT pin
0
IVBUS
Input current into VBUS
0
ISW
Output current from SW flowing to SYS pin load
and battery at BAT pin
IBAT
Fast charging current into battery at BAT pin
Continuous RMS discharge current through internal
BATFET
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0
Typ
4.208
Max
Unit
18.0
V
4.8
V
3.2
A
3.5
A
3.5
A
6
A
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3
Testing Procedures
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2 Testing Procedures
2.1 Equipment
This section includes a list of supplies required to perform tests on this EVM.
1. Power Supplies: Power Supply #1 (PS #1): A power supply capable of supplying 5 V at 3 A is required.
While this part can handle larger voltage and current, it is not necessary for this procedure.
2. Load #1 for simulating a battery: 4-Quadrant Supply, Constant Voltage < 4.5 V) "Kepco" Load, BOP,
20-5M, DC 0 to ±20 V, 0 to ±3.5 A (or higher)
Alternative Option: A 0–20V/0–3.5 A, > 30-W DC electronic load set in a constant voltage loading mode
3. Load #2 for simulating a load at SYS or load at VBUS in reverse/OTG mode: Electronic or Resistive
Load capable sinking up to 5-A from up to 9V (or higher)
4. Meters: 4x "Fluke 75" multi-meters, (equivalent or better).
Alternative Option: (2x) equivalent voltage meters and (2x) equivalent 3-A or higher rated current meters.
5. Computer: A Windows 10 based computer with at least one USB port and a USB cable. Must have the
latest version of Battery Management Studio installed.
6. USB-TO-GPIO Communication Kit: EV2400 USB-based PC interface board.
7. Software: BQStudio software with latest .bqz file for BQ2562x provided by Texas Instruments. Download
and install bqStudio from https://www.ti.com/tool/BQSTUDIO.
2.2 Hardware Setup
Use the following list to set up the EVM testing equipment:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Review EVM jumper connections in Table 1-3
Set PS #1 for 5-V DC, 2-A current limit and then turn off the supply.
Connect the output of PS#1 in series with a current meter to J1 (VBUS and PGND).
Connect a voltage meter across TP10 (VBUS) and TP31 (PGND), or across J1.
Turn on Load #1, set to constant voltage mode, and output to 2.5-V. Disable Load. Connect Load in series
with a current meter (multimeter), ground side, to J4 (BAT and PGND) as shown in Figure 2-1 in not using a
source meter with current measuring capabilities.
Connect a voltage meter across TP13 (BAT) and TP30 (PGND), or across J4-3 and J4-1 as in Figure 2-1
Connect a voltage meter across TP14 (SYS) and TP30 (PGND), or across J2-1 and J2-2 as in Figure 2-1
Connect a voltage meter across TP12 (PMID) or TP11 (VPB) and TP32 (PGND), or across J3-1 and J3-2 as
in Figure 2-1
Connect the EV2400 USB interface board to the computer with a USB cable and from I2C port to J5 with the
4-pin cable as in Figure 2-1
Install shunts as shown in Table 1-3. Note that the shunts in Figure 2-1 are not necessarily installed per the
table.
>
–
Power Supply #1
+
+
–
+
–
VSYS
VBAT
+
USB
Load #1
–
EV2400
4-pin Connector
Figure 2-1. Test Setup for BQ25620EVM and BQ25622EVM
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Testing Procedures
2.3 Software Setup
Use the following to set up the EVM testing software:
1. On the computer connected to the EV2400 interface board, launch Battery Management Studio (BQStudio).
Select Charger as seen in Figure 2-2.
Figure 2-2. BQStudio Device Type Selection Window
2. Select the appropriate configuration file based on the device from the window shown in Figure 2-3.
Figure 2-3. BQStudio Charger Selection Window
3. Choose
, on the window that appears, and the main window of the BQ25620/2 EVM
software will appear, as shown in Figure 2-4.
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Testing Procedures
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Figure 2-4. Main Window of BQ25620/2 EVM Software
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Testing Procedures
2.4 Test Procedure
2.4.1 Initial Power Up
Use the following steps for enabling the EVM test setup:
1. Ensure that Section 2.2 steps have been followed.
2. Ensure that Section 2.3 steps have been followed.
3. Turn on PS #1:
• Measure → VSYS (SYS-TP19 and PGND-TP21) = 3.70V ±0.2V
Note
Completely disconnect Load #1 from BATTERY connections if different value is seen.
2.4.2 I2C Register Communication Verification
Use the following steps for communication verification :
1. In the EVM software, click the
•
button
Verify that the GUI reads
in the top right corner.
Note
If the device reads
followed.
verify Section 2.2 and Section 2.4.1 steps have been
2. In the Field View (see Figure 2-4), make the following changes as necessary:
•
Set
•
Set
•
Set
– Note that BQ25622 ILIM pin resistor clamps the input current to 1-A unless that pin is disabled using
.
•
Set
•
Set
•
Set
•
Set
•
Check
•
Uncheck
2.4.3 Charger Mode Verification
Use the following steps for charger mode verification:
1. PS #1 should be on from Section 2.4.1. In the EVM software, click
• Verify that all Fault statuses read "Normal"
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Testing Procedures
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2. To confirm SYS voltage regulation, enable Load #1 (see Section 2.2) and take DMM measurements as
follows:
• Measure → VSYS (SYS-TP14 and PGND-TP27 or TP28 or TP29) = 3.65V ±0.3V
• Measure → VBAT (BAT-TP13 and PGND-TP27 or TP28 or TP29) = 2.5V ±0.2V
• Measure → IBAT = 240mA ±50mA
3. To confirm battery charge current regulation, change Load #1 to 3.7V and take DMM measurements as
follows:
• Measure → VSYS (SYS-TP14 and PGND-TP27 or TP28 or TP29) = 3.8V ±0.3V
• Measure → VBAT (BAT-TP13 and PGND-TP27 or TP28 or TP29) = 3.7V ±0.2V
• Measure → IBAT = 480mA ±100mA
4. To confirm input current limit operation, in the EVM software on the 16-bit tab, set fast charge current to
1040mA and then take DMM measurement ( or PS #1 measurement if accurate) as follows:
• Measure → IIN = 500mA ±200mA
2.4.4 Boost Mode Verification
Use the following steps for boost mode verification:
1. Turn off and disconnect PS #1.
2. Set Load #1, the battery simulator, to 3.7V and 2A current limit.
Note
If Load #1 connected from BATTERY-J4(3) to GND-J4(1) is not a four quadrant supply, remove
Load #1 and use PS #1, set to 3.7V, 2A current limit and connect to BATTERY-J4(3) and GNDJ4(1).
3. In the EVM software on the 16-bit tab, confirm that VOTG, the OTG regulation voltage, is set to 5.04V and
IOTG, the OTG current limit, is set to 1000 mA.
4. In the EVM software on the 8-bit tab under the Device Single Bit registers, enable OTG (EN_CHG can
remain enabled).
5. Connect Load #2 across VPB-J3(1) and PGND-J3(2).
6. Set Load #2 to 500mA constant current load (or resistance of 2.5 W) and the turn on the load.
7. To confirm the VOTG regulation,
• Measure→ VBUS = 5.04 V + 25 mV
8. Turn off and disconnect the power supply.
9. Remove Load #2 from the connection.
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Testing Procedures
2.4.5 Helpful Tips
1. The leads and cables to the various power supplies, batteries and loads have resistance. The current meters
also have series resistance. The charger dynamically reduces charge current depending on the voltage
sensed at its VBUS pin (using the VINDPM feature), BAT pin (as part of normal termination), and TS pin
(through its battery temperature monitoring feature via battery thermistor). Therefore, voltmeters must be
used to measure the voltage as close to the IC pins as possible instead of relying on the digital readouts of
the power supply. If a battery thermistor is not available, that shunts JP11 and JP13 are in place.
2. When using a source meter that can source and sink current as your battery simulator, TI highly
recommends adding a large (>=1000+ μF) capacitor at the EVM BATTERY and GND connector in order
to prevent oscillations at the BAT pin due to mismatched impedances of the charger output and source
meter input within their respective regulation loop bandwidths. Configuring the source meter for 4-wire
sensing eliminates the need for a separate voltmeter to measure the voltage at the BAT pin. When using
4-wire sensing, always ensure that the sensing leads are properly connected in order to prevent accidental
overvoltage by the power leads.
3. For precise measurements of input and output current, especially near termination, the current meter in
series with the battery or battery simulator should not be set to auto-range and may need to be removed
entirely. An alternate method for measuring charge current is to either use an oscilloscope with hall effect
current probe or by a differential voltage measurement across the relevant sensing resistors populated on
the BQ2526xEVM.
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BQ25620 and BQ25622 Evaluation Module
9
PCB Layout Guideline
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3 PCB Layout Guideline
Minimize the switching node rise and fall times for minimum switching loss. Proper layout of the components
minimizing high-frequency current path loop is important to prevent electrical and magnetic field radiation and
high-frequency resonant problems. This PCB layout priority list must be followed in the order presented for
proper layout:
1. For lowest switching noise during forward/charge mode, place the decoupling PMID capacitor and then bulk
PMID capacitor positive terminals as close as possible to PMID pin. Place the capacitor ground terminal
close to the GND pin using the shortest copper trace connection or GND plane on the same layer as the IC.
2. For lowest switching noise during reverse/OTG mode, place the SYS output capacitors' positive terminals
near the SYS pin. The capacitors' ground terminals must be via'd down through multiple vias to an all ground
internal layer that returns to IC GND pin through multiple vias under the IC.
3. Since REGN powers the internal gate drivers, place the REGN capacitor positive terminal close to REGN pin
to minimize switching noise. The capacitor's ground terminal must be via'd down through multiple vias to an
all ground internal layer that returns to IC GND pin through multiple vias under the IC.
4. Place the VBUS and BAT capacitors' positive terminals as close to the VBUS and BAT pins as possible.
The capacitors' ground terminals must be via'd down through multiple vias to an all ground internal layer that
returns to IC GND pin through multiple vias under the IC.
5. Place the inductor input pin near the positive terminal of the SYS pin capacitors. Due to the PMID capacitor
placement requirements, the inductor's switching node terminal must be via'd down with multiple via's to
a second internal layer with a wide trace that returns to the SW pin with multiple vias. Using multiple
vias ensures that the via's additional resistance is negligible compared to the inductor's dc resistance and
therefore does not impact efficiency. The vias additional series inductance is negligible compared to the
inductor's inductance.
6. Place the BTST capacitor on the opposite side from the IC using vias to connect to the BTST pin and SW
node.
7. A separate analog GND plane for non-power related resistors and capacitors is not required if those
components are placed away from the power components traces and planes.
8. Ensure that the I2C SDA and SCL lines are routed away from the SW node.
Additionally, it is important that the PCB footprint and solder mask cover the entire length of each of the pins.
GND, SW, PMID, SYS and BAT pins extend further into the package than the other pins. Using the entire length
of these pins reduces parasitic resistance and increases thermal conductivity from the package into the board.
See the EVM design for the recommended component placement with trace and via locations.
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Board Layout, Schematic, and Bill of Materials
4 Board Layout, Schematic, and Bill of Materials
4.1 Board Layout
The following figures illustrate the PCB board layers.
Figure 4-1. BMS050 Top Layer
Figure 4-2. BMS050 Internal Layer 1
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Board Layout, Schematic, and Bill of Materials
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Figure 4-3. BMS050 Internal Layer 2
Figure 4-4. BMS050 Bottom Layer
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Board Layout, Schematic, and Bill of Materials
4.2 Schematic
The schematics for the BQ25620EVM and BQ25622EVM are shown in the following figures.
TP1
VIN
3.9-13.5V
Up to 3.3A
L1
TP2
DNI
C1
C4
2.2uF
1µF
1µF
DNI
1000pF
R3
C5
REGN
1
2
4.7uF
R5
I
DN3.9
GND
J2
L2
DN2I .0
0.047uF
C6
R4
DN3I .9
TP4
R2
0.01
C3
C2
DNI
TP3
SYS
DNI
1µH
35V
0.01
J1
SW
VBUS
R1
2
1
VIN
GND
DNI
C7
0.1uF
DNI
C12
0.1uF
C11
C8
DNI 10uF
C9
10uF
0-4.67V
C10
10uF
DNI
PGND
2200pF
PGND
D1
PGND
TP5
VPB
R8
1
2
0.01
C14
1.2A J3
DNI
DNI
R7
7
4
PMID
DNI
4.7uF
C17
C16
1000pF DNI 10uF
C15
R9
DNI
100k
DNI
C18
0.1uF
10uF
D-_ILIM
SCL
R12
15.0k
2
DNI 1
3
DNI
R17
1
10.0k
2
2
DNI 1
2
1
REGN
DNI
BTST
1
REGN
2
DD+
JP2
R14
10.0k
PG
SCL
SDA
R16
10.0k
R15
10.0k
SYS
9
BAT
8
TS
6
QON
7
CE
GND
0.01
TS
/QON
15
ID
NT1
GND
TP9
D-_ILIM
R18
2.21k
R19
2.21k
R20
DNI .49k
2
DNI
1
1
2 DNI
ILIM_PD
CONNECT
VIN
TP12
C20
0.1uF
PMID
TP13
BAT
2
TP15
2
1
2
1
2
/PG LED
CONNECT
STAT
JP7
1
2
REGN
AGND
STAT LED
CONNECT
9
7
5
3
1
JP8
JP9
8
7
6
VPB
TP14
SYS
TP16
TP17
SCL
PMIDGD_/PG
5
PGND
10
8
6
4
2
TP18
/CE
USB2ANY
PULLUP
AGND
JP10
R23
REGN
TP21
TP20
STAT
TP22
TP23
1
2
1
TP19
/QON
SYS
10.0
/INT
SCL
SDA
2
3
TS
BTST
SDA
J6
D+_TSBIAS
TP11
TP10
VBUS
JP5
D5
Green
D4
Green
D-_ILIM
R22
R21
DNI .49k DNI
2.49k
2
D+_TSBIAS
J5
0-4.52V
AGND
SYS
1
2
JP6
3
4
BAT- (G
Thermi
BAT+
J4
Net-Tie
PGND
VIN
2
1
2
3
TS
BQ25620RYKR
1
9
10
11
D-
C19
0.1uF
JP3
PGND
D+
DNI
SYS
JP4
TP8
R10
PMIDGD_/PG
PMID_GOOD
PFET
CONTROL
1
PGND
BAT
REGN
AGND
VBUS
C13
10uF
BTST
INT
14
/CE
1
2
16
TP7
STAT
11
/INT
R13
10.0k
JP1
Q2
ZVN4106FTA
PMID
13
12
SDA
DNI
SW
17
3
PMIDGD_/PG
DNI
PGND
VBUS
10
STAT
PGND
30V
18
4
5
D+_TSBIAS
R11
2 0.0k
D3
DNI
100V
PGND
U1
0
Q1
SIA445EDJ-T1-GE3
6
5
2
1
3
VPB
GND
TP6
D+_TSBIAS
JP11
R24
5.23k
R26
4.7k
TS
NORMAL
JP13
R27
30.1k
R6
10.0k
CHARGE
ENABLE
2
1
D+_TSBIAS
TP33
SW
DNI
S1
JP14
TP26
TP25
PMIDGD_/PG
D-_ILIM
R25
2.21k
DNI
1
1
2
JP12
TP24
VPB
/QON
D6
Green
2
1
2
USB DUSB D+
/CE
TS
1
2 DNI
D-_ILIM
VPB
LED
CONNECT
4
3
2
1
SDA
SCL
TP27
TP28
TP29
TP30
TP31
TP32
J7
JP15
AGND
AGND
AGND
PGND
PGND
AGND
TEST POINTS
AGND
Figure 4-5. BQ25620EVM Schematic
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BQ25620 and BQ25622 Evaluation Module
13
Board Layout, Schematic, and Bill of Materials
TP1
VIN
3.9-13.5V
Up to 3.3A
L1
TP2
DNI
C4
2.2uF
DNI
1µF
1µF
DNI
1000pF
R3
C5
REGN
TP4
R2
1
2
4.7uF
R5
DNI
C7
0.1uF
DNI
C12
0.1uF
C11
I
DN3.9
SYSTEM
GND
J2
L2
I
DN2.0
0.047uF
C6
R4
DN3I .9
TP3
0.01
C3
C2
C1
SYS
DNI
1µH
35V
0.01
J1
SW
VBUS
R1
2
1
VIN
GND
www.ti.com
DNI
C8
10uF
C9
10uF
0-4.67V
C10
10uF
DNI
PGND
2200pF
PGND
D1
PGND
TP5
VPB
0.01
C14
1.2A J3
DNI
Q1
SIA445EDJ-T1-GE3
6
5
2
1
R8
1
2
DNI
U1
0
PMID
DNI
4.7uF
C16
C17
1000pF DNI 10uF
C15
R9
DNI
100k
17
DNI
C18
0.1uF
10uF
D-_ILIM
SCL
R12
15.0k
2
DNI 1
/INT
R13
10.0k
DNI
R17
1
10.0k
DNI 1
2
1
REGN
DNI
2
2
Q2
ZVN4106FTA
3
JP1
JP2
R14
10.0k
R16
10.0k
R15
10.0k
2
9
BAT
8
QON
CE
GND
0.01
6
TS
7
/QON
15
ID
GND
NT1
TP9
1
2
D-_ILIM
R18
2.21k
R19
2.21k
R20
DNI .49k
2
DNI
1
R22
2.49k
ILIM_PD
CONNECT
VIN
PMID
BAT
TP15
2
TP14
SYS
TP16
TP17
SCL
1
2
PMIDGD_/PG
5
1
2
/PG LED
CONNECT
STAT
JP7
1
2
REGN
AGND
STAT LED
CONNECT
9
7
5
3
1
JP8
JP9
8
7
6
TP11
VPB
TP13
TP12
C20
0.1uF
D+_TSBIAS
PGND
10
8
6
4
2
TP18
AGND
/CE
USB2ANY
PULLUP
JP10
R23
REGN
TP21
TP20
STAT
TP22
TP23
1
2
1
TP19
/QON
SYS
10.0
/INT
SCL
SDA
2
3
TS
BTST
SDA
J6
D+_TSBIAS
TP10
VBUS
JP5
2
D-_ILIM
R21
DNI .49k
2
D5
Green
D4
Green
DNI
J5
0-4.52V
AGND
SYS
DNI
JP6
4
BAT- (G ND)
Thermi stor
BAT+
J4
Net-Tie
PGND
1
2
2
3
1
2
3
TS
BQ25622RYKR
1
9
10
11
DD+
C19
0.1uF
JP3
PGND
VIN
DNI
SYS
JP4
TP8
R10
PMIDGD_/PG
PMID_GOOD
PFET
CONTROL
1
PGND
BAT
REGN
AGND
VBUS
C13
10uF
BTST
INT
14
/CE
1
2
1
SYS
TS
SCL
SDA
11
16
TP7
PG
13
12
SDA
DNI
BTST
STAT
3
PMIDGD_/PG
DNI2
PGND
SW
PMID
ILIM
TS_BIAS
10
STAT
PGND
30V
VBUS
REGN
4
5
D+_TSBIAS
R11
0.0k
D3
DNI
100V
PGND
18
7
4
3
VPB
GND
TP6
R7
D+_TSBIAS
JP11
R24
5.23k
/QON
1
2
TS
NORMAL
JP13
R27
30.1k
R6
10.0k
CHARGE
ENABLE
2
1
TP26
D+_TSBIAS
TP33
SW
DNI
S1
JP14
TP25
PMIDGD_/PG
D-_ILIM
R25
2.21k
DNI
1
TS
DNI 2
JP12
TP24
VPB
R26
4.7k
D6
Green
2
1
USB DUSB D+
/CE
1
2 DNI
D-_ILIM
VPB
LED
CONNECT
4
3
2
1
SDA
SCL
TP27
TP28
TP29
TP30
TP31
TP32
J7
JP15
AGND
AGND
AGND
PGND
PGND
AGND
TEST POINTS
AGND
Figure 4-6. BQ25622EVM Schematic
14
BQ25620 and BQ25622 Evaluation Module
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Board Layout, Schematic, and Bill of Materials
4.3 Bill of Materials
Table 4-1 lists the BQ25620EVM and BQ25622EVM BOM.
Table 4-1. BMS050 Bill of Materials
Designator
C2
C5
620EVM
1
1
622EVM
1
1
Value
Description
Package
Reference
Part Number
Manufacturer
1uF
CAP, CERM, 1
uF, 35 V, +/10%, X7R,
AEC-Q200
Grade 0, 0603
603
GMK107AB710
Taiyo Yuden
5KAHT
0.047uF
CAP, CERM,
0.047 uF, 25 V,
+/- 10%, X7R,
0402
402
GRM155R71E4
MuRata
73KA88D
GRM188R61E4
MuRata
75KE11D
C6
1
1
4.7uF
CAP, CERM,
4.7 uF, 25 V, +/603
10%, X5R,
0603
C9, C10, C13
3
3
10uF
CAP, CERM, 10
uF, 25 V, +/805
10%, X5R,
0805
C2012X5R1E10
TDK
6K125AB
10uF
CAP, CERM, 10
uF, 25 V, +/603
20%, X5R,
0603
GRT188R61E1
MuRata
06ME13D
402
C1005X7R1H1
04K050BE
C17
1
1
C18
1
1
0.1uF
CAP, CERM,
0.1 uF, 50 V,+/10%, X7R,
0402
D4, D5
2
1
Green
LED, Green,
SMD
1.6x0.8x0.8mm LTST-C190GKT Lite-On
H1, H2, H3, H4
4
4
Bumpon,
Hemisphere,
0.44 X 0.20,
Clear
Transparent
Bumpon
SJ-5303
(CLEAR)
3M
J1, J2, J3
3
3
Terminal Block,
5.08 mm, 2x1,
Brass, TH
2x1 5.08 mm
Terminal Block
ED120/2DS
On-Shore
Technology
J4
1
1
Terminal Block,
5.08 mm, 3x1,
Brass, TH
3x1 5.08 mm
Terminal Block
ED120/3DS
On-Shore
Technology
1
Connector,
Receptacle,
Micro-USB
Type B, R/A,
Bottom Mount
SMT
7.5x2.45x5mm
473460001
Molex
5x2 Shrouded
header
N2510-6002-RB 3M
J5
1
TDK
J6
1
1
Header
(shrouded),
100mil, 5x2,
HighTemperature,
Gold, TH
J7
1
1
Header (friction
lock), 100mil,
4x1 R/A Header 22/05/3041
4x1, R/A, TH
Molex
JP2, JP3, JP7,
JP8, JP10,
JP13, JP14
7
7
Header, 100mil, Header, 2 PIN,
2x1, Tin, TH
100mil, Tin
Sullins
Connector
Solutions
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PEC02SAAN
BQ25620 and BQ25622 Evaluation Module
15
Board Layout, Schematic, and Bill of Materials
www.ti.com
Table 4-1. BMS050 Bill of Materials (continued)
620EVM
622EVM
JP6, JP9, JP12
3
0
Header, 100mil, Header, 2 PIN,
2x1, Tin, TH
100mil, Tin
PEC02SAAN
Sullins
Connector
Solutions
JP5
0
1
Header, 100mil, Header, 2 PIN,
2x1, Tin, TH
100mil, Tin
PEC02SAAN
Sullins
Connector
Solutions
JP11
1
1
Header, 100mil, Header, 3 PIN,
3x1, Tin, TH
100mil, Tin
PEC03SAAN
Sullins
Connector
Solutions
Description
Part Number
Manufacturer
L2
1
1
1uH
1µH @ 20%
Shielded
Molded Inductor
SMT_IND_2MM 252012CDMCD
4.2A 42mOhm
Sumida
0_2MM5
DS-1R0MC
Max 1008 Isat:
4.6A (2520
Metric) -
R1, R2, R8,
R10
4
4
0.01
RES, 0.01, 1%,
2010
1 W, 2010
WSL2010R010
0FEA18
R6, R13, R14,
R15, R16
5
5
10.0k
RES, 10.0 k,
1%, 0.063 W,
AEC-Q200
Grade 0, 0402
CRCW040210K
Vishay-Dale
0FKED
R7
1
1
0
RES, 0, 1%, 0.5
805
W, 0805
5106
2.21k
RES, 2.21 k,
1%, 0.063 W,
AEC-Q200
Grade 0, 0402
402
CRCW04022K2
Vishay-Dale
1FKED
402
CRCW04022K4
Vishay-Dale
9FKED
R18, R19
2
2
402
Vishay-Dale
Keystone
R22
0
1
2.49k
RES, 2.49 k,
1%, 0.063 W,
AEC-Q200
Grade 0, 0402
R23
1
1
10
RES, 10.0, 1%,
0.25 W, AEC1206
Q200 Grade 0,
1206
ERJ-8ENF10R0
Panasonic
V
5.23k
RES, 5.23 k,
1%, 0.063 W,
AEC-Q200
Grade 0, 0402
402
CRCW04025K2
Vishay-Dale
3FKED
CRCW04024K7
Vishay-Dale
0JNED
R24
1
1
R26
1
1
4.7k
RES, 4.7 k, 5%,
0.063 W, AEC402
Q200 Grade 0,
0402
R27
1
1
30.1k
RES, 30.1 k,
1%, 0.063 W,
AEC-Q200
Grade 0, 0402
402
CRCW040230K
Vishay-Dale
1FKED
Switch,
Normally open,
2.3N force,
200k
operations,
SMD
KSR
KSR221GLFS
C&K
Components
Shunt, 100mil,
Gold plated,
Black
Shunt
SNT-100-BK-G
Samtec
S1
1
1
SH-JP2, SHJP3, SH-JP7,
SH-JP8, SHJP10, SH-JP11,
SH-JP13, SHJP14
8
8
16
Value
Package
Reference
Designator
BQ25620 and BQ25622 Evaluation Module
1x2
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Revision History
Table 4-1. BMS050 Bill of Materials (continued)
620EVM
622EVM
SH-JP6, SHJP9, SH-JP12
3
0
1x2
Shunt, 100mil,
Gold plated,
Black
Shunt
SNT-100-BK-G
Samtec
JP5
0
1
1x2
Shunt, 100mil,
Gold plated,
Black
Shunt
SNT-100-BK-G
Samtec
TP1, TP2, TP3,
TP4, TP5, TP6,
TP7, TP8,
TP16, TP17,
TP18, TP19,
TP20, TP21,
TP22, TP23,
TP24, TP25,
TP26
19
19
Test Point,
Miniature,
White, TH
White Miniature
5002
Testpoint
Keystone
TP9, TP10,
TP11, TP12
4
4
Test Point,
Miniature, Red,
TH
Red Miniature
Testpoint
5000
Keystone
TP13
1
1
Test Point,
Miniature,
Yellow, TH
Yellow Miniature
5004
Testpoint
Keystone
TP14, TP15,
TP33
3
3
Test Point,
Miniature,
Orange, TH
Orange
Miniature
Testpoint
5003
Keystone
TP27, TP28,
TP29
3
Test Point,
Multipurpose,
Black, TH
Black
Multipurpose
Testpoint
5011
Keystone
TP30, TP31,
TP32
3
3
Test Point,
Compact, SMT
Testpoint_Keyst
5016
one_Compact
Keystone
0
I2C Controlled,
3.5-A or 2-A,
Maximum 17V
or 18V Input,
Charger with
NVDC Power
Path
Management
and OTG
Output
WQFN-HR18
BQ25620RYKR
Texas
Instruments
1
I2C Controlled,
3.5-A or 2-A,
Maximum 17V
or 18V Input,
Charger with
NVDC Power
Path
Management
and OTG
Output
WQFN-HR18
BQ25622RYKR
Texas
Instruments
U1
U1
1
0
Value
Description
Package
Reference
Designator
Part Number
Manufacturer
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (October 2022) to Revision A (November 2022)
Page
• Added BQ25622EVM to user's guide................................................................................................................. 2
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Copyright © 2022 Texas Instruments Incorporated
BQ25620 and BQ25622 Evaluation Module
17
STANDARD TERMS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or
documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM.
User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.
2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
WARNING
Evaluation Kits are intended solely for use by technically qualified,
professional electronics experts who are familiar with the dangers
and application risks associated with handling electrical mechanical
components, systems, and subsystems.
User shall operate the Evaluation Kit within TI’s recommended
guidelines and any applicable legal or environmental requirements
as well as reasonable and customary safeguards. Failure to set up
and/or operate the Evaluation Kit within TI’s recommended
guidelines may result in personal injury or death or property
damage. Proper set up entails following TI’s instructions for
electrical ratings of interface circuits such as input, output and
electrical loads.
NOTE:
EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.
www.ti.com
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software
associated with the kit to determine whether to incorporate such items in a finished product and software developers to write
software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or
otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition
that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference.
Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must
operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
2
www.ti.com
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the
instructions set forth by Radio Law of Japan, which includes, but is not limited to, the instructions below with respect to EVMs
(which for the avoidance of doubt are stated strictly for convenience and should be verified by User):
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/
/www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
3.4 European Union
3.4.1
For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive):
This is a class A product intended for use in environments other than domestic environments that are connected to a
low-voltage power-supply network that supplies buildings used for domestic purposes. In a domestic environment this
product may cause radio interference in which case the user may be required to take adequate measures.
3
www.ti.com
4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY MATERIALS PROVIDED WITH THE EVM (INCLUDING, BUT NOT
LIMITED TO, REFERENCE DESIGNS AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL
FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT
NOT LIMITED TO ANY EPIDEMIC FAILURE WARRANTY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE
SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS SHALL BE
CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR
INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE
EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR
IMPROVEMENT, REGARDLESS OF WHEN MADE, CONCEIVED OR ACQUIRED.
7.
4
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS. THIS OBLIGATION SHALL APPLY
WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL
THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
www.ti.com
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS OR THE USE OF THE EVMS , REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR
REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING,
OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF
USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI
MORE THAN TWELVE (12) MONTHS AFTER THE EVENT THAT GAVE RISE TO THE CAUSE OF ACTION HAS
OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY USE OF AN EVM PROVIDED
HEREUNDER, INCLUDING FROM ANY WARRANTY, INDEMITY OR OTHER OBLIGATION ARISING OUT OF OR IN
CONNECTION WITH THESE TERMS, , EXCEED THE TOTAL AMOUNT PAID TO TI BY USER FOR THE PARTICULAR
EVM(S) AT ISSUE DURING THE PRIOR TWELVE (12) MONTHS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE
CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2019, Texas Instruments Incorporated
5
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2022, Texas Instruments Incorporated
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