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bq27545-G1
SLUSAT0E – OCTOBER 2012 – REVISED MAY 2018
bq27545-G1 Single-Cell Li-Ion Battery Fuel Gauge For Battery Pack Integration
1 Features
3 Description
•
The bq27545-G1 Li-ion battery fuel gauge is a
microcontroller peripheral that provides fuel gauging
for single-cell Li-Ion battery packs. The device
requires little system microcontroller firmware
development for accurate battery fuel gauging. The
bq27545-G1 resides within the battery pack or on the
system’s main-board with an embedded battery (non
removable).
1
•
•
•
•
•
Battery Fuel Gauge for 1-Series (1sXp) Li-Ion
Applications up to 14500-mAh Capacity
Microcontroller Peripheral Provides:
– Internal or External Temperature Sensor for
Battery Temperature Reporting
– SHA-1/HMAC Authentication
– Lifetime Data Logging
– 64 Bytes of Non-Volatile Scratch Pad FLASH
Battery Fuel Gauging Based on Patented
Impedance Track™ Technology
– Models Battery Discharge Curve for Accurate
Time-To-Empty Predictions
– Automatically Adjusts for Battery Aging,
Battery Self-Discharge, and Temperature and
Rate Inefficiencies
– Low-Value Sense Resistor (5 mΩ to 20 mΩ)
Advanced Fuel Gauging Features
– Internal Short Detection
– Tab Disconnection Detection
HDQ and I2C™ Interface Formats for
Communication with Host System
Small 15-Ball Nano-Free™ (DSBGA) Packaging
The bq27545-G1 uses the patented Impedance
Track™ algorithm for fuel gauging, and provides
information such as remaining battery capacity
(mAh), state-of-charge (%), run-time to empty
(minimum), battery voltage (mV), and temperature
(°C). It also provides detections for internal short or
tab disconnection events.
The bq27545-G1 also features integrated support for
secure battery pack authentication, using the SHA1/HMAC authentication algorithm.
The device comes in a 15-ball Nano-Free™ DSBGA
package (2.61 mm × 1.96 mm) that is ideal for space
constrained applications.
Device Information(1)
PART NUMBER
bq27545-G1
YZF (15)
BODY SIZE (NOM)
2.61 mm × 1.96 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
•
•
PACKAGE
Smartphones
Tablets
Digital Still and Video Cameras
Handheld Terminals
MP3 or Multimedia Players
Simplified Schematic
Single Cell Li -Ion Battery Pack
PACK+
REGIN
VCC
BAT
HDQ
HDQ
SDA
SDA
SCL
SCL
TS
SRP
PROTECTION
IC
SE
CE
CHG
PACK–
SRN
VSS
DSG
FET
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq27545-G1
SLUSAT0E – OCTOBER 2012 – REVISED MAY 2018
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
7.6
Absolute Maximum Ratings ...................................... 4
ESD Ratings.............................................................. 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 4
Electrical Characteristics: Supply Current................. 5
Electrical Characteristics: Digital Input and Output
DC .............................................................................. 5
7.7 Electrical Characteristics: Power-On Reset .............. 5
7.8 Electrical Characteristics: 2.5-V LDO Regulator ....... 5
7.9 Electrical Characteristics: Internal Clock Oscillators. 6
7.10 Electrical Characteristics: Integrating ADC
(Coulomb Counter) Characteristics............................ 6
7.11 Electrical Characteristics: ADC (Temperature and
Cell Voltage) .............................................................. 6
7.12 Electrical Characteristics: Data Flash Memory ....... 6
7.13 HDQ Communication Timing Characteristics ......... 7
7.14 I2C-Compatible Interface Timing Characteristics .... 7
7.15 Typical Characteristics ............................................ 9
8
Detailed Description ............................................ 10
8.1
8.2
8.3
8.4
8.5
8.6
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
Programming...........................................................
Register Maps .........................................................
10
11
11
16
24
39
Application and Implementation ........................ 41
9.1 Application Information............................................ 41
9.2 Typical Application ................................................. 41
10 Power Supply Recommendations ..................... 45
10.1 Power Supply Decoupling ..................................... 45
11 Layout................................................................... 45
11.1 Layout Guidelines ................................................. 45
11.2 Layout Example .................................................... 46
12 Device and Documentation Support ................. 47
12.1
12.2
12.3
12.4
12.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
47
47
47
47
47
13 Mechanical, Packaging, and Orderable
Information ........................................................... 47
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (November 2015) to Revision E
Page
•
Changed the Simplified Schematic......................................................................................................................................... 1
•
Changed the description for the SRP pin ............................................................................................................................... 3
Changes from Revision C (September 2015) to Revision D
Page
•
Changed "Typical Application Diagram" to "Simplified Schematic"........................................................................................ 1
•
Changed the body size .......................................................................................................................................................... 1
•
Changed "Device Options" to "Device Comparison Table" ................................................................................................... 3
•
Changed the descriptions for the SRP and SRN pins............................................................................................................ 3
•
Changed Electrical Characteristics: Power-On Reset ........................................................................................................... 5
•
Changed all instances of "relaxation mode" to "RELAX mode" .......................................................................................... 13
•
Added "FULLSLEEP mode" to the introduction in Power Modes ....................................................................................... 19
Changes from Revision B (October 2012) to Revision C
Page
•
Changed 32-Ahr to 14,500-mAh ............................................................................................................................................ 1
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
2
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5 Device Comparison Table
(1)
(2)
PART
NUMBER (1)
FIRMWARE
VERSION
PACKAGE (2)
TA
COMMUNICATION FORMAT
BQ27545-G1
2.24
CSP–15
–40°C to 85°C
I2C, HDQ (1)
bq27545-G1 is shipped in I2C mode.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
6 Pin Configuration and Functions
Pin Functions
PIN
TYPE (1)
DESCRIPTION
A1
IA
Analog input pin connected to the internal coulomb counter where SRP is nearest the CELL– connection.
Connect to a 5-mΩ to 20-mΩ sense resistor.
SRN
B1
IA
Analog input pin connected to the internal coulomb counter where SRN is nearest the PACK– connection.
Connect to the 5-mΩ to 20-mΩ sense resistor.
VSS
C1, C2
P
Device ground
SE
C3
O
Shutdown Enable output. Push-pull output.
VCC
D1
P
Regulator output and processor power. Decouple with 1-µF ceramic capacitor to VSS.
REGIN
E1
P
Regulator input. Decouple with 0.1-µF ceramic capacitor to VSS.
HDQ
A2
I/O
HDQ serial communications line (Slave). Open drain.
TS
B2
IA
Pack thermistor voltage sense (use 103AT-type thermistor). ADC input.
CE
D2
I
BAT
E2
IA
SCL
A3
I
SDA
B3
I/O
Slave I2C serial communications data line for communication with system (Master). Open-drain I/O. Use
with 10-kΩ pullup resistor (typical).
D3, E3
NC
Do not connect for proper operation; reserved for future GPIO.
NAME
NO.
SRP
NC/GPIO
(1)
Chip Enable. Internal LDO is disconnected from REGIN when driven low.
Cell-voltage measurement input. ADC input. Recommend 4.8-V maximum for conversion accuracy.
Slave I2C serial communications clock input line for communication with system (Master). Use with 10-kΩ
pullup resistor (typical).
IA = Analog input, I/O = Digital input/output, P = Power connection, NC = No connect
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
VI
Regulator input, REGIN
–0.3
5.5
V
VCC
Supply voltage
–0.3
2.75
V
VIOD
Open-drain I/O pins (SDA, SCL, HDQ)
–0.3
5.5
V
VBAT
BAT input, (pin E2)
–0.3
5.5
V
VI
Input voltage range to all others (pins GPIO, SRP, SRN, TS)
–0.3
VCC + 0.3
V
TA
Operating free-air temperature
–40
85
°C
TF
Functional temperature
–40
100
°C
Tstg
Storage temperature
–65
150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS001 (1)
BAT pin
±1500
all pins
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
UNIT
V
±500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
TA = –40°C to 85°C; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted)
MIN NOM
VI
No operating restrictions
Supply voltage, REGIN
No FLASH writes
External input capacitor for internal LDO
Nominal capacitor values specified.
between REGIN and VSS
Recommend a 5% ceramic X5R type capacitor
External output capacitor for internal
located close to the device.
LDO between VCC an VSS
CREGIN
CLDO25
tPUCD
MAX
2.8
4.5
2.45
2.8
V
0.1
µF
1
µF
250
ms
0.47
Power-up communication delay
UNIT
7.4 Thermal Information
bq27545-G1
THERMAL METRIC (1)
YZF (DSBGA)
UNIT
15 PINS
RθJA
Junction-to-ambient thermal resistance
70
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
17
°C/W
RθJB
Junction-to-board thermal resistance
20
°C/W
ψJT
Junction-to-top characterization parameter
1
°C/W
ψJB
Junction-to-board characterization parameter
18
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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7.5 Electrical Characteristics: Supply Current
TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted)
PARAMETER
ICC
Normal operating mode current
I(SLP)
Low-power operating mode
current (1)
I(FULLSLP)
I(HIB)
(1)
TEST CONDITIONS
MIN
Fuel gauge in NORMAL mode
ILOAD > Sleep Current
(1)
TYP
MAX
UNIT
118
μA
Fuel gauge in SLEEP mode
ILOAD < Sleep Current
62
μA
Low-power operating mode
current (1)
Fuel gauge in FULLSLEEP mode
ILOAD < Sleep Current
23
μA
HIBERNATE operating mode
current (1)
Fuel gauge in HIBERNATE mode
ILOAD < Hibernate Current
8
μA
Specified by design. Not tested in production.
7.6 Electrical Characteristics: Digital Input and Output DC
TA = -40°C to 85°C; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOL
Output voltage low (HDQ, SDA,
SCL, SE)
IOL = 3 mA
VOH(PP)
Output high voltage (SE)
IOH = –1 mA
VCC–0.5
V
VOH(OD)
Output high voltage (HDQ, SDA,
SCL)
External pullup resistor connected to VCC
VCC–0.5
V
VIL
Input voltage low (HDQ, SDA, SCL)
VIH
Input voltage high (HDQ, SDA,
SCL)
VIL(CE)
CE Low-level input voltage
VIH(CE)
CE High-level input voltage
Ilkg
Input leakage current (I/O pins)
0.4
VREGIN = 2.8 V to 4.5 V
V
–0.3
0.6
V
1.2
5.5
V
2.65
0.8
VREGIN–0.5
0.8
0.3
V
μA
7.7 Electrical Characteristics: Power-On Reset
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIT+
Positive-going battery voltage input at
VCC
VHYS
Power-on reset hysteresis
MIN
TYP
MAX
2.05
2.15
2.2
115
UNIT
V
mV
7.8 Electrical Characteristics: 2.5-V LDO Regulator
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
VCC
Regulator output voltage, VCC
TEST CONDITION
MIN
TYP
MAX
2.8 V ≤ V(REGIN) ≤ 4.5 V,
IOUT ≤ 16 mA
2.3
2.5
2.6
2.45 V ≤ V(REGIN) < 2.8 V (low battery), IOUT ≤ 3 mA
2.3
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UNIT
V
V
5
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7.9 Electrical Characteristics: Internal Clock Oscillators
TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
f(OSC)
Operating frequency
2.097
MHz
f(LOSC)
Operating frequency
32.768
kHz
7.10 Electrical Characteristics: Integrating ADC (Coulomb Counter) Characteristics
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
VSR
Input voltage range, V(SRN) and V(SRP)
VSR = V(SRN) – V(SRP)
tCONV(SR)
Conversion time
Single conversion
MIN
14
VOS(SR)
Input offset
INL
Integral nonlinearity error
ZIN(SR)
Effective input resistance (1)
Ilkg(SR)
Input leakage current (1)
MAX
UNIT
0.125
V
1
Resolution
(1)
TYP
–0.125
s
15
10
±0.007
bits
μV
±0.034
2.5
FSR
MΩ
0.3
μA
Specified by design. Not production tested.
7.11 Electrical Characteristics: ADC (Temperature and Cell Voltage)
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V
(unless otherwise noted)
MAX
UNIT
VIN(TS)
Input voltage range (TS)
PARAMETER
TEST CONDITIONS
VSS – 0.125
MIN
VCC
V
VIN(BAT)
Input voltage range (BAT)
VSS – 0.125
5
V
VIN(ADC)
Input voltage range to ADC
G(TEMP)
Temperature sensor voltage gain
tCONV(ADC)
Conversion time
0.05
1
–2
Resolution
14
VOS(ADC)
Input offset
Z(TS)
Effective input resistance (TS)
(1)
Effective input resistance (BAT)
Ilkg(ADC)
Input leakage current
(1)
V
mV/°C
125
ms
15
bits
1
Z(BAT)
(1)
TYP
mV
bq27545-G1 not measuring
external temperature
8
MΩ
bq27545-G1 not measuring cell
voltage
8
MΩ
bq27545-G1 measuring cell
voltage
100
kΩ
0.3
μA
Specified by design. Not production tested.
7.12 Electrical Characteristics: Data Flash Memory
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
tDR
Data retention
TEST CONDITIONS
(1)
Flash programming write-cycles
tWORDPROG
Flash-write supply current
Data flash master erase time (1)
tPGERASE
Flash page erase time (1)
MAX
UNIT
10
Years
20,000
Cycles
(1)
tDFERASE
6
TYP
Word programming time (1)
ICCPROG
(1)
(1)
MIN
5
2
ms
10
mA
200
ms
20
ms
Specified by design. Not production tested.
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7.13 HDQ Communication Timing Characteristics
TA = –40°C to 85°C, CREG = 0.47 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
t(CYCH)
Cycle time, host to bq27545-G1
190
t(CYCD)
Cycle time, bq27545-G1 to host
190
250
μs
t(HW1)
Host sends 1 to bq27545-G1
0.5
50
μs
t(DW1)
bq27545-G1 sends 1 to host
32
50
μs
t(HW0)
Host sends 0 to bq27545-G1
86
145
μs
t(DW0)
bq27545-G1 sends 0 to host
80
145
μs
t(RSPS)
Response time, bq27545-G1 to host
190
950
μs
t(B)
Break time
190
t(BR)
Break recovery time
t(RISE)
HDQ line rising time to logic 1 (1.2 V)
μs
205
μs
40
μs
950
ns
7.14 I2C-Compatible Interface Timing Characteristics
TA = –40°C to 85°C, CREG = 0.47 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
tr
SCL/SDA rise time
300
ns
tf
SCL/SDA fall time
300
ns
tw(H)
SCL pulse width (high)
600
ns
tw(L)
SCL pulse width (low)
1.3
μs
tsu(STA)
Setup for repeated start
600
ns
td(STA)
Start to first falling edge of SCL
600
ns
tsu(DAT)
Data setup time
1000
ns
th(DAT)
Data hold time
tsu(STOP)
Setup time for stop
tBUF
Bus free time between stop and start
fSCL
(1)
(1)
Clock frequency
0
ns
600
ns
66
μs
400
kHz
If the clock frequency (fSCL) is > 100 kHz, use 1-byte write commands for proper operation. All other transactions types are supported at
400 kHz. (Refer to I2C Interface.)
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1.2V
t(RISE)
t(BR)
t(B)
(b) HDQ line rise time
(a) Break and Break Recovery
t(DW1)
t(HW1)
t(DW0)
t(CYCD)
t(HW0)
t(CYCH)
(d) Gauge Transmitted Bit
(c) Host Transmitted Bit
1-bit
R/W
7-bit address
Break
8-bit data
t(RSPS)
(e) Gauge to Host Response
Figure 1. HDQ Timing Diagrams
tSU(STA)
tw(H)
tf
tw(L)
tr
t(BUF)
SCL
SDA
td(STA)
tsu(STOP)
tf
tr
th(DAT)
tsu(DAT)
REPEATED
START
STOP
START
Figure 2. I2C-Compatible Interface Timing Diagrams
8
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7.15 Typical Characteristics
8.8
VREGIN = 2.7 V
2.60
VREGIN = 4.5 V
2.55
2.50
2.45
2.40
fOSC - High Frequency Oscillator (MHz)
VCC - Regulator Output Voltage (V)
2.65
2.35
±40
0
±20
20
40
60
80
8.6
8.5
8.4
8.3
8.2
8.1
8
-40
100
Temperature (ƒC)
8.7
5
33.5
4
Reported Temperature Error (qC)
fLOSC - Low Frequency Oscillator (kHz)
34
33
32.5
32
31.5
31
30.5
-20
0
20
40
Temperature (qC)
0
20
40
Temperature (qC)
60
80
60
80
100
D002
Figure 4. High-Frequency Oscillator Frequency Vs.
Temperature
Figure 3. Regulator Output Voltage Vs.
Temperature
30
-40
-20
C001
100
3
2
1
0
-1
-2
-3
-4
-5
-30
-20
D003
Figure 5. Low-Frequency Oscillator Frequency Vs.
Temperature
-10
0
10
20
30
Temperature (qC)
40
50
60
D004
Figure 6. Reported Internal Temperature Measurement Vs.
Temperature
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8 Detailed Description
8.1 Overview
The bq27545-G1 accurately predicts the battery capacity and other operational characteristics of a single Libased rechargeable cell. It can be interrogated by a system processor to provide cell information, such as stateof-charge (SOC) and time-to-empty (TTE).
Information is accessed through a series of commands, called Standard Commands. Further capabilities are
provided by the additional Extended Commands set. Both sets of commands, indicated by the general format
Command(), are used to read and write information in the bq27545-G1 control and status registers, as well as its
data flash locations. Commands are sent from the system to the gauge using the bq27545-G1 serial
communications engine, and can be executed during application development, pack manufacture, or endequipment operation.
Cell information is stored in the bq27545-G1 in non-volatile flash memory. Many of these data flash locations are
accessible during application development. They cannot, generally, be accessed directly during end-equipment
operation. To access to these locations, use the bq27546-G1 companion evaluation software, individual
commands, or a sequence of data-flash-access commands. To access a desired data flash location, the correct
data flash Subclass and offset must be known.
The bq27545-G1 provides 64 bytes of user-programmable data flash memory, partitioned into two (2) 32-byte
blocks: Manufacturer Info Block A and Manufacturer Info Block B. This data space is accessed through a
data flash interface. For specific details on accessing the data flash, see Manufacturer Information Blocks. The
key to the bq27545-G1 high-accuracy gas gauging prediction is Texas Instrument’s proprietary Impedance Track
algorithm. This algorithm uses cell measurements, characteristics, and properties to create state-of-charge
predictions that can achieve less than 1% error across a wide variety of operating conditions and over the
lifetime of the battery.
The bq27545-G1 measures charge/discharge activity by monitoring the voltage across a small-value series
sense resistor (5 mΩ to 20 mΩ typical) located between the CELL– and the battery’s PACK– terminal. When a
cell is attached to the bq27545-G1, cell impedance is learned based on cell current, cell open-circuit voltage
(OCV), and cell voltage under loading conditions.
The bq27545-G1 external temperature sensing is optimized with the use of a high accuracy negative
temperature coefficient (NTC) thermistor with R25 = 10 kΩ ± 1% and B25/85 = 3435 K ± 1% (such as Semitec
103AT) for measurement. The bq27545-G1 can also be configured to use its internal temperature sensor. The
bq27545-G1 uses temperature to monitor the battery-pack environment, which is used for fuel gauging and cell
protection functionality.
To minimize power consumption, the bq27545-G1 has different power modes: NORMAL, SLEEP, FULLSLEEP,
and HIBERNATE. The bq27545-G1 passes automatically between these modes, depending upon the occurrence
of specific events, though a system processor can initiate some of these modes directly. Power Modes has more
details.
NOTE
FORMATTING CONVENTIONS IN THIS DOCUMENT:
Commands: italics with parentheses() and no breaking spaces. e.g., RemainingCapacity()
Data Flash: italics, bold, and breaking spaces. e.g., Design Capacity
Register bits and flags: italics with brackets[ ]. e.g., [TDA]
Data flash bits: italics, bold, and brackets[ ]. e.g., [LED1]
Modes and states: ALL CAPITALS. e.g., UNSEALED mode
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8.2 Functional Block Diagram
REGIN
Divider
CE
VCC
Oscillator
System Clock
2.5-V LDO
+
Power Mgt
BAT
TS
ADC
Temp
Sensor
HDQ
SCL
Communications
HDQ/I2C
Impedance
Track
Engine
SDA
Coulomb
Counter
SRN
Peripherals
Program Memory
SRP
SE
Data Memory
VSS
8.3 Feature Description
8.3.1 Fuel Gauging
The bq27545-G1 measures the cell voltage, temperature, and current to determine battery SOC based on
Impedance Track algorithm (see the Theory and Implementation of Impedance Track Battery Fuel-Gauging
Algorithm Application Report [SLUA450] for more information). The bq27545-G1 monitors charge and discharge
activity by sensing the voltage across a small-value resistor (5 mΩ to 20 mΩ typical) between the SRP and SRN
pins and in series with the cell. By integrating charge passing through the battery, the battery’s SOC is adjusted
during battery charge or discharge.
The total battery capacity is found by comparing states of charge before and after applying the load with the
amount of charge passed. When an application load is applied, the impedance of the cell is measured by
comparing the OCV obtained from a predefined function for present SOC with the measured voltage under load.
Measurements of OCV and charge integration determine chemical state of charge and chemical capacity
(Qmax). The initial Qmax values are taken from a cell manufacturers' data sheet multiplied by the number of
parallel cells. It is also used for the value in Design Capacity. The bq27545-G1 acquires and updates the
battery-impedance profile during normal battery usage. It uses this profile, along with SOC and the Qmax value,
to determine FullChargeCapacity() and StateOfCharge(), specifically for the present load and temperature.
FullChargeCapacity() is reported as capacity available from a fully charged battery under the present load and
temperature until Voltage() reaches the Terminate Voltage. NominalAvailableCapacity() and
FullAvailableCapacity() are the uncompensated (no or light load) versions of RemainingCapacity() and
FullChargeCapacity() respectively.
The bq27545-G1 has two flags accessed by the Flags() function that warns when the battery’s SOC has fallen to
critical levels. When RemainingCapacity() falls below the first capacity threshold, specified in SOC1 Set
Threshold, the [SOC1] (State of Charge Initial) flag is set. The flag is cleared once RemainingCapacity() rises
above SOC1 Clear Threshold. All units are in mAh.
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Feature Description (continued)
When RemainingCapacity() falls below the second capacity threshold, SOCF Set Threshold, the [SOCF] (State
of Charge Final) flag is set, serving as a final discharge warning. If SOCF Set Threshold = –1, the flag is
inoperative during discharge. Similarly, when RemainingCapacity() rises above SOCF Clear Threshold and the
[SOCF] flag has already been set, the [SOCF] flag is cleared. All units are in mAh.
The bq27545-G1 has two additional flags accessed by the Flags() function that warns of internal battery
conditions. The fuel gauge monitors the cell voltage during relaxed conditions to determine if an internal short
has been detected. When this condition occurs, [ISD] will be set. The bq27545-G1 also has the capability of
detecting when a tab has been disconnected in a 2-cell parallel system by actively monitoring the SOH. When
this conditions occurs, [TDD] will be set.
8.3.2 Impedance Track Variables
The bq27545-G1 has several data flash variables that permit the user to customize the Impedance Track
algorithm for optimized performance. These variables are dependent upon the power characteristics of the
application as well as the cell itself.
8.3.2.1 Load Mode
Load Mode is used to select either the constant-current or constant-power model for the Impedance Track
algorithm as used in Load Select (see Load Select). When Load Mode is 0, the Constant Current Model is used
(default). When Load Mode is 1, the Constant Power Model is used. The [LDMD] bit of CONTROL_STATUS
reflects the status of Load Mode.
8.3.2.2 Load Select
Load Select defines the type of power or current model to be used to compute load-compensated capacity in the
Impedance Track algorithm. If Load Mode = 0 (Constant Current), then the options presented in Table 1 are
available.
Table 1. Constant-Current Model Used When Load Mode = 0
Load Select Value
0
1 (default)
CURRENT MODEL USED
Average discharge current from previous cycle: There is an internal register that records the average discharge current through each
entire discharge cycle. The previous average is stored in this register.
Present average discharge current: This is the average discharge current from the beginning of this discharge cycle until present time.
2
Average current: based off the AverageCurrent()
3
Current: based off of a low-pass-filtered version of AverageCurrent() (τ = 14 s)
4
Design capacity/5: C Rate based off of Design Capacity /5 or a C/5 rate in mA.
5
Use the value specified by AtRate()
6
Use the value in User_Rate-mA: This gives a completely user-configurable method.
If Load Mode = 1 (Constant Power) then the following options are available:
Table 2. Constant-Power Model Used When Load Mode = 1
Load Select Value
12
POWER MODEL USED
0
Average discharge power from previous cycle: There is an internal register that records the average discharge power through each
entire discharge cycle. The previous average is stored in this register.
1
Present average discharge power: This is the average discharge power from the beginning of this discharge cycle until present time.
2
Average current × voltage: based off the AverageCurrent() and Voltage().
3
Current × voltage: based off of a low-pass-filtered version of AverageCurrent() (τ = 14 s) and Voltage()
4
Design energy/5: C Rate based off of Design Energy /5 or a C/5 rate in mA.
5
Use the value specified by AtRate()
6
Use the value in User_Rate-Pwr. This gives a completely user-configurable method.
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8.3.2.3 Reserve Cap-mAh
Reserve Cap-mAh determines how much actual remaining capacity exists after reaching 0
RemainingCapacity(), before Terminate Voltage is reached when Load Mode = 0 is selected. A loaded rate or
no-load rate of compensation can be selected for Reserve Cap by setting the [RESCAP] bit in Pack
Configuration data flash register.
8.3.2.4 Reserve Energy
Reserve Energy determines how much actual remaining capacity exists after reaching 0 RemainingCapacity()
which is equivalent to 0 remaining power, before Terminate Voltage is reached when Load Mode = 1 is
selected. A loaded rate or no-load rate of compensation can be selected for Reserve Cap by setting the
[RESCAP] bit in Pack Configuration data flash register..
8.3.2.5 Design Energy Scale
Design Energy Scale is used to select the scale/unit of a set of data flash parameters. The value of Design
Energy Scale can be either 1 or 10 only, other values are not supported. For battery capacities larger than
6 AHr, Design Energy Scale = 10 is recommended.
Table 3. Data Flash Parameter Scale/Unit Based On Design Energy Scale
DATA FLASH
DESIGN ENERGY SCALE = 1 (default)
DESIGN ENERGY SCALE = 10
Design Energy
mWh
cWh
Reserve Energy
mWh
cWh
Avg Power Last Run
mW
cW
User Rate-Pwr
mWh
cWh
T Rise
No Scale
Scaled by ×10
8.3.2.6 Dsg Current Threshold
This register is used as a threshold by many functions in the bq27545-G1 to determine if actual discharge current
is flowing into or out of the cell. The default for this register should be sufficient for most applications. This
threshold should be set low enough to be below any normal application load current but high enough to prevent
noise or drift from affecting the measurement.
8.3.2.7 Chg Current Threshold
This register is used as a threshold by many functions in the bq27545-G1 to determine if actual charge current is
flowing into or out of the cell. The default for this register should be sufficient for most applications. This threshold
should be set low enough to be below any normal charge current but high enough to prevent noise or drift from
affecting the measurement.
8.3.2.8 Quit Current, Dsg Relax Time, Chg Relax Time, and Quit Relax Time
The Quit Current is used as part of the Impedance Track algorithm to determine when the bq27545-G1 enters
RELAX mode from a current flowing mode in either the charge direction or the discharge direction. The value of
Quit Current is set to a default value that should be above the standby current of the system.
Either of the following criteria must be met to enter RELAX mode:
1. | AverageCurrent() | < | Quit Current | for Dsg Relax Time.
2. | AverageCurrent() | < | Quit Current | for Chg Relax Time.
After about 6 minutes in RELAX mode, the bq27545-G1 attempts to take accurate OCV readings. An additional
requirement of dV/dt < 1 µV/s is required for the bq27545-G1 to perform Qmax updates. These updates are used
in the Impedance Track algorithms. It is critical that the battery voltage be relaxed during OCV readings and that
the current is not higher than C/20 when attempting to go into RELAX mode.
Quit Relax Time specifies the minimum time required for AverageCurrent() to remain above the QuitCurrent
threshold before exiting RELAX mode.
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8.3.2.9 Qmax
Qmax contains the maximum chemical capacity of the active cell profiles, and is determined by comparing states
of charge before and after applying the load with the amount of charge passed. They also correspond to capacity
at low rate of discharge, such as C/20 rate. For high accuracy, this value is periodically updated by the bq27545G1 during operation. Based on the battery cell capacity information, the initial value of chemical capacity should
be entered in Qmax field. The Impedance Track algorithm will update this value and maintain it in the Pack
profile.
8.3.2.10 Update Status
The Update Status register indicates the status of the Impedance Track algorithm.
Table 4. Update Status Definitions
UPDATE STATUS
STATUS
0x02
Qmax and Ra data are learned, but Impedance Track is not enabled. This should be the standard setting for a
golden image.
0x04
Impedance Track is enabled but Qmax and Ra data are not learned.
0x05
Impedance Track is enabled and only Qmax has been updated during a learning cycle.
0x06
Impedance Track is enabled. Qmax and Ra data are learned after a successful learning cycle. This should be the
operation setting for end equipment.
This register should only be updated by the bq27545-G1 during a learning cycle or when IT_ENABLE
subcommand is received. Refer to the How to Generate Golden Image for Single-Cell Impedance Track Device
Application Note (SLUA544) for learning cycle details.
8.3.2.11 Avg I Last Run
The bq27545-G1 logs the current averaged from the beginning to the end of each discharge cycle. It stores this
average current from the previous discharge cycle in this register. This register should never be modified. It is
only updated by the bq27545-G1 when required.
8.3.2.12 Avg P Last Run
The bq27545-G1 logs the power averaged from the beginning to the end of each discharge cycle. It stores this
average power from the previous discharge cycle in this register. To get a correct average power reading the
bq27545-G1 continuously multiplies instantaneous current times Voltage() to get power. It then logs this data to
derive the average power. This register should never require modification. It is only updated by the bq27545-G1
when required.
8.3.2.13 Delta Voltage
The bq27545-G1 stores the maximum difference of Voltage() during short load spikes and normal load, so the
Impedance Track algorithm can calculate remaining capacity for pulsed loads. It is not recommended to change
this value.
8.3.2.14 Ra Tables and Ra Filtering Related Parameters
These tables contain encoded data and are automatically updated during device operation. The bq27545-G1 has
a filtering process to eliminate unexpected fluctuations in Ra values while the Ra values are being updated. The
DF parameters RaFilter, RaMaxDelta, MaxResfactor, and MinResfactor control the Filtering process of Ra
values. RaMaxDelta Limits the change in Ra values to an absolute magnitude. MinResFactor and
MaxResFactor parameters are cumulative filters which limit the change in Ra values to a scale on a per
discharge cycle basis. These values are data flash configurable. No further user changes should be made to Ra
values except for reading/writing the values from a pre-learned pack (part of the process for creating golden
image files).
8.3.2.15 MaxScaleBackGrid
MaxScaleBackGrid parameter limits the resistance grid point after which back scaling will not be performed.
This variable ensures that the resistance values in the lower resistance grid points remain accurate while the
battery is at a higher DoD state.
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8.3.2.16 Max DeltaV, Min DeltaV
Maximal/Minimal value allowed for delta V, which will be subtracted from simulated voltage during remaining
capacity simulation.
8.3.2.17 Qmax Max Delta %
Maximal change of Qmax during one update, as percentage of Design Capacity. If the gauges attempts to
change Qmax exceeds this limit, changed value will be capped to old value ± DesignCapacity ×
QmaxMaxDelta/100.
8.3.2.18 Fast Resistance Scaling
When Fast Resistance Scaling is enabled by setting the [FConvEn] bit in Pack Configuration B, the algorithm
improves accuracy at the end of discharge. The RemainingCapacity() and StateOfCharge() should smoothly
converge to 0. The algorithm starts convergence improvements when cell voltage goes below (Terminate
Voltage + Term V Delta) or StateofCharge() goes below Fast Scale Start SOC. For most applications, the
default value of Term V Delta and Fast Scale Start SOC are recommended. Also TI recommends keeping
(Terminate Voltage + Term V Delta) below 3.6 V for most battery applications.
8.3.2.19 StateOfCharge() Smoothing
When operating conditions change (such as temperature, discharge current, and resistance, for example), it can
lead to large changes of compensated battery capacity and battery capacity remaining. These changes can
result in large changes of StateOfCharge(). When [SmoothEn] is enabled in Pack Configuration C, the
smoothing algorithm injects gradual changes of battery capacity when conditions vary. This results in a gradual
change of StateOfCharge() and can provide a better end-user experience for StateOfCharge() reporting.
The RemainingCapacity(), FullChargeCapacity(), and StateOfCharge() are modified depending on [SmoothEn] as
below.
[SmoothEn]
RemainingCapacity()
FullChargeCapacity()
StateOfCharge()
0
UnfilteredRM()
UnfilteredFCC()
UnfilteredRM()/UnfilteredFCC()
1
FilteredRM()
FilteredFCC()
FilteredRM()/FilteredFCC()
8.3.2.20 DeltaV Max Delta
Maximal change of Delta V value. If attempted change of the value exceeds this limit, change value will be
capped to old value ±DeltaV Max Delta.
8.3.2.21 Lifetime Data Logging Parameters
The Lifetime Data logging function helps development and diagnosis with the bq27545-G1. IT_ENABLE must be
enabled (Command 0x0021) for lifetime data logging functions to be active. bq27545-G1 logs the lifetime data as
specified in the Lifetime Data and Lifetime Temp Samples data Flash Subclasses. The data log recordings are
controlled by the Lifetime Resolution data flash subclass.
The Lifetime Data Logging can be started by setting the IT_ENABLE bit and setting the Update Time register to a
non-zero value.
Once the Lifetime Data Logging function is enabled, the measured values are compared to what is already
stored in the data flash. If the measured value is higher than the maximum or lower than the minimum value
stored in the data flash by more than the Resolution set for at least one parameter, the entire Data Flash Lifetime
Registers are updated after at least LTUpdateTime.
LTUpdateTime sets the minimum update time between DF writes. When a new maximum or minimum is
detected, a LT Update window of [update time] second is enabled and the DF writes occur at the end of this
window. Any additional max/min value detected within this window will also be updated. The first new maximum
or minimum value detected after this window will trigger the next LT Update window.
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Internal to bq27545-G1, there exists a RAM maximum or minimum table in addition to the DF maximum or
minimum table. The RAM table is updated independent of the resolution parameters. The DF table is updated
only if at least one of the RAM parameters exceeds the DF value by more than resolution associated with it.
When DF is updated, the entire RAM table is written to DF. Consequently, it is possible to see a new maximum
or minimum value for a certain parameter even if the value of this parameter never exceeds the maximum or
minimum value stored in the data flash for this parameter value by the resolution amount.
The Life Time Data Logging of one or more parameters can be reset or restarted by writing new default (or
starting) values to the corresponding data flash registers through sealed or unsealed access as described below.
However, when using unsealed access, new values will only take effect after device reset
The logged data can be accessed as R/W in UNSEALED mode from Lifetime Data Subclass (Subclass ID = 59)
of data flash. Lifetime data may be accessed (R/W) when sealed using a process identical Manufacturer Info
Block B. The DataFlashBlock command code is 4. Note only the first 32 bytes of lifetime data (not resolution
parameters) can be R/W when sealed. See Manufacturer Information Blocks for sealed access. The logging
settings such as Temperature Resolution, Voltage Resolution, Current Resolution, and Update Time can be
configured only in UNSEALED mode by writing to the Lifetime Resolution Subclass (SubclassID = 66) of the data
flash.
The Lifetime resolution registers contain the parameters that set the limits related to how much a data parameter
must exceed the previously logged maximum or minimum value to be updated in the lifetime log. For example, V
must exceed MaxV by more than Voltage Resolution to update MaxV in the data flash.
8.4 Device Functional Modes
8.4.1 System Control Function
The bq27545-G1 provides system control functions which allows the fuel gauge to enter SHUTDOWN mode to
power-off with the assistance of external circuit or provides interrupt function to the system. Table 5 shows the
configurations for SE and HDQ pins.
Table 5. SE and HDQ Pin Function
[INTSEL]
COMMUNICATION
MODE
SE PIN FUNCTION
2
0 (default)
1
(1)
(2)
I C
HDQ
I2C
HDQ
INTERRUPT Mode
(1)
SHUTDOWN Mode
HDQ PIN FUNCTION
Not Used
HDQ Mode (2)
INTERRUPT mode
HDQ Mode (2)
[SE_EN] bit in Pack Configuration can be enabled to use [SE] and [SHUTDWN] bits in
CONTROL_STATUS() function. The SE pin shutdown function is disabled.
HDQ pin is used for communication and HDQ Host Interrupt Feature is available.
8.4.1.1 SHUTDOWN Mode
In the SHUTDOWN mode, the SE pin is used to signal external circuit to power-off the fuel gauge. This feature is
useful to shutdown the fuel gauge in a deeply discharged battery to protect the battery. By default, the
SHUTDOWN mode is in normal state. By sending the SET_SHUTDOWN subcommand or setting the [SE_EN]
bit in Pack Configuration register, the [SHUTDWN] bit is set and enables the shutdown feature. When this
feature is enabled and [INTSEL] is set, the SE pin can be in normal state or SHUTDOWN state. The
SHUTDOWN state can be entered in HIBERNATE mode (ONLY if HIBERNATE mode is enabled due to low cell
voltage), all other power modes will default SE pin to NORMAL state. Table 6 shows the SE pin state in
NORMAL or SHUTDOWN mode. The CLEAR_SHUTDOWN subcommand or clearing [SE_EN] bit in the Pack
Configuration register can be used to disable SHUTDOWN mode.
The bq27545 SE pin will be high impedance at power on reset (POR), the [SE_POL] does not affect the state of
SE pin at POR. Also [SE_PU] configuration changes will only take effect after POR. In addition, the [INTSEL]
only controls the behavior of the SE pin; it does not affect the function of [SE] and [SHUTDWN] bits.
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Table 6. SE Pin State
SHUTDOWN Mode
[INTSEL] = 1 and
([SE_EN] or [SHUTDOWN] = 1)
[SE_PU]
[SE_POL]
NORMAL state
SHUTDOWN state
0
0
High Impedance
0
0
1
0
High Impedance
1
0
1
0
1
1
0
1
8.4.1.2 INTERRUPT Mode
By utilizing the INTERRUPT mode, the system can be interrupted based on detected fault conditions as specified
in Table 9. The SE or HDQ pin can be selected as the interrupt pin by configuring the [INTSel] bit based on . In
addition, the pin polarity and pullup (SE pin only) can be configured according to the system needs as described
in Table 7 or Table 8.
Table 7. SE Pin in INTERRUPT Mode ([INTSEL] = 0)
[SE_PU]
[INTPOL]
INTERRUPT CLEAR
INTERRUPT SET
0
0
High Impedance
0
0
1
0
High Impedance
1
0
1
0
1
1
0
1
Table 8. HDQ Pin in INTERRUPT Mode ([INTSEL] = 1)
[INTPOL]
INTERRUPT CLEAR
INTERRUPT SET
0
High Impedance
0
1
0
High Impedance
Table 9. INTERRUPT Mode Fault Conditions
INTERRUPT CONDITION
Flags() STATUS
BIT
ENABLE CONDITION
SOC1 Set/Clear
[SOC1]
Always
The SOC1 Set/Clear interrupt is based on the[SOC1] Flag
condition when RemainingCapacity() reaches the SOC1 Set
or Clear threshold in the data flash.
Over Temperature Charge
[OTC]
OT Chg Time ≠ 0
The [OTC] Flag is set/clear based on conditions specified in
Over-Temperature: Charge.
Over Temperature
Discharge
[OTD]
OT Dsg Time ≠ 0
The [OTD] Flag is set/clear based on conditions specified in
Over-Temperature: Discharge.
Battery High
[BATHI]
Always
The [BATHI] Flag is set/clear based on conditions specified in
Battery Level Indication.
Battery Low
[BATLOW]
Always
The [BATLOW] Flag is set/clear based on conditions
specified in Battery Level Indication.
Internal Short Detection
[ISD]
[SE_ISD] = 1 in
Pack Configuration B
The [SE_ISD] Flag is set/clear based on conditions specified
in Internal Short Detection.
Tab disconnection
detection
[TDD]
[SE_TDD] = 1 in
Pack Configuration B
The [TDD] Flag is set/clear based on conditions specified in
Tab Disconnection Detection.
COMMENT
8.4.1.3 Battery Level Indication
The bq27545 can indicate when battery voltage has fallen below or risen above predefined thresholds. The
[BATHI] of Flags() is set high to indicate Voltage() is above the BH Set Volt Threshold for a predefined duration
set in the BH Volt Time. This flag returns to low once battery voltage is below or equal the BH Clear Volt
threshold. TI recommends configuring the BH Set Volt Threshold higher than the BH Clear Volt threshold to
provide proper voltage hysteresis.
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The [BATLOW] of Flags() is set high to indicate Voltage() is below the BL Set Volt Threshold for predefined
duration set in the BL Volt Time. This flag returns to low once battery voltage is above or equal the BL Clear
Volt threshold. TI recommends configuring the BL Set Volt Threshold lower than the BL Clear Volt threshold
to provide proper voltage hysteresis.
The [BATHI] and [BATLOW] flags can be configured to control the interrupt pin (SE or HDQ) by enabling
INTERRUPT mode. Refer to INTERRUPT Mode for details.
8.4.1.4 Internal Short Detection
The bq27545-G1 can indicate detection of an internal battery short by setting the [SE_ISD] bit in Pack
Configuration B. The device compares the self-discharge current calculated based StateOfCharge() in RELAX
mode and AverageCurrent() measured in the system. The self-discharge rate is measured at 1 hour interval.
When battery SelfDischargeCurrent() is less than the predefined (–Design Capacity/ISD Current threshold), the
[ISD] of Flags() is set high. The [ISD] of Flags() can be configured to control interrupt pin (SE or HDQ) by
enabling INTERRUPT mode. Refer to INTERRUPT Mode for details.
8.4.1.5 Tab Disconnection Detection
The bq27545-G1 can indicate tab disconnection by detecting change of StateOfHealth(). This feature is enabled
by setting [SE_TDD] bit in Pack Configuration B. The [TDD] of Flags() is set when the ratio of current
StateOfHealth() divided by the previous StateOfHealth() reported is less than TDD SOH Percent. The [TDD] of
Flags() can be configured to control an interrupt pin (SE or HDQ) by enabling INTERRUPT mode. Refer to
INTERRUPT Mode for details.
8.4.2 Temperature Measurement and the TS Input
The bq27545-G1 measures battery temperature through the TS input to supply battery temperature status
information to the fuel gauging algorithm and charger-control sections of the gauge. Alternatively, the gauge can
also measure internal temperature through its on-chip temperature sensor, but only if the [TEMPS] bit of Pack
Configuration register is cleared.
Regardless of which sensor is used for measurement, a system processor can request the current battery
temperature by calling the Temperature() function (see Authentication for specific information).
The thermistor circuit requires the use of an external 10-kΩ thermistor with negative temperature coefficient
(NTC) thermistor with R25 = 10 kΩ ± 1% and B25/85 = 3435 kΩ ± 1% (such as Semitec 103AT) that connects
between the VCC and TS pins. Additional circuit information for connecting the thermistor to the bq27545 is
shown in the Figure 9.
8.4.3 Over-Temperature Indication
8.4.3.1 Over-Temperature: Charge
If during charging, Temperature() reaches the threshold of OT Chg for a period of OT Chg Time and
AverageCurrent() ≥ Chg Current Threshold, then the [OTC] bit of Flags() is set. When Temperature() falls to OT
Chg Recovery, the [OTC] of Flags() is reset.
If OT Chg Time = 0, the feature is disabled.
8.4.3.2 Over-Temperature: Discharge
If during discharging, Temperature() reaches the threshold of OT Dsg for a period of OT Dsg Time, and
AverageCurrent() ≤ –Dsg Current Threshold, then the [OTD] bit of Flags() is set. When Temperature() falls to
OT Dsg Recovery, the [OTD] bit of Flags() is reset.
If OT Dsg Time = 0, the feature is disabled.
8.4.4 Charging and Charge Termination Indication
8.4.4.1 Detection Charge Termination
For proper bq27545-G1 operation, the cell charging voltage must be specified by the user. The default value for
this variable is in the data flash Charging Voltage.
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The bq27545-G1 detects charge termination when (1) during 2 consecutive periods of Current Taper Window,
the AverageCurrent() is < Taper Current, (2) during the same periods, the accumulated change in capacity >
0.25mAh/Current Taper Window, and (3) Voltage() > Charging Voltage – Taper Voltage. When this occurs,
the [CHG] bit of Flags() is cleared. Also, if the [RMFCC] bit of Pack Configuration is set, RemainingCapacity()
is set equal to FullChargeCapacity(). When TCA_Set is set to –1, it disables the use of the charger alarm
threshold. In that case, Terminate Charge is set when the taper condition is detected. When FC_Set is set to
–1, it disables the use of the full charge detection threshold. In that case, the [FC] bit is not set until the taper
condition is met.
8.4.4.2 Charge Inhibit
The bq27545-G1 can indicate when battery temperature has fallen below or risen above predefined thresholds
(Charge Inhibit Temp Low and Charge Inhibit Temp High, respectively). In this mode, the [CHG_INH] of
Flags() is made high to indicate this condition, and is returned to its low state, once battery temperature returns
to the range [Charge Inhibit Temp Low + Temp Hys, Charge Inhibit Temp High – Temp Hys].
8.4.5 Power Modes
The bq27545-G1 has four power modes: NORMAL, SLEEP, FULLSLEEP, and HIBERNATE.
• In NORMAL mode, the bq27545-G1 is fully powered and can execute any allowable task.
• In SLEEP mode, the fuel gauge exists in a reduced-power state, periodically taking measurements and
performing calculations.
• During FULLSLEEP mode, the bq27545-G1 periodically takes data measurements and updates its data set.
However, a majority of its time is spent in an idle condition.
• In HIBERNATE mode, the fuel gauge is in a very low-power state, but can be awoken by communication or
certain I/O activity.
The relationship between these modes is shown in Figure 7. Details are described in the sections that follow.
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POR
Exit From HIBERNATE
VCELL < POR threshold
Exit From HIBERNATE
Communication Activity
NORMAL
OR
The device clears Control Status
[HIBERNATE] = 0
Recommend Host also set Control
Status [HIBERNATE] = 0
Fuel gauging and data
updated every 1s
Exit From SLEEP
Pack Configuration [SLEEP] = 0
OR
| AverageCurrent( ) | > Sleep Current
OR
Current is Detected above IWAKE
Entry to SLEEP
Pack Configuration [SLEEP] = 1
AND
| AverageCurrent( ) |≤ Sleep Current
SLEEP
Fuel gauging and data
updated every 20 seconds
HIBERNATE
Wakeup From HIBERNATE
Communication Activity
AND
Comm address is NOT for the device
Disable all device
subcircuits except GPIO.
Entry to FULLSLEEP
If Full Sleep Wait Time = 0,
Host must set Control Status
[FULLSLEEP]=1
Exit From WAIT_HIBERNATE
WAITFULLSLEEP
Host must set Control Status
[HIBERNATE] = 0
AND
VCELL > Hibernate Voltage
Exit From WAIT_HIBERNATE
Cell relaxed
AND
| AverageCurrent() | < Hibernate
Current
FULLSLEEP Count Down
Entry to FULLSLEEP
Count 0, Exit From WAITFULLSLEEP
Guage ignores Control Status Any Communication Cmd
[FULLSLEEP]
Fuel gauging and data
updated every 20 seconds
In low power state of SLEEP
mode. Gas gauging and data
updated every 20 seconds
Exit From SLEEP
(Host has set Control Status
[HIBERNATE] = 1
OR
VCELL < Hibernate Voltage
System Shutdown
System Sleep
Figure 7. Power Mode Diagram
8.4.5.1 NORMAL Mode
The fuel gauge is in NORMAL mode when not in any other power mode. During this mode, AverageCurrent(),
Voltage(), and Temperature() measurements are taken, and the interface data set is updated. Decisions to
change states are also made. This mode is exited by activating a different power mode.
Because the gauge consumes the most power in NORMAL mode, the Impedance Track algorithm minimizes the
time the fuel gauge remains in this mode.
8.4.5.2 SLEEP Mode
SLEEP mode is entered automatically if the feature is enabled (Pack Configuration [SLEEP]) = 1) and
AverageCurrent() is below the programmable level Sleep Current. Once entry into SLEEP mode has been
qualified, but before entering it, the bq27545-G1 performs an ADC autocalibration to minimize offset.
While in SLEEP mode, the fuel gauge can suspend serial communications as much as 4 ms by holding the
comm line(s) low. This delay is necessary to correctly process host communication, because the fuel gauge
processor is mostly halted in SLEEP mode.
During the SLEEP mode, the bq27545-G1 periodically takes data measurements and updates its data set.
However, a majority of its time is spent in an idle condition.
20
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The bq27545-G1 exits SLEEP if any entry condition is broken, specifically when (1) AverageCurrent() rises
above Sleep Current, or (2) a current in excess of IWAKE through RSENSE is detected when the Iwake comparator
is enabled.
8.4.5.3 FULLSLEEP Mode
FULLSLEEP mode is entered automatically when the bq27545-G1 is in SLEEP mode and the timer counts down
to 0 (Full Sleep Wait Time > 0). FULLSLEEP mode is entered immediately after entry to SLEEP if Full Sleep
Wait Time is set to 0 and the host sets the [FULLSLEEP] bit in the CONTROL_STATUS register using the
SET_FULLSLEEP subcommand.
The gauge exits the FULLSLEEP mode when there is any communication activity. The [FULLSLEEP] bit can
remain set (Full Sleep Wait Time > 0) or be cleared (Full Sleep Wait Time ≤ 0) after exit of FULLSLEEP mode.
Therefore, EVSW communication activity might cause the gauge to exit FULLSLEEP MODE and display the
[FULLSLEEP] bit as clear. The execution of SET_FULLSLEEP to set [FULLSLEEP] bit is required when Full
Sleep Wait Time ≤ 0 to re-enter FULLSLEEP mode. The FULLSLEEP mode can be verified by measuring the
current consumption of the gauge. In this mode, the high frequency oscillator is turned off. The power
consumption is further reduced in this mode compared to the SLEEP mode.
While in FULLSLEEP mode, the fuel gauge can suspend serial communications as much as 4 ms by holding the
comm line(s) low. This delay is necessary to correctly process host communication, because the fuel gauge
processor is mostly halted in SLEEP mode.
The bq27545-G1 exits FULLSLEEP if any entry condition is broken, specifically when (1) AverageCurrent() rises
above Sleep Current, or (2) a current in excess of IWAKE through RSENSE is detected when the Iwake comparator
is enabled.
8.4.5.4 HIBERNATE Mode
HIBERNATE mode should be used for long-term pack storage or when the host system must enter a low-power
state, and minimal gauge power consumption is required. This mode is ideal when the host is set to its own
HIBERNATE, SHUTDOWN, or OFF mode. The gauge waits to enter HIBERNATE mode until it has taken a valid
OCV measurement (cell relaxed) and the magnitude of the average cell current has fallen below Hibernate
Current. When the conditions are met, the fuel gauge can enter HIBERNATE due to either low cell voltage or by
having the [HIBERNATE] bit of the CONTROL_STATUS register set. The gauge will remain in HIBERNATE
mode until any communication activity appears on the communication lines and the address is for bq27545. In
addition, the SE pin SHUTDOWN mode function is supported only when the fuel gauge enters HIBERNATE due
to low cell voltage.
When the gauge wakes up from HIBERNATE mode, the [HIBERNATE] bit of the CONTROL_STATUS register is
cleared. The host is required to set the bit to allow the gauge to re-enter HIBERNATE mode if desired.
Because the fuel gauge is dormant in HIBERNATE mode, the battery should not be charged or discharged in this
mode, because any changes in battery charge status will not be measured. If necessary, the host equipment can
draw a small current (generally infrequent and less than 1 mA, for purposes of low-level monitoring and
updating); however, the corresponding charge drawn from the battery will not be logged by the gauge. Once the
gauge exits to NORMAL mode, the IT algorithm will take about 3 seconds to re-establish the correct battery
capacity and measurements, regardless of the total charge drawn in HIBERNATE mode. During this period of reestablishment, the gauge reports values previously calculated before entering HIBERNATE mode. The host can
identify exit from HIBERNATE mode by checking if Voltage() < Hibernate Voltage or [HIBERNATE] bit is cleared
by the gauge.
If a charger is attached, the host should immediately take the fuel gauge out of HIBERNATE mode before
beginning to charge the battery. Charging the battery in HIBERNATE mode will result in a notable gauging error
that will take several hours to correct. It is also recommended to minimize discharge current during exit from
Hibernate.
8.4.6 Power Control
8.4.6.1 Reset Functions
When the bq27545-G1 detects a software reset by sending [RESET] Control() subcommand, it determines the
type of reset and increments the corresponding counter. This information is accessible by issuing the command
Control() function with the RESET_DATA subcommand.
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8.4.6.2 Wake-Up Comparator
The wake-up comparator is used to indicate a change in cell current while the bq27545-G1 is in SLEEP mode.
Pack Configuration uses bits [RSNS1]–[RSNS0] to set the sense resistor selection. Pack Configuration also
uses the [IWAKE] bit to select one of two possible voltage threshold ranges for the given sense resistor
selection. An internal interrupt is generated when the threshold is breached in either charge or discharge
directions. Setting both [RSNS1] and [RSNS0] to 0 disables this feature.
Table 10. IWAKE Threshold Settings (1)
(1)
IWAKE
RSNS1
RSNS0
Vth(SRP-SRN)
0
0
0
Disabled
1
0
0
Disabled
0
0
1
1 mV or –1 mV
1
0
1
+2.2 mV or –2.2 mV
0
1
0
+2.2 mV or –2.2 mV
1
1
0
+4.6 mV or –4.6 mV
0
1
1
+4.6 mV or –4.6 mV
1
1
1
+9.8 mV or –9.8 mV
The actual resistance value vs the setting of the sense resistor is not important just the actual voltage
threshold when calculating the configuration. The voltage thresholds are typical values under room
temperature.
8.4.6.3 Flash Updates
Data flash can only be updated if Voltage() ≥ Flash Update OK Voltage. Flash programming current can cause
an increase in LDO dropout. The value of Flash Update OK Voltage should be selected such that the bq27545G1 VCC voltage does not fall below its minimum of 2.4 V during Flash write operations.
8.4.7 Autocalibration
The bq27545-G1 provides an autocalibration feature that will measure the voltage offset error across SRP and
SRN from time-to-time as operating conditions change. It subtracts the resulting offset error from normal sense
resistor voltage, VSR, for maximum measurement accuracy.
Autocalibration of the ADC begins on entry to SLEEP mode, except if Temperature() is ≤ 5°C or Temperature() ≥
45°C.
The fuel gauge also performs a single offset calibration when (1) the condition of AverageCurrent() ≤ 100 mA
and (2) {voltage change because last offset calibration ≥ 256 mV} or {temperature change because last offset
calibration is greater than 8°C for ≥ 60 seconds}.
Capacity and current measurements will continue at the last measured rate during the offset calibration when
these measurements cannot be performed. If the battery voltage drops more than 32 mV during the offset
calibration, the load current has likely increased considerably; hence, the offset calibration will be aborted.
8.4.8 Communications
8.4.8.1 Authentication
The bq27545-G1 can act as a SHA-1/HMAC authentication slave by using its internal engine. Sending a 160-bit
SHA-1 challenge message to the bq27545-G1 will cause the gauge to return a 160-bit digest, based upon the
challenge message and a hidden, 128-bit plain-text authentication key. If this digest matches an identical one
generated by a host or dedicated authentication master, and when operating on the same challenge message
and using the same plain text keys, the authentication process is successful.
8.4.8.2 Key Programming (Data Flash Key)
By default, the bq27545-G1 contains a default plain-text authentication key of
0x0123456789ABCDEFFEDCBA9876543210. This default key is intended for development purposes. It should
be changed to a secret key and the part immediately sealed, before putting a pack into operation. Once written, a
new plain-text key cannot be read again from the fuel gauge while in SEALED mode.
22
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Once the bq27545-G1 is UNSEALED, the authentication key can be changed from its default value by writing to
the Authenticate() Extended Data Command locations. A 0x00 is written to BlockDataControl() to enable the
authentication data commands. The DataFlashClass() is issued 112 (0x70) to set the Security class. Up to 32
bytes of data can be read directly from the BlockData() (0x40...0x5F) and the authentication key is located at
0x48 (0x40 + 0x08 offset) to 0x57 (0x40 + 0x17 offset). The new authentication key can be written to the
corresponding locations (0x48 to 0x57) using the BlockData() command. The data is transferred to the data flash
when the correct checksum for the whole block (0x40 to 0x5F) is written to BlockDataChecksum() (0x60). The
checksum is (255 – x) where x is the 8-bit summation of the BlockData() (0x40 to 0x5F) on a byte-by-byte basis.
Once the authentication key is written, the gauge can then be SEALED again.
8.4.8.3 Key Programming (Secure Memory Key)
As the name suggests, the bq27545-G1 secure-memory authentication key is stored in the secure memory of the
bq27545-G1. If a secure-memory key has been established, only this key can be used for authentication
challenges (the programmable data flash key is not available). The selected key can only be
established/programmed by special arrangements with TI, using the TI’s Secure B-to-B Protocol. The securememory key can never be changed or read from the bq27545-G1.
8.4.8.4 Executing An Authentication Query
To execute an authentication query in UNSEALED mode, a host must first write 0x01 to the BlockDataControl()
command, to enable the authentication data commands. If in SEALED mode, 0x00 must be written to
DataFlashBlock(), instead.
Next, the host writes a 20-byte authentication challenge to the Authenticate() address locations (0x40 through
0x53). After a valid checksum for the challenge is written to AuthenticateChecksum(), the bq27545 uses the
challenge to perform the SHA-1/HMAC computation, in conjunction with the programmed key. The bq27545-G1
completes the SHA-1/HMAC computation and write the resulting digest to Authenticate(), overwriting the preexisting challenge. The host should wait at least 45 ms to read the resulting digest. The host may then read this
response and compare it against the result created by its own parallel computation.
8.4.9 HDQ Single-Pin Serial Interface
The HDQ interface is an asynchronous return-to-one protocol where a processor sends the command code to
the bq27545-G1. With HDQ, the least significant bit (LSB) of a data byte (command) or word (data) is transmitted
first. The DATA signal on pin 12 is open drain and requires an external pullup resistor. The 8-bit command code
consists of two fields: the 7-bit HDQ command code (bits 0–6) and the 1-bit R/W field (MSB bit 7). The R/W field
directs the bq27545-G1 either to
• Store the next 8 or 16 bits of data to a specified register or
• Output 8 bits of data from the specified register
The HDQ peripheral can transmit and receive data as either an HDQ master or slave.
HDQ serial communication is normally initiated by the host processor sending a break command to the bq27545G1. A break is detected when the DATA pin is driven to a logic-low state for a time t(B) or greater. The DATA pin
should then be returned to its normal ready high logic state for a time t(BR). The bq27545-G1 is now ready to
receive information from the host processor.
The bq27545-G1 is shipped in the I2C mode. TI provides tools to enable the HDQ peripheral. The HDQ
Communication Basics Application Report (SLUA408A) provides details of HDQ communication basics.
8.4.10 HDQ Host Interruption Feature
The default bq27545-G1 behaves as an HDQ slave only device when HDQ mode is enabled. If the HDQ
interrupt function is enabled, the bq27545-G1 is capable of mastering and also communicating to a HDQ device.
There is no mechanism for negotiating who is to function as the HDQ master and take care to avoid message
collisions. The interrupt is signaled to the host processor with the bq27545-G1 mastering an HDQ message. This
message is a fixed message that will be used to signal the interrupt condition. The message itself is 0x80 (slave
write to register 0x00) with no data byte being sent as the command is not intended to convey any status of the
interrupt condition. The HDQ interrupt function is disabled by default and must be enabled by command.
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When the SET_HDQINTEN subcommand is received, the bq27545-G1 will detect any of the interrupt conditions
and assert the interrupt at one second intervals until the CLEAR_HDQINTEN command is received or the count
of HDQHostIntrTries has lapsed.
The number of tries for interrupting the host is determined by the data flash parameter named
HDQHostIntrTries.
8.4.10.1 Low Battery Capacity
This feature will work identically to SOC1. It will use the same data flash entries as SOC1 and will trigger
interrupts as long as SOC1 = 1 and HDQIntEN=1.
8.4.10.2 Temperature
This feature will trigger an interrupt based on the OTC (Over-Temperature in Charge) or OTD (Over-Temperature
in Discharge) condition being met. It uses the same data flash entries as OTC or OTD and will trigger interrupts
as long as either the OTD or OTC condition is met and HDQIntEN=1.
8.5 Programming
8.5.1 I2C Interface
The fuel gauge supports the standard I2C read, incremental read, one-byte write quick read, and functions. The
7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as 1010101. The 8-bit
device address is therefore 0xAA or 0xAB for write or read, respectively.
Host Generated
S
0 A
ADDR[6:0]
Fuel Gauge Generated
A
CMD[7:0]
A P
DATA[7:0]
S
1
ADDR[6:0]
A
(a)
S
ADDR[6:0]
0 A
DATA[7:0]
N P
(b)
CMD[7:0]
A Sr
1
ADDR[6:0]
A
DATA[7:0]
N P
...
DATA[7:0]
(c)
S
ADDR[6:0]
0 A
CMD[7:0]
A Sr
ADDR[6:0]
1
A
DATA[7:0]
A
N P
(d)
Figure 8. Supported I2C Formats: (A) 1-Byte Write, (B) Quick Read, (C) 1 Byte-Read, And (D) Incremental
Read (S = Start, Sr = Repeated Start, A = Acknowledge, N = No Acknowledge, And P = Stop).
The quick read returns data at the address indicated by the address pointer. The address pointer, a register
internal to the I2C communication engine, increments whenever data is acknowledged by the bq27545-G1 or the
I2C master. Quick writes function in the same manner and are a convenient means of sending multiple bytes to
consecutive command locations (such as two-byte commands that require two bytes of data).
Attempt to write a read-only address (NACK after data sent by master):
S
ADDR[6:0]
0
A
A
CMD[7:0]
DATA[7:0]
A
P
Attempt to read an address above 0x7F (NACK command):
S
0
ADDR[6:0]
A
CMD[7:0]
N P
Attempt at incremental writes (NACK all extra data bytes sent):
S
ADDR[6:0]
0 A
CMD[7:0]
A
DATA[7:0]
A
DATA[7:0]
N
...
N P
Incremental read at the maximum allowed read address:
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Programming (continued)
S
ADDR[6:0]
0 A
A Sr
CMD[7:0]
1
ADDR[6:0]
A
A
DATA[7:0]
Address
0x7F
...
N P
DATA[7:0]
Data From
addr 0x7F
Data From
addr 0x00
The I2C engine releases both SDA and SCL if the I2C bus is held low for t(BUSERR). If the fuel gauge was holding
the lines, releasing them frees the master to drive the lines. If an external condition is holding either of the lines
low, the I2C engine enters the low-power sleep mode.
8.5.1.1 I2C Time-Out
The I2C engine will release both SDA and SCL if the I2C bus is held low for about 2 seconds. If the bq27545-G1
was holding the lines, releasing them will free for the master to drive the lines.
8.5.1.2 I2C Command Waiting Time
To make sure the correct results of a command with the 400-KHz I2C operation, a proper waiting time should be
added between issuing command and reading results. For subcommands, the following diagram shows the
waiting time required between issuing the control command the reading the status with the exception of the
checksum command. A 100-ms waiting time is required between the checksum command and reading result. For
read-write standard commands, a minimum of 2 seconds is required to get the result updated. For read-only
standard commands, there is no waiting time required, but the host should not issue all standard commands
more than two times per second. Otherwise, the gauge could result in a reset issue due to the expiration of the
watchdog timer.
S
ADDR[6:0]
0 A
CMD[7:0]
A
DATA [7:0]
S
ADDR[6:0]
0 A
CMD[7:0]
A Sr
ADDR[6:0]
A
1 A
DATA [7:0]
A P
DATA [7:0]
66ms
A
DATA [7:0]
N P
A
DATA [7:0]
A
66ms
Waiting time between control subcommand and reading results
S
ADDR[6:0]
DATA [7:0]
0 A
A
CMD[7:0]
DATA [7:0]
A Sr
N P
ADDR[6:0]
1 A
DATA [7:0]
66ms
Waiting time between continuous reading results
8.5.1.3 I2C Clock Stretching
I2C clock stretches can occur during all modes of fuel gauge operation. In the SLEEP and HIBERNATE modes, a
short clock stretch will occur on all I2C traffic as the device must wake up to process the packet. In NORMAL and
SLEEP+ modes, clock stretching will only occur for packets addressed for the fuel gauge. The timing of stretches
will vary as interactions between the communicating host and the gauge are asynchronous. The I2C clock
stretches may occur after start bits, the ACK/NAK bit and first data bit transmit on a host read cycle. The majority
of clock stretch periods are small (≤ 4 ms) as the I2C interface peripheral and CPU firmware perform normal data
flow control. However, less frequent but more significant clock stretch periods may occur when data flash (DF) is
being written by the CPU to update the resistance (Ra) tables and other DF parameters such as Qmax. Due to
the organization of DF, updates must be written in data blocks consisting of multiple data bytes.
An Ra table update requires erasing a single page of DF, programming the updated Ra table and a flag. The
potential I2C clock stretching time is 24-ms max. This includes 20-ms page erase and 2-ms row programming
time (×2 rows). The Ra table updates occur during the discharge cycle and at up to 15 resistance grid points that
occur during the discharge cycle.
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Programming (continued)
A DF block write typically requires a maximum of 72 ms. This includes copying data to a temporary buffer and
updating DF. This temporary buffer mechanism is used to protect from power failure during a DF update. The
first part of the update requires 20 ms time to erase the copy buffer page, 6 ms to write the data into the copy
buffer and the program progress indicator (2 ms for each individual write). The second part of the update is
writing to the DF and requires 44-ms DF block update time. This includes a 20 ms each page erase for two
pages and 2 ms each row write for two rows.
In the event that a previous DF write was interrupted by a power failure or reset during the DF write, an
additional 44-ms max DF restore time is required to recover the data from a previously interrupted DF write. In
this power failure recovery case, the total I2C clock stretching is 116-ms max.
Another case where I2C clock stretches is at the end of discharge. The update to the last discharge data will go
through the DF block update twice because two pages are used for the data storage. The clock stretching in this
case is 144-ms max. This occurs if there has been a Ra table update during the discharge.
8.5.2 Data Commands
8.5.2.1 Standard Data Commands
The bq27545-G1 uses a series of 2-byte standard commands to enable system reading and writing of battery
information. Each standard command has an associated command-code pair, as indicated in Table 11. Each
protocol has specific means to access the data at each Command Code. DataRAM is updated and read by the
gauge only once per second. Standard commands are accessible in NORMAL operation mode.
Table 11. Standard Commands
NAME
COMMAND CODE
UNIT
SEALED
ACCESS
Control()
CNTL
0x00/0x01
N/A
R/W
AtRate()
AR
0x02/0x03
mA
R/W
UFSOC
0x04/0x05
%
R
TEMP
0x06/0x07
0.1K
R
UnfilteredSOC()
Temperature()
Voltage()
VOLT
0x08/0x09
mV
R
FLAGS
0x0A/0x0B
N/A
R
NomAvailableCapacity()
NAC
0x0C/0x0D
mAh
R
FullAvailableCapacity()
FAC
0x0E/0x0F
mAh
R
RemainingCapacity()
RM
0x10/0x11
mAh
R
FullChargeCapacity()
FCC
0x12/0x13
mAh
R
Flags()
AverageCurrent()
TimeToEmpty()
FilteredFCC()
StandbyCurrent()
UnfilteredFCC()
MaxLoadCurrent()
UnfilteredRM()
FilteredRM()
AveragePower()
InternalTemperature()
CycleCount()
AI
0x14/0x15
mA
R
TTE
0x16/0x17
Minutes
R
FFCC
0x18/0x19
mAh
R
SI
0x1A/0x1B
mA
R
UFFCC
0x1C/0x1D
mAh
R
MLI
0x1E/0x1F
mA
R
UFRM
0x20/0x21
mAh
R
FRM
0x22/0x23
mAh
R
AP
0x24/0x25
mW/cW
R
INTTEMP
0x28/0x29
0.1°K
R
CC
0x2A/0x2B
Counts
R
StateOfCharge()
SOC
0x2C/0x2D
%
R
StateOfHealth()
SOH
0x2E/0x2F
%/num
R
PassedCharge()
PCHG
0x34/0x35
mAh
R
DOD0()
DOD0
0x36/0x37
HEX#
R
SelfDischargeCurrent()
SDSG
0x38/0x39
mA
R
26
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8.5.2.1.1 Control(): 0x00 and 0x01
Issuing a Control() command requires a subsequent 2-byte subcommand. These additional bytes specify the
particular control function desired. The Control() command allows the system to control specific features of the
bq27545-G1 during normal operation and additional features when the bq27545-G1 is in different access modes,
as described in Table 12.
Table 12. Control() Subcommands
CNTL DATA
SEALED
ACCESS
CONTROL_STATUS
0x0000
Yes
Reports the status of DF Checksum, Hibernate, IT, and so on
DEVICE_TYPE
0x0001
Yes
Reports the device type of 0x0545 (indicating bq27545-G1)
FW_VERSION
0x0002
Yes
Reports the firmware version on the device type
HW_VERSION
0x0003
Yes
Reports the hardware version of the device type
Reserved
0x0004
No
Not to be used
RESET_DATA
0x0005
Yes
Returns reset data
Reserved
0x0006
No
Not to be used
PREV_MACWRITE
0x0007
Yes
Returns previous Control() subcommand code
CHEM_ID
0x0008
Yes
Reports the chemical identifier of the Impedance Track configuration
BOARD_OFFSET
0x0009
No
Forces the device to measure and store the board offset
CC_OFFSET
0x000A
No
Forces the device to measure internal CC offset
CC_OFFSET_SAVE
0x000B
No
Forces the device to store the internal CC offset
DF_VERSION
0x000C
Yes
Reports the data flash version on the device
SET_FULLSLEEP
0x0010
Yes
Sets the [FullSleep] bit in Control Status register to 1
SET_HIBERNATE
0x0011
Yes
Forces CONTROL_STATUS [HIBERNATE] to 1
CLEAR_HIBERNATE
0x0012
Yes
Forces CONTROL_STATUS [HIBERNATE] to 0
SET_SHUTDOWN
0x0013
Yes
Enables the SE pin to change state
CLEAR_SHUTDOWN
0x0014
Yes
Disables the SE pin from changing state
SET_HDQINTEN
0x0015
Yes
Forces CONTROL_STATUS [HDQIntEn] to 1
CLEAR_HDQINTEN
0x0016
Yes
Forces CONTROL_STATUS [HDQIntEn] to 0
STATIC_CHEM_CHKSUM
0x0017
Yes
Calculates chemistry checksum
SEALED
0x0020
No
Places the bq27545-G1 in SEALED access mode
IT_ENABLE
0x0021
No
Enables the Impedance Track algorithm
CAL_ENABLE
0x002d
No
Toggle bq27545-G1 CALIBRATION mode
RESET
0x0041
No
Forces a full reset of the bq27545-G1
EXIT_CAL
0x0080
No
Exit bq27545-G1 CALIBRATION mode
ENTER_CAL
0x0081
No
Enter bq27545-G1 CALIBRATION mode
OFFSET_CAL
0x0082
No
Reports internal CC offset in CALIBRATION mode
CNTL FUNCTION
DESCRIPTION
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8.5.2.1.1.1 CONTROL_STATUS: 0x0000
Instructs the fuel gauge to return status information to Control addresses 0x00 and 0x01. The status word
includes the following information.
Table 13. CONTROL_STATUS Flags
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
High Byte
SE
FAS
SS
CALMODE
CCA
BCA
RSVD
HDQHOSTIN
Low Byte
SHUTDWN
HIBERNATE
FULLSLEEP
SLEEP
LDMD
RUP_DIS
VOK
QEN
SE = Status bit indicating the SE pin is active. True when set. Default is 0.
FAS = Status bit indicating the bq27545-G1 is in FULL ACCESS SEALED state. Active when set.
SS = Status bit indicating the bq27545-G1 is in the SEALED State. Active when set.
CALMODE = Status bit indicating the calibration function is active. True when set. Default is 0.
CCA =
Status bit indicating the bq27545-G1 Coulomb Counter Calibration routine is active. The CCA routine will take place
approximately 1 minute after the initialization and periodically as gauging conditions change. Active when set.
BCA = Status bit indicating the bq27545-G1 Board Calibration routine is active. Active when set.
RSVD = Reserved
HDQHOSTIN = Status bit indicating the HDQ interrupt function is active. True when set. Default is 0.
SHUTDWN = Control bit indicating that the SET_SHUTDOWN command has been sent and the state of the SE pin can change to
signal an external shutdown of the fuel gauge when conditions permit. (See the SHUTDOWN Mode section.)
HIBERNATE = Status bit indicating a request for entry into HIBERNATE from SLEEP mode has been issued. True when set. Default is
0.
FULLSLEEP =
Status bit indicating the bq27545-G1 is in FULLSLEEP mode. True when set. The state can be detected by monitoring
the power used by the bq27545-G1 because any communication will automatically clear it.
SLEEP = Status bit indicating the bq27545-G1 is in SLEEP mode. True when set.
LDMD = Status bit indicating the bq27545-G1 Impedance Track algorithm is using CONSTANT-POWER mode. True when set.
Default is 0 (CONSTANT-CURRENT mode).
RUP_DIS = Status bit indicating the bq27545-G1 Ra table updates are disabled. True when set.
VOK = Status bit indicating cell voltages are OK for Qmax updates. True when set.
QEN = Status bit indicating the bq27545-G1 Qmax updates are enabled. True when set.
8.5.2.1.1.2 DEVICE_TYPE: 0x0001
Instructs the fuel gauge to return the device type to addresses 0x00 and 0x01. The bq27545-G1 device type
returns 0x0545.
8.5.2.1.1.3 FW_VERSION: 0x0002
Instructs the fuel gauge to return the firmware version to addresses 0x00 and 0x01. The bq27545-G1 firmware
version returns 0x0224.
8.5.2.1.1.4 HW_VERSION: 0x0003
Instructs the fuel gauge to return the hardware version to addresses 0x00 and 0x01. For bq27545-G1 0x0020 is
returned.
8.5.2.1.1.5 RESET_DATA: 0x0005
Instructs the fuel gauge to return the number of resets performed to addresses 0x00 and 0x01.
8.5.2.1.1.6 PREV_MACWRITE: 0x0007
Instructs the fuel gauge to return the previous Control() subcommand written to addresses 0x00 and 0x01. The
value returned is limited to less than 0x0020.
8.5.2.1.1.7 CHEM_ID: 0x0008
Instructs the fuel gauge to return the chemical identifier for the Impedance Track configuration to addresses 0x00
and 0x01.
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8.5.2.1.1.8 BOARD_OFFSET: 0x0009
Instructs the fuel gauge to perform board offset calibration. During board offset calibration the [BCA] bit is set
8.5.2.1.1.9 CC_OFFSET: 0x000a
Instructs the fuel gauge to perform coulomb counter offset calibration. During calibration the [CCA] bit is set
8.5.2.1.1.10 CC_OFFSET_SAVE: 0x000b
Instructs the fuel gauge to save calibration coulomb counter offset after calibration.
8.5.2.1.1.11 DF_VERSION: 0x000c
Instructs the gas gauge to return the data flash version stored in DF Config Version to addresses 0x00 and
0x01.
8.5.2.1.1.12 SET_FULLSLEEP: 0x0010
Instructs the gas gauge to set the FullSleep bit in Control Status register to 1. This will allow the gauge to enter
the FULLSLEEP power mode after the transition to SLEEP power state is detected. In FULLSLEEP mode, less
power is consumed by disabling an oscillator circuit used by the communication engines. For HDQ
communication one host message will be dropped. For I2C communications the first I2C message will incur a 6–8
ms clock stretch while the oscillator is started and stabilized. A communication to the device in FULLSLEEP will
force the part back to the SLEEP mode.
8.5.2.1.1.13 SET_HIBERNATE: 0x0011
Instructs the fuel gauge to force the CONTROL_STATUS [HIBERNATE] bit to 1. This will allow the gauge to
enter the HIBERNATE power mode after the transition to SLEEP power state is detected and the required
conditions are met. The [HIBERNATE] bit is automatically cleared upon exiting from HIBERNATE mode.
8.5.2.1.1.14 CLEAR_HIBERNATE: 0x0012
Instructs the fuel gauge to force the CONTROL_STATUS [HIBERNATE] bit to 0. This will prevent the gauge from
entering the HIBERNATE power mode after the transition to SLEEP power state is detected unless Voltage() is
less than Hibernate V. It can also be used to force the gauge out of HIBERNATE mode.
8.5.2.1.1.15 SET_SHUTDOWN: 0x0013
Sets the CONTROL_STATUS [SHUTDWN] bit to 1, thereby enabling the SE pin to change state. The Impedance
Track algorithm controls the setting of the SE pin, depending on whether the conditions are met for fuel gauge
shutdown or not.
8.5.2.1.1.16 CLEAR_SHUTDOWN: 0x0014
Disables the SE pin from changing state. The SE pin is left in a high-impedance state.
8.5.2.1.1.17 SET_HDQINTEN: 0x0015
Instructs the fuel gauge to set the CONTROL_STATUS [HDQIntEn] bit to 1. This will enable the HDQ Interrupt
function. When this subcommand is received, the device will detect any of the interrupt conditions and assert the
interrupt at one second intervals until the CLEAR_HDQINTEN command is received or the count of
HDQHostIntrTries has lapsed (default 3).
8.5.2.1.1.18 CLEAR_HDQINTEN: 0x0016
Instructs the fuel gauge to set the CONTROL_STATUS [HDQIntEn] bit to 0. This will disable the HDQ Interrupt
function.
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8.5.2.1.1.19 STATIC_CHEM_DF_CHKSUM: 0x0017
Instructs the fuel gauge to calculate chemistry checksum as a 16-bit unsigned integer sum of all static chemistry
data. The most significant bit (MSB) of the checksum is masked yielding a 15-bit checksum. This checksum is
compared with value stored in the data flash Static Chem DF Checksum. If the value matches, the MSB will be
cleared to indicate pass. If it does not match, the MSB will be set to indicate failure. The checksum can be used
to verify the integrity of the chemistry data stored internally.
8.5.2.1.1.20 SEALED: 0x0020
Instructs the gas gauge to transition from UNSEALED state to SEALED state. The gas gauge should always be
set to SEALED state for use in customer’s end equipment as it prevents spurious writes to most Standard
Commands and blocks access to most data flash.
8.5.2.1.1.21 IT ENABLE: 0x0021
This command forces the fuel gauge to begin the Impedance Track algorithm, sets bit 2 of UpdateStatus and
causes the [VOK] and [QEN] flags to be set in the CONTROL_STATUS register. [VOK] is cleared if the voltages
are not suitable for a Qmax update. Once set, [QEN] cannot be cleared. This command is only available when
the fuel gauge is UNSEALED and is typically enabled at the last step of production after system test is
completed.
8.5.2.1.1.22 RESET: 0x0041
This command instructs the gas gauge to perform a full reset. This command is only available when the gas
gauge is UNSEALED.
8.5.2.1.1.23 EXIT_CAL: 0x0080
This command instructs the gas gauge to exit CALIBRATION mode.
8.5.2.1.1.24 Enter_cal: 0x0081
This command instructs the gas gauge to enter CALIBRATION mode.
8.5.2.1.1.25 OFFSET_CAL: 0x0082
This command instructs the gas gauge to perform offset calibration.
8.5.2.1.2 AtRate(): 0x02 and 0x03
The AtRate() read-/write-word function is the first half of a two-function command call-set used to set the AtRate
value used in calculations made by the AtRateTimeToEmpty() function. The AtRate() units are in mA.
The AtRate() value is a signed integer, with negative values interpreted as a discharge current value. The
AtRateTimeToEmpty() function returns the predicted operating time at the AtRate value of discharge. The default
value for AtRate() is zero and will force AtRateTimeToEmpty() to return 65,535. Both the AtRate() and
AtRateTimeToEmpty() commands should only be used in NORMAL mode.
8.5.2.1.3 UnfilteredSOC(): 0x04 And 0x05
This read-only function returns an unsigned integer value of the predicted remaining battery capacity expressed
as a percentage of UnfilteredFCC(), with a range of 0 to 100%.
8.5.2.1.4 Temperature(): 0x06 And 0x07
This read-only function returns an unsigned integer value of the battery temperature in units of 0.1K measured by
the fuel gauge and is used for fuel gauging algorithm. It reports either the InternalTemperature() or the external
thermistor temperature depending on the setting of [TEMPS] bit in Pack Configuration.
8.5.2.1.5 Voltage(): 0x08 And 0x09
This read-only function returns an unsigned integer value of the measured cell-pack voltage in mV with a range
of 0 to 6000 mV.
30
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8.5.2.1.6 Flags(): 0x0a And 0x0b
This read-only function returns the contents of the gas-gauge status register, depicting the current operating
status.
Table 14. Flags Bit Definitions
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
High Byte
OTC
OTD
BATHI
BATLOW
CHG_INH
RSVD
FC
CHG
Low Byte
OCVTAKEN
ISD
TDD
HW1
HW0
SOC1
SOCF
DSG
OTC =
Over-Temperature in Charge condition is detected. True when set. Refer to the Data Flash Safety Subclass
parameters for threshold settings.
OTD =
Over-Temperature in Discharge condition is detected. True when set. Refer to the Data Flash Safety Subclass
parameters for threshold settings.
BATHI =
BATLOW =
Battery High bit indicating a high battery voltage condition. Refer to the Data Flash BATTERY HIGH parameters for
threshold settings.
Battery Low bit indicating a low battery voltage condition. Refer to the Data Flash BATTERY LOW parameters for
threshold settings.
CHG_INH = Charge Inhibit indicates the temperature is outside the range [Charge Inhibit Temp Low, Charge Inhibit Temp
High]. True when set.
RSVD = Reserved.
FC =
Full-charged is detected. FC is set when charge termination is reached and FC Set% = –1 (see Charging and Charge
Termination Indication) or State of Charge is larger than FC Set% and FC Set% is not –1. True when set.
CHG = (Fast) charging allowed. True when set.
OCVTAKEN = Cleared on entry to RELAX mode and set to 1 when OCV measurement is performed in RELAX.
ISD = Internal Short is detected. True when set.
TDD = Tab Disconnect is detected. True when set.
HW[1:0] Device Identification. Default is 1/0
SOC1 = State-of-Charge-Threshold 1 (SOC1 Set) reached. True when set.
SOCF = State-of-Charge-Threshold Final (SOCF Set %) reached. True when set.
DSG = Discharging detected. True when set.
8.5.2.1.7 NominalAvailableCapacity(): 0x0c and 0x0d
This read-only command pair returns the uncompensated (less than C/20 load) battery capacity remaining. Units
are mAh.
8.5.2.1.8 FullAvailableCapacity(): 0x0e and 0x0f
This read-only command pair returns the uncompensated (less than C/20 load) capacity of the battery when fully
charged. Units are mAh. FullAvailableCapacity() is updated at regular intervals, as specified by the IT algorithm.
8.5.2.1.9 RemainingCapacity(): 0x10 and 0x11
This read-only command pair returns the compensated battery capacity remaining (UnfilteredRM()) when the
[SmoothEn] bit in Operating Configuration C is cleared or filtered compensated battery capacity remaining
(FilteredRM()) when [SmoothEn] is set. Units are mAh.
8.5.2.1.10 FullChargeCapacity(): 0x12 and 0x13
This read-only command pair returns the compensated capacity of fully charged battery (UnfilteredFCC()) when
the [SmoothEn] bit in Operating Configuration C is cleared or filtered compensated capacity of fully charged
battery (FilteredFCC()) when [SmoothEn] is set. Units are mAh. FullChargeCapacity() is updated at regular
intervals, as specified by the IT algorithm.
8.5.2.1.11 AverageCurrent(): 0x14 and 0x15
This read-only command pair returns a signed integer value that is the average current flow through the sense
resistor. It is updated every 1 second. Units are mA.
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8.5.2.1.12 TimeToEmpty(): 0x16 And 0x17
This read-only function returns an unsigned integer value of the predicted remaining battery life at the present
rate of discharge, in minutes. A value of 65,535 indicates battery is not being discharged.
8.5.2.1.13 FilteredFCC(): 0x18 And 0x19
This read-only command pair returns the filtered compensated capacity of the battery when fully charged when
the [SmoothEn] bit in Operating Configuration C is set. Units are mAh. FilteredFCC() is updated at regular
intervals, as specified by the IT algorithm.
8.5.2.1.14 StandbyCurrent(): 0x1a And 0x1b
This read-only function returns a signed integer value of the measured system standby current through the sense
resistor. The StandbyCurrent() is an adaptive measurement. Initially it reports the standby current programmed in
Initial Standby, and after spending some time in standby, reports the measured standby current.
The register value is updated every 1 second when the measured current is above the Deadband and is less
than or equal to 2 × Initial Standby. The first and last values that meet this criteria are not averaged in, because
they may not be stable values. To approximate a 1 minute time constant, each new StandbyCurrent() value is
computed by taking approximate 93% weight of the last standby current and approximate 7% of the current
measured average current.
8.5.2.1.15 UnfilteredFCC(): 0x1c And 0x1d
This read-only command pair returns the compensated capacity of the battery when fully charged. Units are
mAh. UnFilteredFCC() is updated at regular intervals, as specified by the IT algorithm.
8.5.2.1.16 MaxLoadCurrent(): 0x1e And 0x1f
This read-only function returns a signed integer value, in units of mA, of the maximum load conditions of the
system. The MaxLoadCurrent() is an adaptive measurement which is initially reported as the maximum load
current programmed in Initial Max Load Current. If the measured current is ever greater than Initial Max Load
Current, then MaxLoadCurrent() updates to the new current. MaxLoadCurrent() is reduced to the average of the
previous value and Initial Max Load Current whenever the battery is charged to full after a previous discharge
to an SOC less than 50%. This prevents the reported value from maintaining an unusually high value.
8.5.2.1.17 UnfilteredRM(): 0x20 And 0x21
This read-only command pair returns the compensated battery capacity remaining. Units are mAh.
8.5.2.1.18 FilteredRM(): 0x22 And 0x23
This read-only command pair returns the filtered compensated battery capacity remaining when [SmoothEn] bit in
Operating Configuration C is set. Units are mAh.
8.5.2.1.19 AveragePower(): 0x24 And 0x25
This read-word function returns an unsigned integer value of the average power of the current discharge. It is
negative during discharge and positive during charge. A value of 0 indicates that the battery is not being
discharged. The value is reported in units of mW (Design Energy Scale = 1) or cW (Design Energy Scale =
10).
8.5.2.1.20 InternalTemperature(): 0x28 And 0x29
This read-only function returns an unsigned integer value of the measured internal temperature of the device in
units of 0.1K measured by the fuel gauge.
8.5.2.1.21 CycleCount(): 0x2a And 0x2b
This read-only function returns an unsigned integer value of the number of cycles the battery has experienced
with a range of 0 to 65,535. One cycle occurs when accumulated discharge ≥ CC Threshold.
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8.5.2.1.22 StateOfCharge(): 0x2c And 0x2d
This read-only function returns an unsigned integer value of the predicted RemainingCapacity() expressed as a
percentage of FullChargeCapacity(), with a range of 0 to 100%. The StateOfCharge() can be filtered or unfiltered
because RemainingCapacity() and FullChargeCapacity() can be filtered or unfiltered based on [SmoothEn] bit
selection.
8.5.2.1.23 StateOfHealth(): 0x2e And 0x2f
0x2e SOH percentage: this read-only function returns an unsigned integer value, expressed as a percentage of
the ratio of predicted FCC(25°C, SOH Load I) over the DesignCapacity(). The FCC(25°C, SOH Load I) is the
calculated full charge capacity at 25°C and the SOH current rate which is specified by SOH Load I. The range of
the returned SOH percentage is 0x00 to 0x64, indicating 0 to 100% correspondingly.
8.5.2.1.24 PassedCharge(): 0x34 And 0x35
This signed integer indicates the amount of charge passed through the sense resistor because the last IT
simulation in mAh.
8.5.2.1.25 Dod0(): 0x36 And 0x37
This unsigned integer indicates the depth of discharge during the most recent OCV reading.
8.5.2.1.26 SelfDischargeCurrent(): 0x38 And 0x39
This read-only command pair returns the signed integer value that estimates the battery self-discharge current.
8.5.3 Extended Data Commands
Extended commands offer additional functionality beyond the standard set of commands. They are used in the
same manner; however unlike standard commands, extended commands are not limited to 2-byte words. The
number of command bytes for a given extended command ranges in size from single to multiple bytes, as
specified in Table 15. For details on the SEALED and UNSEALED states, see Access Modes.
Table 15. Extended Commands
NAME
COMMAND CODE
Reserved
UNIT
SEALED
ACCESS (1) (2)
UNSEALED
ACCESS (1) (2)
RSVD
0x38…0x39
N/A
R
R
PCR
0x3a/0x3b
Hex
R
R
DesignCapacity()
DCAP
0x3c/0x3d
mAh
R
R
DataFlashClass() (2)
DFCLS
0x3e
N/A
N/A
R/W
DFBLK
0x3f
N/A
R/W
R/W
PackConfig()
DataFlashBlock() (2)
BlockData()/Authenticate()
(3)
A/DF
0x40…0x53
N/A
R/W
R/W
ACKS/DFD
0x54
N/A
R/W
R/W
DFD
0x55…0x5f
N/A
R
R/W
BlockDataCheckSum()
DFDCKS
0x60
N/A
R/W
R/W
BlockDataControl()
DFDCNTL
0x61
N/A
N/A
R/W
DNAMELEN
0x62
N/A
R
R
DNAME
0x63...0x6c
N/A
R
R
RSVD
0x6d...0x7f
N/A
R
R
BlockData()/AuthenticateCheckSum()
(3)
BlockData()
DeviceNameLength()
DeviceName()
Reserved
(1)
(2)
(3)
SEALED and UNSEALED states are entered through commands to Control() 0x00 and 0x01.
In SEALED mode, data flash CANNOT be accessed through commands 0x3E and 0x3F.
The BlockData() command area shares functionality for accessing general data flash and for using Authentication. See Authentication
for more details.
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8.5.3.1 PackConfig(): 0x3a and 0x3b
SEALED and UNSEALED Access: This command returns the value stored in Pack Configuration and is
expressed in hex value.
8.5.3.2 DesignCapacity(): 0x3c And 0x3d
SEALED and UNSEALED Access: This command returns the value stored in Design Capacity and is expressed
in mAh. This is intended to be the theoretical or nominal capacity of a new pack, but has no bearing on the
operation of the fuel gauge functionality.
8.5.3.3 DataFlashClass(): 0x3e
This command sets the data flash class to be accessed. The Subclass ID to be accessed should be entered in
hexadecimal.
SEALED Access: This command is not available in SEALED mode.
8.5.3.4 DataFlashBlock(): 0x3f
UNSEALED Access: This command sets the data flash block to be accessed. When 0x00 is written to
BlockDataControl(), DataFlashBlock() holds the block number of the data flash to be read or written. Example:
writing a 0x00 to DataFlashBlock() specifies access to the first 32 byte block and a 0x01 specifies access to the
second 32 byte block, and so on.
SEALED Access: This command directs which data flash block is accessed by the BlockData() command.
Writing a 0x00 to DataFlashBlock() specifies the BlockData() command transfers authentication data. Issuing a
0x01 or 0x02 instructs the BlockData() command to transfer Manufacturer Info Block A or B respectively.
8.5.3.5 BlockData(): 0x40 Through 0x5f
This command range is used to transfer data for data flash class access. This command range is the 32-byte
data block used to access Manufacturer Info Block A or B. Manufacturer Info Block A is read only for the
sealed access. UNSEALED access is read/write.
8.5.3.6 BlockDataChecksum(): 0x60
The host system should write this value to inform the device that new data is ready for programming into the
specified data flash class and block.
UNSEALED Access: This byte contains the checksum on the 32 bytes of block data read or written to data flash.
The least-significant byte of the sum of the data bytes written must be complemented ( [255 – x], for x the 8-bit
summation of the BlockData() (0x40 to 0x5F) on a byte-by-byte basis.) before being written to 0x60.
SEALED Access: This byte contains the checksum for the 32 bytes of block data written to Manufacturer Info
Block A. The least-significant byte of the sum of the data bytes written must be complemented ( [255 – x], for x
the 8-bit summation of the BlockData() (0x40 to 0x5F) on a byte-by-byte basis.) before being written to 0x60.
8.5.3.7 BlockDataControl(): 0x61
UNSEALED Access: This command is used to control data flash access mode. The value determines the data
flash to be accessed. Writing 0x00 to this command enables BlockData() to access general data flash.
SEALED Access: This command is not available in SEALED mode.
8.5.3.8 DeviceNameLength(): 0x62
UNSEALED and SEALED Access: This byte contains the length of the Device Name.
8.5.3.9 DeviceName(): 0x63 Through 0x6c
UNSEALED and SEALED Access: This block contains the device name that is programmed in Device Name.
8.5.3.10 Reserved: 0x6a Through 0x7f
Reserved Area. Not available for customer access.
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8.5.4 Data Flash Interface
8.5.4.1 Accessing the Data Flash
The bq27545-G1 data flash is a non-volatile memory that contains initialization, default, cell status, calibration,
configuration, and user information. The data flash can be accessed in several different ways, depending on
what mode the bq27545-G1 is operating in and what data is being accessed.
Commonly accessed data flash memory locations, frequently read by a system, are conveniently accessed
through specific instructions, already described in Data Commands. These commands are available when the
bq27545-G1 is either in UNSEALED or SEALED modes.
Most data flash locations, however, are only accessible in UNSEALED mode by use of the bq27545-G1
evaluation software or by data flash block transfers. These locations should be optimized and/or fixed during the
development and manufacture processes. They become part of a golden image file and can then be written to
multiple battery packs. Once established, the values generally remain unchanged during end-equipment
operation.
To access data flash locations individually, the block containing the desired data flash location(s) must be
transferred to the command register locations, where they can be read to the system or changed directly. This is
accomplished by sending the set-up command BlockDataControl() (0x61) with data 0x00. Up to 32 bytes of data
can be read directly from the BlockData() (0x40…0x5f), externally altered, then rewritten to the BlockData()
command space. Alternatively, specific locations can be read, altered, and rewritten if their corresponding offsets
are used to index into the BlockData() command space. Finally, the data residing in the command space is
transferred to data flash, once the correct checksum for the whole block is written to BlockDataChecksum()
(0x60).
Occasionally, a data flash CLASS will be larger than the 32-byte block size. In this case, the DataFlashBlock()
command is used to designate which 32-byte block the desired locations reside in. The correct command
address is then given by 0x40 + offset modulo 32. For example, to access Terminate Voltage in the Gas
Gauging class, DataFlashClass() is issued 80 (0x50) to set the class. Because the offset is 67, it must reside in
the third 32-byte block. Hence, DataFlashBlock() is issued 0x02 to set the block offset, and the offset used to
index into the BlockData() memory area is 0x40 + 67 modulo 32 = 0x40 + 16 = 0x40 + 0x03 = 0x43.
Reading and writing subclass data are block operations up to 32 bytes in length. If during a write the data length
exceeds the maximum block size, then the data is ignored.
None of the data written to memory are bounded by the bq27545-G1—the values are not rejected by the fuel
gauge. Writing an incorrect value may result in hardware failure due to firmware program interpretation of the
invalid data. The written data is persistent, so a power-on reset does not resolve the fault.
8.5.4.2 Manufacturer Information Blocks
The bq27545-G1 contains 64 bytes of user programmable data flash storage: Manufacturer Info Block A and
Manufacturer Info Block B, . The method for accessing these memory locations is slightly different, depending
on whether the device is in UNSEALED or SEALED modes.
When in UNSEALED mode and when 0x00 has been written to BlockDataControl(), accessing the Manufacturer
Info Blocks is identical to accessing general data flash locations. First, a DataFlashClass() command is used to
set the subclass, then a DataFlashBlock() command sets the offset for the first data flash address within the
subclass. The BlockData() command codes contain the referenced data flash data. When writing the data flash,
a checksum is expected to be received by BlockDataChecksum(). Only when the checksum is received and
verified is the data actually written to data flash.
As an example, the data flash location for Manufacturer Info Block B is defined as having a subclass = 58 and
an Offset = 32 through 63 (32 byte block). The specification of Class = System Data is not needed to address
Manufacturer Info Block B, but is used instead for grouping purposes when viewing data flash info in the
bq27545-G1 evaluation software.
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When in SEALED mode or when 0x01 BlockDataControl() does not contain 0x00, data flash is no longer
available in the manner used in UNSEALED mode. Rather than issuing subclass information, a designated
Manufacturer Information Block is selected with the DataFlashBlock() command. Issuing a 0x01 or 0x02 with this
command causes the corresponding information block (A or B respectively) to be transferred to the command
space 0x40…0x5f for editing or reading by the system. Upon successful writing of checksum information to
BlockDataChecksum(), the modified block is returned to data flash. Note: Manufacturer Info Block A is readonly when in SEALED mode.
8.5.5 Access Modes
The bq27545-G1 provides three security modes (FULL ACCESS, UNSEALED, and SEALED) that control data
flash access permissions. Data Flash refers to those data flash locations, Table 16, that are accessible to the
user. Manufacture Information refers to the two 32-byte blocks.
Table 16. Data Flash Access
SECURITY MODE
DATA FLASH
MANUFACTURER INFORMATION
FULL ACCESS
R/W
R/W
UNSEALED
R/W
R/W
SEALED
None
R (A); R/W (B)
Although FULL ACCESS and UNSEALED modes appear identical, only FULL ACCESS mode allows the
bq27545-G1 to write access-mode transition keys stored in the Security class.
8.5.6 Sealing and Unsealing Data Flash
The bq27545-G1 implements a key-access scheme to transition between SEALED, UNSEALED, and FULLACCESS modes. Each transition requires that a unique set of two keys be sent to the bq27545-G1 through the
Control() control command. The keys must be sent consecutively, with no other data being written to the
Control() register in between. To avoid conflict, the keys must be different from the codes presented in the CNTL
DATA column of Table 12 subcommands.
When in SEALED mode the [SS] bit of CONTROL_STATUS is set, but when the UNSEAL keys are correctly
received by the bq27545-G1, the [SS] bit is cleared. When the full-access keys are correctly received the
CONTROL_STATUS [FAS] bit is cleared.
Both Unseal Key and Full-Access Key have two words and are stored in data flash. The first word is Key 0 and
the second word is Key 1. The order of the keys sent to bq27545-G1 are Key 1 followed by Key 0. The order of
the bytes for each key entered through the Control() command is the reverse of what is read from the part. For
an example, if the Unseal Key is 0x56781234, key 1 is 0x1234 and key 0 is 0x5678. Then Control() should
supply 0x3412 and 0x7856 to unseal the part. The Unseal Key and the Full-Access Key can only be updated
when in FULL-ACCESS mode.
8.5.7 Data Flash Summary
The following table summarizes the data flash locations, including their default, minimum, and maximum values,
that are available to users.
Table 17. Data Flash Summary
Data
Type
Min Value
Max Value
Default Value
Units
(EVSW
Units)*
OT Chg
I2
0
1200
550
0.1°C
OT Chg Time
U1
0
60
2
s
I2
0
1200
500
0.1°C
OT Dsg
I2
0
1200
600
0.1°C
OT Dsg Time
U1
0
60
2
s
OT Dsg Recovery
I2
0
1200
550
0.1°C
0
Chg Inhibit Temp Low
I2
–400
1200
0
0.1°C
2
Chg Inhibit Temp High
I2
–400
1200
450
0.1°C
Charge Inhibit Cfg
4
Temp Hys
I2
0
100
50
0.1°C
Charge
0
Charging Voltage
I2
0
4600
4200
mV
Class
Subclass
ID
Subclass
Offset
Configuration
2
Safety
0
Configuration
2
Safety
2
Configuration
2
Safety
3
OT Chg Recovery
Configuration
2
Safety
5
Configuration
2
Safety
7
Configuration
2
Safety
8
Configuration
32
Charge Inhibit Cfg
Configuration
32
Charge Inhibit Cfg
Configuration
32
Configuration
34
36
Name
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Table 17. Data Flash Summary (continued)
Class
Subclass
ID
Subclass
Offset
Configuration
36
Charge Termination
Configuration
36
Charge Termination
Configuration
36
Charge Termination
4
Configuration
36
Charge Termination
6
Configuration
36
Charge Termination
7
Configuration
36
Charge Termination
Configuration
36
Charge Termination
Configuration
36
Configuration
Units
(EVSW
Units)*
Name
Data
Type
Min Value
Max Value
Default Value
0
Taper Current
I2
0
1000
100
mA
2
Min Taper Capacity
I2
0
1000
25
mAh
Taper Voltage
I2
0
1000
100
mV
Current Taper Window
U1
0
60
40
s
TCA Set %
I1
–1
100
99
%
8
TCA Clear %
I1
–1
100
95
%
9
FC Set %
I1
–1
100
–1
%
Charge Termination
10
FC Clear %
I1
–1
100
98
%
36
Charge Termination
11
DODatEOC Delta T
I2
0
1000
50
0.1°C
Configuration
48
Data
0
Rem Cap Alarm
I2
0
700
100
mA
Configuration
48
Data
8
Initial Standby
I1
–256
0
–10
mA
Configuration
48
Data
9
Initial MaxLoad
I2
–32767
0
–500
mA
Configuration
48
Data
17
Cycle Count
U2
0
65535
0
Configuration
48
Data
19
CC Threshold
I2
100
32767
900
Configuration
48
Data
23
Design Capacity
I2
0
32767
1000
mAh
Configuration
48
Data
25
Design Energy
I2
0
32767
5400
mWh
Configuration
48
Data
27
SOH Load I
I2
–32767
0
–400
mA
Configuration
48
Data
29
TDD SOH Percent
I1
0
100
80
%
Configuration
48
Data
40
ISD Current
I2
0
32767
10
HourRate
Configuration
48
Data
42
ISD I Filter
U1
0
255
127
Configuration
48
Data
43
Min ISD Time
U1
0
255
7
Configuration
48
Data
44
Design Energy Scale
U1
0
255
1
Configuration
48
Data
45
Device Name
S11
x
x
bq27545-G1
—
Configuration
49
Discharge
0
SOC1 Set Threshold
U2
0
65535
150
mAh
Configuration
49
Discharge
2
SOC1 Clear Threshold
U2
0
65535
175
mAh
Configuration
49
Discharge
4
SOCF Set Threshold
U2
0
65535
75
mAh
Configuration
49
Discharge
6
SOCF Clear Threshold
U2
0
65535
100
mAh
Configuration
49
Discharge
9
BL Set Volt Threshold
I2
0
16800
2500
mV
Configuration
49
Discharge
11
BL Set Volt Time
U1
0
60
2
s
Configuration
49
Discharge
12
BL Clear Volt Threshold
I2
0000
16800
2600
mV
Configuration
49
Discharge
14
BH Set Volt Threshold
I2
0
16800
4500
mV
Configuration
49
Discharge
16
BH Volt Time
U1
0
60
2
s
Configuration
49
Discharge
17
BH Clear Volt Threshold
I2
0000
16800
4400
mV
Configuration
56
Manufacturer Data
0
Pack Lot Code
H2
0x0
0xffff
0x0
—
Configuration
56
Manufacturer Data
2
PCB Lot Code
H2
0x0
0xffff
0x0
—
Configuration
56
Manufacturer Data
4
Firmware Version
H2
0x0
0xffff
0x0
—
Configuration
56
Manufacturer Data
6
Hardware Revision
H2
0x0
0xffff
0x0
—
Configuration
56
Manufacturer Data
8
Cell Revision
H2
0x0
0xffff
0x0
—
Configuration
56
Manufacturer Data
10
DF Config Version
H2
0x0
0xffff
0x0
—
Configuration
57
Integrity Data
6
Static Chem DF Checksum
H2
0x0
0x7fff
0x0
Configuration
59
Lifetime Data
0
Lifetime Max Temp
I2
0
1400
0
0.1°C
Configuration
59
Lifetime Data
2
Lifetime Min Temp
I2
–600
1400
500
0.1°C
Configuration
59
Lifetime Data
4
Lifetime Max Pack Voltage
I2
0
32767
2800
mV
Configuration
59
Lifetime Data
6
Lifetime Min Pack Voltage
I2
0
32767
4200
mV
Configuration
59
Lifetime Data
8
Lifetime Max Chg Current
I2
–32767
32767
0
mA
Configuration
59
Lifetime Data
10
Lifetime Max Dsg Current
I2
–32767
32767
0
mA
Configuration
60
Lifetime Temp Samples
0
LT Flash Cnt
U2
0
65535
0
Configuration
64
Registers
0
Pack Configuration
H2
0x0
0xffff
0x1177
Configuration
64
Registers
2
Pack Configuration B
H1
0x0
0xff
0xa7
Configuration
64
Registers
3
Pack Configuration C
H1
0x0
0xff
0x18
Configuration
66
Lifetime Resolution
0
LT Temp Res
U1
0
255
10
Num
Configuration
66
Lifetime Resolution
1
LT V Res
U1
0
255
25
Num
Configuration
66
Lifetime Resolution
2
LT Cur Res
U1
0
255
100
Num
Configuration
66
Lifetime Resolution
3
LT Update Time
U2
0
65535
60
Num
Configuration
68
Power
0
Flash Update OK Voltage
I2
0
4200
2800
mV
mAh
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Table 17. Data Flash Summary (continued)
Data
Type
Min Value
Max Value
Default Value
Units
(EVSW
Units)*
Sleep Current
I2
0
100
10
mA
Hibernate I
U2
0
700
8
mA
13
Hibernate V
U2
2400
3000
2550
mV
Power
15
FS Wait
U1
0
255
0
s
58
Manufacturer Info
0–31
Block A 0–31
H1
0x0
0xff
0x0
—
—
Class
Subclass
ID
Subclass
Configuration
68
Configuration
68
Configuration
Offset
Name
Power
2
Power
11
68
Power
Configuration
68
System Data
System Data
58
Manufacturer Info
32–63
Block B 0–31
H1
0x0
0xff
0x0
Gas Gauging
80
IT Cfg
0
Load Select
U1
0
255
1
Gas Gauging
80
IT Cfg
1
Load Mode
U1
0
255
0
Gas Gauging
80
IT Cfg
21
Max Res Factor
U1
0
255
15
Gas Gauging
80
IT Cfg
22
Min Res Factor
U1
0
255
5
Gas Gauging
80
IT Cfg
25
Ra Filter
U2
0
1000
800
Gas Gauging
80
IT Cfg
67
Terminate Voltage
I2
2800
3700
3000
mV
Gas Gauging
80
IT Cfg
69
Term V Delta
I2
0
4200
200
mV
Gas Gauging
80
IT Cfg
72
ResRelax Time
U2
0
65534
500
s
Gas Gauging
80
IT Cfg
76
User Rate-mA
I2
2000
9000
0
mA
Gas Gauging
80
IT Cfg
78
User Rate-Pwr
I2
3000
14000
0
mW/cW
Gas Gauging
80
IT Cfg
80
Reserve Cap-mAh
I2
0
9000
0
mA
Gas Gauging
80
IT Cfg
82
Reserve Energy
I2
0
14000
0
mWh/cWh
Gas Gauging
80
IT Cfg
86
Max Scale Back Grid
U1
0
15
4
Gas Gauging
80
IT Cfg
87
Max DeltaV
U2
0
65535
200
Gas Gauging
80
IT Cfg
89
Min DeltaV
U2
0
65535
0
mV
Gas Gauging
80
IT Cfg
91
Max Sim Rate
U1
0
255
1
C/rate
Gas Gauging
80
IT Cfg
92
Min Sim Rate
U1
0
255
20
C/rate
Gas Gauging
80
IT Cfg
93
Ra Max Delta
U2
0
65535
43
mΩ
Gas Gauging
80
IT Cfg
95
Qmax Max Delta %
U1
0
100
5
mAmpHour
Gas Gauging
80
IT Cfg
96
DeltaV Max Delta
U2
0
65535
10
mV
Gas Gauging
80
IT Cfg
102
Fast Scale Start SOC
U1
0
100
10
%
Gas Gauging
80
IT Cfg
103
Charge Hys V Shift
I2
0
2000
40
mV
Gas Gauging
81
Current Thresholds
0
Dsg Current Threshold
I2
0
2000
60
mA
Gas Gauging
81
Current Thresholds
2
Chg Current Threshold
I2
0
2000
75
mA
Gas Gauging
81
Current Thresholds
4
Quit Current
I2
0
1000
40
mA
Gas Gauging
81
Current Thresholds
6
Dsg Relax Time
U2
0
8191
60
s
Gas Gauging
81
Current Thresholds
8
Chg Relax Time
U1
0
255
60
s
Gas Gauging
81
Current Thresholds
9
Quit Relax Time
U1
0
63
1
s
Gas Gauging
81
Current Thresholds
10
Max IR Correct
U2
0
1000
400
mV
Gas Gauging
82
State
0
Qmax Cell 0
I2
0
32767
1000
mAh
Gas Gauging
82
State
2
Cycle Count
U2
0
65535
0
Gas Gauging
82
State
4
Update Status
H1
0x0
0x6
0x0
Gas Gauging
82
State
5
V at Chg Term
I2
0
5000
4200
mV
Gas Gauging
82
State
7
Avg I Last Run
I2
–32768
32767
–299
mA
Gas Gauging
82
State
9
Avg P Last Run
I2
–32768
32767
–1131
mA
Gas Gauging
82
State
11
Delta Voltage
I2
–32768
32767
2
mV
Gas Gauging
82
State
15
T Rise
I2
0
32767
20
Num
Gas Gauging
82
State
17
T Time Constant
I2
0
32767
1000
Num
OCV Table
83
OCV Table
0
Chem ID
H2
0
FFFF
0128
num
Ra Table
88
R_a0
0
Cell0 R_a flag
H2
0x0
0x0
0xff55
—
Ra Table
88
R_a0
2–31
Cell0 R_a 0–14
I2
183
183
407
2–10 Ω
Ra Table
89
R_a0x
0
xCell0 R_a flag
H2
0xffff
0xffff
0xffff
—
Ra Table
89
R_a0x
2–31
xCell0 R_a 0–14
I2
183
183
407
2–10 Ω
Calibration
104
Data
0
CC Gain
F4
1.0e–1
4.0e+1
0.4768
Calibration
104
Data
4
CC Delta
F4
2.9826e+4
1.193046e+
6
567744.56
Calibration
104
Data
8
CC Offset
I2
–32768
32767
–1200
mA
Calibration
104
Data
10
Board Offset
I1
–128
127
0
µAmp
Calibration
104
Data
11
Int Temp Offset
I1
–128
127
0
38
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Table 17. Data Flash Summary (continued)
Units
(EVSW
Units)*
Class
Subclass
ID
Subclass
Offset
Name
Data
Type
Min Value
Max Value
Default Value
Calibration
104
Data
12
Ext Temp Offset
I1
–128
127
0
Calibration
104
Data
13
Pack V Offset
I1
–128
127
0
Calibration
107
Current
1
Deadband
U1
0
255
5
mA
Security
112
Codes
0
Sealed to Unsealed
H4
0x0
0xffffffff
0x36720414
—
Security
112
Codes
4
Unsealed to Full
H4
0x0
0xffffffff
0xffffffff
—
Security
112
Codes
8
Authen Key3
H4
0x0
0xffffffff
0x01234567
—
Security
112
Codes
12
Authen Key2
H4
0x0
0xffffffff
0x89abcdef
—
Security
112
Codes
16
Authen Key1
H4
0x0
0xffffffff
0xfedcba98
—
Security
112
Codes
20
Authen Key0
H4
0x0
0xffffffff
0x76543210
—
Table 18. Data Flash to EVSW Conversion
Class
Subclass
ID
Subclass
Offset
Gas Gauging
80
IT Cfg
Gas Gauging
80
IT Cfg
Calibration
104
Calibration
Calibration
Calibration
EVSW
Unit
Data Flash (DF)
to EVSW
Conversion
0
mW/cW
DF × 10
0
mWh/cW
DF × 10
Num
10.124
mΩ
4.768/DF
5.595e5
Num
10.147
mΩ
5677445/DF
–1200
Num
–0.576
mV
DF × 0.0048
0
Num
0
µV
DF × 0.0075
Name
Data
Type
Data Flash
Default
Data Flash
Unit
EVSW
Default
78
User Rate-Pwr
I2
82
Reserve Energy
I2
0
cW/10W
0
cWh/10cWh
Data
0
CC Gain
F4
0.47095
104
Data
4
104
Data
8
CC Delta
F4
CC Offset
I2
104
Data
10
Board Offset
I1
8.6 Register Maps
8.6.1 Pack Configuration Register
Some bq27545-G1 pins are configured through the Pack Configuration data flash register, as indicated in
Table 19. This register is programmed/read through the methods described in Accessing the Data Flash. The
register is located at Subclass = 64, offset = 0.
Table 19. Pack Configuration Bit Definition
High Byte
Default =
bit7
RESCAP
0
bit6
CALEN
0
bit5
INTPOL
0
bit4
INTSEL
1
Low Byte
Default =
GNDSEL
0
RFACTSTEP
1
SLEEP
1
RMFCC
1
bit3
RSVD
0
bit2
IWAKE
0
bit1
RSNS1
0
bit0
RSNS0
1
SE_PU
0
SE_POL
1
SE_EN
1
TEMPS
1
0x11
0x77
RESCAP = No-load rate of compensation is applied to the reserve capacity calculation. True when set.
CALEN = Calibration mode is enabled.
INTPOL = Polarity for Interrupt pin. (See INTERRUPT Mode.)
INTSEL = Interrupt Pin select: 0 = SE pin, 1 = HDQ pin. (See INTERRUPT Mode.)
RSVD = Reserved. Must be 0.
IWAKE/RSNS1/RSNS0 = These bits configure the current wake function (See Wake-Up Comparator).
GNDSEL = The ADC ground select control. The VSS (pins C1, C2) is selected as ground reference when the bit is clear.
Pin A1 is selected when the bit is set.
RFACTSTEP = Enables Ra step up/down to Max/Min Res Factor before disabling Ra updates.
SLEEP = The fuel gauge can enter sleep, if operating conditions allow. True when set. (See SLEEP Mode.)
RMFCC =
RM is updated with the value from FCC, on valid charge termination. True when set. (See Detection Charge
Termination.)
SE_PU = pullup enable for SE pin. True when set (push-pull). (See SHUTDOWN Mode.)
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SE_POL = Polarity bit for SE pin. SE is active high when set (makes SE high when gauge is ready for shutdown). (See
SHUTDOWN Mode.)
SE_EN = Indicates if set the shutdown feature is enabled. True when set. (See SHUTDOWN Mode.)
TEMPS = Selects external thermistor for Temperature() measurements. True when set. (See Temperature Measurement
and the TS Input.)
8.6.2 Pack Configuration B Register
Some bq27545-G1 pins are configured through the Pack Configuration B data flash register, as indicated in
Table 20. This register is programmed/read through the methods described in Accessing the Data Flash. The
register is located at Subclass = 64, offset = 2.
Table 20. Pack Configuration B Bit Definition
Default =
bit7
ChgDoD
EoC
1
bit6
SE_TDD
bit5
VconsEN
bit4
SE_ISD
0
1
0
bit3
RSVD
bit2
LFPRelax
bit1
DoDWT
bit0
FConvEn
0
1
1
1
0x67
ChgDoDEoC = Enable DoD at EoC recalculation during charging only. True when set. Default setting is recommended.
SE_TDD = Enable Tab Disconnection Detection. True when set. (See Tab Disconnection Detection.)
VconsEN = Enable voltage consistency check. True when set. Default setting is recommended.
SE_ISD = Enable Internal Short Detection. True when set. (See Internal Short Detection.)
RSVD = Reserved. Must be 0
LFPRelax = Enable LiFePO4 long RELAX mode. True when set.
DoDWT =
Enable DoD weighting feature of gauging algorithm. This feature can improve accuracy during RELAX in a flat
portion of the voltage profile, especially when using LiFePO4 chemistry. True when set.
FConvEn = Enable fast convergence algorithm. Default setting is recommended. (See Fast Resistance Scaling.)
8.6.3 Pack Configuration C Register
Some bq27545-G1 algorithm settings are configured through the Pack Configuration C data flash register, as
indicated in Table 21. This register is programmed/read through the methods described in Accessing the Data
Flash. The register is located at Subclass = 64, offset = 3.
Table 21. Pack Configuration C Bit Definition
Default =
bit7
RSVD
bit6
RSVD
0
0
bit5
RelaxRC
JumpOK
0
bit4
SmoothEn
1
bit3
SleepWk
Chg
1
bit2
RSVD
bit1
RSVD
bit0
RSVD
0
0
0
0x18
RSVD = Reserved. Must be 0.
RelaxRCJumpOK =
Allow SOC to change due to temperature change during relaxation when SOC smoothing algorithm is enabled.
True when set.
SmoothEn = Enable SOC smoothing algorithm. True when set. (See StateOfCharge() Smoothing.)
SleepWkChg = Enables compensation for the passed charge missed when waking from SLEEP mode.
40
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The bq27545-G1 measures the cell voltage, temperature, and current to determine battery SOC based on
Impedance Track algorithm (see the Theory and Implementation of Impedance Track Battery Fuel-Gauging
Algorithm Application Note [SLUA450] for more information). The bq27545-G1 monitors charge and discharge
activity by sensing the voltage across a small-value resistor (5 mΩ to 20 mΩ typical.) between the SRP and SRN
pins and in series with the cell. By integrating charge passing through the battery, the battery’s SOC is adjusted
during battery charge or discharge.
9.2 Typical Application
VCC
J6
1
2
R12
Ext Thermistor
RT1
10 kΩ
4.7 k
R6
R9
100
100
4
3
VCC
C4
TP7
1
TP8
U1
bq27545YZFR
E3
0.1 µF
SE
Place C1 close to BAT pin
Place C2 close to REGIN pin
Vin Max: 4.2 V
Current Max: 3 A
C3
VCC
TS
SRP A1
HDQ A2
J7
SCL A3
SRN B1
J3
1
CE
CELL –
0.1 µF
C5
R1
ON
TP9
R15
10 k
4
R8
100
100
100
3
Place R1, R3, C5, C6, C7
Close to GG
SDA
2
100
AZ23C5V6-7
2
3
TP1
R4
TP5
TB1
2
J9
R10
R7
VSS C1
TP2
1
2
PACK+
CELL +
CELL +
1
2
10 k
1 µF
CELL –
1
R14
TS B2
SDA B3
0.1 µF
C6
0.1 µF
VCC
NC/GPIO
E2
BAT
E1
REGIN
D3
NC/GPIO
D2
CE
D1
VCC
C3
SE
C2
VSS
J8
D1
2
SCL
1
D2
0.1 µF
C7
C1
VSS
AZ23C5V6-7
VCC
C2
HDQ
2
.47 µf
PACK+/Load+
1
VSS
PACK–/Load–
TB2
J10
TP10
PACK–
R3
100
100
OFF
TP6
Low-pass filter for coulomb counter input should be placed
as close as possible to gas gauge IC. Connection to sense
resistor must be of Kelvin connection type.
R15
330
U2
MM3511
C13
0.1 µF
6
V–
DOUT
2
5
VDD COUT
1
4 VSS
DS
3
R17
1k
U2/Q1A/Q1B
TP5
R2
Q1:A
Q1:B
0.01
SI6926DQ
C14
0.1 µF
SI6926DQ
C15
0.1 µF
R7, R8, and R9 are optional pulldown resistors if pullup resistors are applied.
Figure 9. Reference Schematic
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Typical Application (continued)
9.2.1 Design Requirements
Several key parameters must be updated to align with a given application's battery characteristics. For highest
accuracy gauging, it is important to follow-up this initial configuration with a learning cycle to optimize resistance
and maximum chemical capacity (Qmax) values before sealing and shipping systems to the field. Successful and
accurate configuration of the fuel gauge for a target application can be used as the basis for creating a golden
file that can be written to all gauges, assuming identical pack design and Li-Ion cell origin (chemistry, lot, and so
on). Calibration data is included as part of this golden file to cut down on system production time. If using this
method, TI recommends averaging the voltage and current measurement calibration data from a large sample
size and use these in the golden file. Table 22 shows the items that should be configured to achieve reliable
protection and accurate gauging with minimal initial configuration.
Table 22. Key Data Flash Parameters for Configuration
NAME
DEFAULT
UNIT
Design Capacity
1000
mAh
Set based on the nominal pack capacity as interpreted from the cell
manufacturer's data sheet. If multiple parallel cells are used, should be set to
N × Cell Capacity.
Design Energy Scale
1
—
Set to 10 to convert all power values to cWh or to 1 for mWh. Design Energy
is divided by this value.
CC Threshold
900
mAh
Set to 90% of configured Design Capacity.
Should be configured using TI-supplied Battery Management Studio (bqStudio)
software. Default open-circuit voltage and resistance tables are also updated in
conjunction with this step.
Do not attempt to manually update reported Device Chemistry as this does not
change all chemistry information. Always update chemistry using the bqStudio
software tool.
Chem ID
0100
hex
RECOMMENDED SETTING
Load Mode
1
—
Set to applicable load model, 0 for constant current or 1 for constant power.
Load Select
1
—
Set to load profile which most closely matches typical system load.
Qmax Cell 0
1000
mAh
Set to initial configured value for Design Capacity. The gauge will update this
parameter automatically after the optimization cycle and for every regular
Qmax update thereafter.
Terminate Voltage
3200
mV
Set to empty point reference of battery based on system needs. Typical is from
3000 mV to 3200 mV.
Ra Max Delta
44
mΩ
Set to 15% of Cell0 R_a 4 resistance after an optimization cycle is completed.
Charging Voltage
4200
mV
Set based on nominal charge voltage for the battery in normal conditions
(25°C, and so on). Used as the reference point for offsetting by Taper Voltage
for full charge termination detection.
Taper Current
100
mA
Set to the nominal taper current of the charger + taper current tolerance to
ensure that the gauge will reliably detect charge termination.
Taper Voltage
100
mV
Sets the voltage window for qualifying full charge termination. Can be set
tighter to avoid or wider to ensure possibility of reporting 100% SOC in outer
JEITA temperature ranges that use derated charging voltage.
Dsg Current Threshold
60
mA
Sets threshold for gauge detecting battery discharge. Should be set lower than
minimal system load expected in the application and higher than Quit Current.
Chg Current Threshold
75
mA
Sets the threshold for detecting battery charge. Can be set higher or lower
depending on typical trickle charge current used. Also should be set higher
than Quit Current.
Quit Current
40
mA
Sets threshold for gauge detecting battery relaxation. Can be set higher or
lower depending on typical standby current and exhibited in the end system.
Avg I Last Run
–299
mA
Current profile used in capacity simulations at onset of discharge or at all times
if Load Select = 0. Should be set to nominal system load. Is automatically
updated by the gauge every cycle.
Avg P Last Run
–1131
mW
Power profile used in capacity simulations at onset of discharge or at all times
if Load Select = 0. Should be set to nominal system power. Is automatically
updated by the gauge every cycle.
Sleep Current
15
mA
Sets the threshold at which the fuel gauge enters SLEEP mode. Take care in
setting above typical standby currents else entry to SLEEP may be
unintentionally blocked.
42
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Typical Application (continued)
Table 22. Key Data Flash Parameters for Configuration (continued)
NAME
DEFAULT
UNIT
RECOMMENDED SETTING
CC Gain
10
mΩ
Calibrate this parameter using TI-supplied bqStudio software and calibration
procedure in the TRM. Determines conversion of coulomb counter measured
sense resistor voltage to current.
CC Delta
10
mΩ
Calibrate this parameter using TI-supplied bqStudio software and calibration
procedure in the TRM. Determines conversion of coulomb counter measured
sense resistor voltage to passed charge.
CC Offset
–1418
Counts
Calibrate this parameter using TI-supplied bqStudio software and calibration
procedure in the TRM. Determines native offset of coulomb counter hardware
that should be removed from conversions.
Board Offset
0
Counts
Calibrate this parameter using TI-supplied bqStudio software and calibration
procedure in the TRM. Determines native offset of the printed-circuit-board
parasitics that should be removed from conversions.
9.2.2 Detailed Design Procedure
9.2.2.1 BAT Voltage Sense Input
A ceramic capacitor at the input to the BAT pin is used to bypass AC voltage ripple to ground, greatly reducing
its influence on battery voltage measurements. It proves most effective in applications with load profiles that
exhibit high-frequency current pulses (that is, cell phones), but is recommended for use in all applications to
reduce noise on this sensitive high-impedance measurement node.
9.2.2.2 SRP and SRN Current Sense Inputs
The filter network at the input to the coulomb counter is intended to improve differential mode rejection of voltage
measured across the sense resistor. These components should be placed as close as possible to the coulomb
counter inputs and the routing of the differential traces length-matched to best minimize impedance mismatchinduced measurement errors.
9.2.2.3 Sense Resistor Selection
Any variation encountered in the resistance present between the SRP and SRN pins of the fuel gauge will affect
the resulting differential voltage and derived current it senses. As such, TI recommends selecting a sense
resistor with minimal tolerance and temperature coefficient of resistance (TCR) characteristics. The standard
recommendation based on best compromise between performance and price is a 1% tolerance, 100-ppm drift
sense resistor with a 1-W power rating.
9.2.2.4 TS Temperature Sense Input
Similar to the BAT pin, a ceramic decoupling capacitor for the TS pin is used to bypass AC voltage ripple away
from the high-impedance ADC input, minimizing measurement error. Another helpful advantage is that the
capacitor provides additional ESD protection because the TS input to system may be accessible in systems that
use removable battery packs. It should be placed as close as possible to the respective input pin for optimal
filtering performance.
9.2.2.5 Thermistor Selection
The fuel gauge temperature sensing circuitry is designed to work with a negative temperature coefficient-type
(NTC) thermistor with a characteristic 10-kΩ resistance at room temperature (25°C). The default curve-fitting
coefficients configured in the fuel gauge specifically assume a 103AT-2 type thermistor profile and so that is the
default recommendation for thermistor selection purposes. Moving to a separate thermistor resistance profile (for
example, JT-2 or others) requires an update to the default thermistor coefficients in data flash to ensure highest
accuracy temperature measurement performance.
9.2.2.6 REGIN Power Supply Input Filtering
A ceramic capacitor is placed at the input to the fuel gauge internal LDO to increase power supply rejection
(PSR) and improve effective line regulation. It ensures that voltage ripple is rejected to ground instead of
coupling into the internal supply rails of the fuel gauge.
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9.2.2.7 VCC LDO Output Filtering
A ceramic capacitor is also needed at the output of the internal LDO to provide a current reservoir for fuel gauge
load peaks during high peripheral utilization. It acts to stabilize the regulator output and reduce core voltage
ripple inside of the fuel gauge.
9.2.3 Application Curves
8.8
VREGIN = 2.7 V
2.60
VREGIN = 4.5 V
2.55
2.50
2.45
2.40
fOSC - High Frequency Oscillator (MHz)
VCC - Regulator Output Voltage (V)
2.65
2.35
±40
0
±20
20
40
60
80
Temperature (ƒC)
8.7
8.6
8.5
8.4
8.3
8.2
8.1
8
-40
100
5
33.5
4
Reported Temperature Error (qC)
fLOSC - Low Frequency Oscillator (kHz)
34
33
32.5
32
31.5
31
30.5
-20
0
20
40
Temperature (qC)
60
80
100
20
40
Temperature (qC)
60
80
100
D002
3
2
1
0
-1
-2
-3
-4
-5
-30
-20
D003
Figure 12. Low-Frequency Oscillator Frequency vs
Temperature
44
0
Figure 11. High-Frequency Oscillator Frequency vs
Temperature
Figure 10. Regulator Output Voltage vs
Temperature
30
-40
-20
C001
-10
0
10
20
30
Temperature (qC)
40
50
60
D004
Figure 13. Reported Internal Temperature Measurement vs
Temperature
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10 Power Supply Recommendations
10.1 Power Supply Decoupling
Both the REGIN input pin and the VCC output pin require low equivalent series resistance (ESR) ceramic
capacitors placed as close as possible to the respective pins to optimize ripple rejection and provide a stable and
dependable power rail that is resilient to line transients. A 0.1-µF capacitor at the REGIN and a 1-µF capacitor at
VCC will suffice for satisfactory device performance.
11 Layout
11.1 Layout Guidelines
11.1.1 Sense Resistor Connections
Kelvin connections at the sense resistor are as critical as those for the battery terminals. The differential traces
should be connected at the inside of the sense resistor pads and not along the high-current trace path to prevent
false increases to measured current that could result when measuring between the sum of the sense resistor and
trace resistance between the tap points. In addition, the routing of these leads from the sense resistor to the
input filter network and finally into the SRP and SRN pins must be as closely matched in length as possible or
else additional measurement offset could occur. It is further recommended to add copper trace or pour-based
"guard rings" around the perimeter of the filter network and coulomb counter inputs to shield these sensitive pins
from radiated EMI into the sense nodes. This prevents differential voltage shifts that could be interpreted as real
current change to the fuel gauge. All of the filter components must be placed as close as possible to the coulomb
counter input pins.
11.1.2 Thermistor Connections
The thermistor sense input should include a ceramic bypass capacitor placed as close to the TS input pin as
possible. The capacitor helps to filter measurements of any stray transients as the voltage bias circuit pulses
periodically during temperature sensing windows.
11.1.3 High-Current and Low-Current Path Separation
NOTE
For best possible noise performance, it is important to separate the low-current and highcurrent loops to different areas of the board layout.
The fuel gauge and all support components should be situated on one side of the boards and tap off of the highcurrent loop (for measurement purposes) at the sense resistor. Routing the low-current ground around instead of
under high-current traces will further help to improve noise rejection.
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11.2 Layout Example
PACK+
SCL
Use copper
pours for battery
power path to
minimize IR
losses
R10
R7
SDA
R8
R4
SE
C1
R THERM
Kelvin connect the
BAT sense line
right at positive
battery terminal
REGIN
BAT
C2
NC
VSS
VSS
SDA
TS
SRN
SCL
SRP
Vcc
SE
HDQ
CE
C3
NC
HDQ
R6
R9
PACK –
10 mΩ 1%
Via connects to Power Ground
Kelvin connect SRP
and SRN
connections right at
Rsense terminals
Star ground right at PACK –
for ESD return path
Figure 14. Layout Example
46
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation see the following:
• bq27545EVM Single-Cell Impedance Track™ Technology Evaluation Module (SLUU984)
• Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm (SLUA450)
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
Impedance Track, Nano-Free, E2E are trademarks of Texas Instruments.
I2C is a trademark of NXP Semiconductors, N.V.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
BQ27545YZFR-G1
ACTIVE
DSBGA
YZF
15
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
BQ27545
BQ27545YZFT-G1
ACTIVE
DSBGA
YZF
15
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
BQ27545
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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