BQ7718
SLUSAX1L – DECEMBER 2012 – REVISED JUNE 2021
BQ7718 Overvoltage Protection for 2-Series to 5-Series Cell Li-Ion Batteries
with Internal Delay Timer
1 Features
3 Description
•
•
•
•
The BQ7718xy family of products provides an
overvoltage monitor and protector for Li-Ion battery
pack systems. Each cell is monitored independently
for an overvoltage condition. For quicker productionline testing, the BQ7718xy device provides a
Customer Test Mode (CTM) with greatly reduced
delay time.
•
•
•
•
2-, 3-, 4-, and 5-series cell overvoltage protection
Internal delay timer
Fixed OVP threshold
High-accuracy overvoltage protection:
± 10 mV
Low power consumption ICC ≈ 1 µA
(VCELL(ALL) < VPROTECT)
Low leakage current per cell input < 100 nA
Functional Safety-Capable
– Documentation available to aid functional safety
system design
Package footprint options:
– Small 8-pin QFN (3.00 mm × 4.00 mm)
– Leaded 8-pin MSOP (3.00 mm × 5.00 mm,
including leads)
In the BQ7718xy device, an internal delay timer is
initiated upon detection of an overvoltage condition
on any cell. Upon expiration of the delay timer, the
output is triggered into its active state (either high or
low depending on the configuration).
Device Information Table
PART NUMBER
2 Applications
Protection for li-ion battery packs used in:
– Handheld garden tools
– Handheld power tools
– Cordless vacuum cleaners
– UPS battery backup
– Light electric vehicles (eBike, eScooter, pedal
assist bicycles)
BODY SIZE (NOM)
DPJ (8)
3.00 mm × 4.00 mm
BQ771800(2)
DGK (8)
3.00 mm x 3.00 mm (3.00
mm x 5.00 mm, including
leads)
(1)
(2)
For available catalog packages, see the orderable addendum
at the end of the data sheet and Section 5.
Contact TI for more information.
PACK+
RVD
C VD
VDD
RIN
V5
CIN
RIN
V4
CIN
RIN
V3
CIN
RIN
V2
Sensing Circuit
•
PACKAGE
BQ771800(1)
REG
INT_EN
VOV
Delay
Timer
OUT
CIN
RIN
V1
OSC
CIN
VSS
PACK–
Copyright © 2016, Texas Instruments Incorporated
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
BQ7718
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SLUSAX1L – DECEMBER 2012 – REVISED JUNE 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................4
7 Specifications.................................................................. 5
7.1 Absolute Maximum Ratings........................................ 5
7.2 ESD Ratings............................................................... 5
7.3 Recommended Operating Conditions.........................5
7.4 Thermal Information....................................................5
7.5 DC Characteristics...................................................... 6
7.6 Timing Requirements.................................................. 7
7.7 Typical Characteristics................................................ 8
8 Detailed Description........................................................9
8.1 Overview..................................................................... 9
8.2 Functional Block Diagram........................................... 9
8.3 Feature Description.....................................................9
8.4 Device Functional Modes..........................................10
9 Application and Implementation.................................. 12
9.1 Application Information............................................. 12
9.2 Systems Examples................................................... 15
10 Power Supply Recommendations..............................15
11 Layout........................................................................... 16
11.1 Layout Guidelines................................................... 16
11.2 Layout Example...................................................... 16
12 Device and Documentation Support..........................17
12.1 Documentation Support.......................................... 17
12.2 Third-Party Products Disclaimer............................. 17
12.3 Receiving Notification of Documentation Updates..17
12.4 Support Resources................................................. 17
12.5 Trademarks............................................................. 17
12.6 Electrostatic Discharge Caution..............................17
12.7 Glossary..................................................................17
13 Mechanical, Packaging, and Orderable
Information.................................................................... 17
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision K (April 2021) to Revision L (June 2021)
Page
• Changed the BQ771825 device to Production Data...........................................................................................3
Changes from Revision J (September 2020) to Revision K (June 2021)
Page
• Added the BQ771825 device to the Device Comparison Table .........................................................................3
Changes from Revision I (July 2020) to Revision J (September 2020)
Page
• Added the BQ771824 device to the Device Comparison Table .........................................................................3
• Added BQ771824 to the DC Characteristics ..................................................................................................... 6
• Added BQ771824 delay settings........................................................................................................................ 7
Changes from Revision H (February 2020) to Revision I (July 2020)
Page
• Added the Functional Safety-Capable feature....................................................................................................1
• Added the BQ771823 device to the Device Comparison Table .........................................................................3
• Added BQ771823 to the DC Characteristics ..................................................................................................... 6
• Added BQ771823 delay settings to Section 7.6 ................................................................................................ 7
2
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5 Device Comparison Table
TA
Part Number
Package
Package
Designator
BQ771800
Output Delay
Output Drive
Tape and Reel
(Large)
Tape and Reel
(Small)
4.300
0.300
4s
CMOS Active High
BQ771800DPJR
BQ771800DPJT
BQ771801DPJR
BQ771801DPJT
BQ771802DPJR
BQ771802DPJT
BQ771801
4.275
0.050
3s
BQ771802
4.225
0.300
1s
NCH Active Low,
Open Drain
BQ771803DPJR
BQ771803DPJT
BQ771803
4.275
0.050
1s
NCH Active Low,
Open Drain
BQ771803DGKR(2)
BQ771803DGKT(2)
BQ771806
4.350
0.300
3s
CMOS Active High
BQ771806DPJR
BQ771806DPJT
BQ771807
4.450
0.300
3s
CMOS Active High
BQ771807DPJR
BQ771807DPJT
BQ771808DPJR
BQ771808DPJT
BQ771809
(1)
(2)
OV Hysteresis
(V)
NCH Active Low,
Open Drain
BQ771808
–40°C to
110°C
OVP (V)
BQ771811
8-Pin QFN or
8-Pin MSOP
DPJ/DGK
4.200
0.050
1s
NCH Active Low,
Open Drain
4.200
0.050
1s
CMOS Active High
BQ771809DPJR
BQ771809DPJT
4.225
0.050
1s
CMOS Active High
BQ771811DPJR
BQ771811DPJT
BQ771815DPJR
BQ771815DPJT
BQ771817DPJR
BQ771817DPJT
BQ771815
4.225
0.050
1s
NCH Active Low,
Open Drain
BQ771817
4.275
0.050
1s
CMOS Active High
BQ771818DPJR
BQ771818DPJT
BQ771818DGKR
BQ771818DGKT
—
BQ771818
4.300
0.300
1s
CMOS Active High
BQ771823
4.275
0.300
3s
NCH Active Low,
Open Drain
BQ771823DPJR
BQ771824
3.850
0.300
4s
CMOS Active High
BQ771824DPJR
—
NCH Active Low,
Open Drain
BQ771825DPJR
BQ771825DPJT
BQ771825DGKR(2)
BQ771825DGKT(2)
BQ7718xyDPJR
BQ7718xyDPJT
BQ771825
3.950
0.050
3s
BQ7718xy(1)
3.850 – 4.650
Latch, 0.05, 0.25,
0.3
1, 4, 3,
5.5 s
NCH, Active Low,
Open Drain,
CMOS Active High
Future option. Contact TI for more information.
Contact TI for more information.
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SLUSAX1L – DECEMBER 2012 – REVISED JUNE 2021
6 Pin Configuration and Functions
VDD
1
8
OUT
V5
2
7
VSS
V4
3
6
V1
V3
4
5
V2
Figure 6-1. DPJ Package 8-Pin (WSON) Top View
VDD
1
8
OUT
V5
2
7
VSS
V4
3
6
V1
V3
4
5
V2
Not to scale
Figure 6-2. DGK Package 8-Pin (PDSO) Top View
Table 6-1. Pin Functions
NO.
NAME
TYPE I/O
DESCRIPTION
1
VDD
P
Power supply
2
V5
I
Sense input for positive voltage of the fifth cell from the bottom of the stack
3
V4
I
Sense input for positive voltage of the fourth cell from the bottom of the stack
4
V3
I
Sense input for positive voltage of the third cell from the bottom of the stack
5
V2
I
Sense input for positive voltage of the second cell from the bottom of the stack
6
V1
I
Sense input for positive voltage of the lowest cell in the stack
7
VSS
P
Electrically connected to IC ground and negative terminal of the lowest cell in the stack
8
OUT
O
Output drive for overvoltage fault signal
O = Output, I = Input, P = Power connection
4
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7 Specifications
7.1 Absolute Maximum Ratings
Over-operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
Supply voltage range
VDD – VSS
–0.3
30
V
Input voltage range
V5 – VSS or V4 – VSS or
V3 – VSS or V2 – VSS or V1 – VSS
–0.3
30
V
Output voltage range
OUT – VSS
–0.3
30
V
Continuous total power dissipation,
PTOT
See Section 7.4.
Functional temperature
–40
110
°C
Storage temperature range, TSTG
–65
150
°C
(1)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum–rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
V(ESD) Rating
(1)
(2)
Electrostatic discharge
Human body model (HBM) ESD stress voltage(1)
±2000
Charged device model (CDM) ESD stress voltage(2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
Over-operating free-air temperature range (unless otherwise noted)
MIN
Supply voltage, VDD
(1)
Input voltage range
V5–V4 or V4–V3 or
V3–V2 or V2–V1 or V1–VSS
Operating ambient temperature range, TA
(1)
MAX
UNIT
3
25
V
0
5
V
–40
110
°C
See Section 9.2.
7.4 Thermal Information
BQ7718xy
THERMAL
METRIC(1)
DPJ (WSON)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
56.6
°C/W
RθJCtop
Junction-to-case(top) thermal resistance
56.4
°C/W
RθJB
Junction-to-board thermal resistance
30.6
°C/W
ψJT
Junction-to-top characterization parameter
1.0
°C/W
ψJB
Junction-to-board characterization parameter
37.8
°C/W
RθJCbot
Junction-to-case(bottom) thermal resistance
11.3
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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7.5 DC Characteristics
Typical values stated where TA = 25°C and VDD = 18 V, MIN/MAX values stated where TA = –40°C to 110°C and VDD = 3 V to
25 V (unless otherwise noted).
SYMBOL
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
Voltage Protection Threshold VCx
V(PROTECT) Overvoltage
Detection
VOV
VHYS
OV Detection Hysteresis
VOA
OV Detection Accuracy
VOADRIFT
OV Detection Accuracy Across
Temperature
BQ771800
4.300
V
BQ771801
4.275
V
BQ771803
4.275
V
BQ771802
4.225
V
BQ771806
4.350
V
BQ771807
4.450
V
BQ771808
4.200
V
BQ771809
4.200
V
BQ771811
4.225
V
BQ771815
4.225
V
BQ771817
4.275
V
BQ771818
4.300
V
BQ771823
4.275
V
BQ771824
3.850
V
BQ771800
250
300
400
mV
BQ771801
0
50
100
mV
BQ771802
250
300
400
mV
BQ771803
0
50
100
mV
BQ771806
250
300
400
mV
BQ771807
250
300
400
mV
BQ771808
0
50
100
mV
BQ771809
0
50
100
mV
BQ771811
0
50
100
mV
BQ771815
0
50
100
mV
BQ771817
0
50
100
mV
BQ771818
250
300
400
mV
BQ771823
250
300
400
mV
BQ771824
250
300
400
mV
TA = 25°C
–10
10
mV
TA = –40°C
–40
44
mV
TA = 0°C
–20
20
mV
TA = 60°C
–24
24
mV
TA = 110°C
–54
54
mV
2
µA
0.1
µA
Supply and Leakage Current
6
ICC
Supply Current
(V5–V4) = (V4–V3) = (V3–V2) = (V2–V1) =
(V1–VSS) = 4 V (See Figure 8-2.)
IIN
Input Current at Vx Pins
(V5–V4) = (V4–V3) = (V3–V2) = (V2–V1) =
(V1–VSS) = 4 V (See Figure 8-2.)
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Typical values stated where TA = 25°C and VDD = 18 V, MIN/MAX values stated where TA = –40°C to 110°C and VDD = 3 V to
25 V (unless otherwise noted).
SYMBOL
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
Output Drive OUT, CMOS Active HIGH Versions Only
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V, IOH = 100
µA
VOUT1
Output Drive Voltage, Active
High
6
V
If three of four cells are short circuited and
only one cell remains powered and > VOV,
VDD = Vx (cell voltage), IOH = 100 µA
VDD – 0.3
(V5–V4), (V4–V3), (V3–V2), (V2–V1), and
(V1–VSS) < VOV, VDD = 18 V, IOL = 100 µA
measured into pin
250
IOUTH1
OUT Source Current (during
OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V. OUT = 0 V.
Measured out of OUT pin
IOUTL1
OUT Sink Current (no OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), and
(V1–VSS) < VOV, VDD = 18 V, OUT = VDD.
Measured into OUT pin
0.5
V
400
mV
4.5
mA
14
mA
400
mV
14
mA
100
nA
Output Drive OUT, NCH Open Drain Active LOW Versions Only
VOUT2
Output Drive Voltage, Active
Low
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V, IOL = 100 µA
measured into OUT pin
IOUTH2
OUT Sink Current (during OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V. OUT = VDD.
Measured into OUT pin
IOUTL2
OUT Source Current (no OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), and
(V1–VSS) < VOV, VDD = 18 V. OUT = VDD.
Measured out of OUT pin
250
0.5
7.6 Timing Requirements
MIN
NOM
MAX
UNIT
BQ771800, BQ771824
3.2
4
4.8
s
BQ771801, BQ771807, BQ771823
2.4
3
3.6
s
BQ771802, BQ771803, BQ771811,
BQ771815, BQ771818
0.8
1
1.2
s
Preview option only. Contact TI.
4.4
5.5
6.6
s
Delay Timer
tDELAY
XCTMDELAY
OV Delay Time
Fault Detection Delay Time during
Customer Test Mode
See Section 8.4.3.
15
ms
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7.7 Typical Characteristics
4.40
4.39
4.38
0.316
Mean
Min
Max
0.315
4.36
VHYS (V)
VOUT (V)
4.37
4.35
4.34
4.33
0.314
0.313
4.32
4.31
4.30
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.312
−50
−25
0
G001
Figure 7-1. Overvoltage Threshold (OVT) vs.
Temperature
25
50
Temperature (°C)
75
100
125
G002
Figure 7-2. Hysteresis VHYS vs. Temperature
1.8
1.6
1.5
1.6
1.4
1.4
1.2
ICELL (µA)
IDD (µA)
1.3
1.1
1.0
1.2
1.0
0.9
0.8
0.8
0.7
0.6
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.6
−50
Figure 7-3. IDD Current Consumption vs.
Temperature at VDD = 16 V
8
−3.70
7
−3.72
−3.76
VOUT (V)
IOUT (mA)
25
50
Temperature (°C)
75
100
125
G004
6
−3.74
−3.78
−3.80
−3.82
5
4
3
2
−3.84
1
−3.86
−25
0
25
50
Temperature (°C)
75
100
125
0
0
G005
Figure 7-5. Output Current IOUT vs.
Temperature
8
0
Figure 7-4. ICELL vs. Temperature
at VCELL= 9.2 V
−3.68
−3.88
−50
−25
G003
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10
15
VDD (V)
20
25
30
G006
Figure 7-6. VOUT vs. VDD
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8 Detailed Description
8.1 Overview
In the BQ7718xy family of devices, each cell is monitored independently and an external delay timer is initiated if
an overvoltage condition is detected on any cell.
For quicker production-line testing, the device provides a Customer Test Mode with greatly reduced delay time.
8.2 Functional Block Diagram
PACK+
RVD
C VD
VDD
RIN
V5
CIN
RIN
CIN
RIN
V3
CIN
RIN
V2
Sensing Circuit
V4
REG
INT_EN
VOV
Delay
Timer
OUT
CIN
RIN
V1
OSC
CIN
VSS
PACK–
Copyright © 2016, Texas Instruments Incorporated
8.3 Feature Description
In the BQ7718xy device, each cell is monitored independently. Overvoltage is detected by comparing the actual
cell voltage to a protection voltage reference, VOV. If any cell voltage exceeds the programmed OV value, a timer
circuit is activated. When the timer expires, the OUT pin goes from inactive to active state.
For NCH Open Drain Active Low configurations, the OUT pin pulls down to VSS when active (OV present) and is
high impedance when inactive (no OV).
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Cell Voltage (V)
(V5–V4, V4–V3, V 3–V2, V2–V1, V1–VSS)
SLUSAX1L – DECEMBER 2012 – REVISED JUNE 2021
VOV
VOV –VHYS
tDELAY
OUT (V)
Figure 8-1. Timing for Overvoltage Sensing
8.3.1 Sense Positive Input for Vx
This is an input to sense each single battery cell voltage. A series resistor and a capacitor across the cell for
each input is required for noise filtering and stable voltage monitoring.
8.3.2 Output Drive, OUT
This pin serves as the fault signal output, and may be ordered in either active HIGH or LOW options.
8.3.3 Supply Input, VDD
This pin is the unregulated input power source for the IC. A series resistor is connected to limit the current, and a
capacitor is connected to ground for noise filtering.
8.4 Device Functional Modes
8.4.1 NORMAL Mode
When all of the cell voltages are below the overvoltage threshold, VOV, the device operates in NORMAL mode.
The device monitors the differential cell voltages connected across (V1 – VSS), (V2 – V1), (V3 – V2), (V4 – V3),
and (VC4 – VC5). The OUT pin is inactive and if configured:
The OUT pin is inactive and if configured:
• Active high is low.
• Active low is being externally pulled up and is an open drain.
8.4.2 OVERVOLTAGE Mode
OVERVOLTAGE mode is detected if any of the cell voltages exceeds the overvoltage threshold, VOV for
configured OV delay time. The OUT pin is activated after a delay time set by the capacitance in the CD pin. The
OUT pin will either pull high internally, if configured as active high, or will be pulled low internally, if configured as
active low. When all of the cell voltages fall below the (VOV – VHYS), the device returns to NORMAL mode.
8.4.3 Customer Test Mode
Customer Test Mode (CTM) helps to reduce test time for checking the overvoltage delay timer parameter once
the circuit is implemented in the battery pack. To enter CTM, VDD should be set to at least 10 V higher than V5
(see Figure 8-2). The delay timer is greater than 10 ms, but considerably shorter than the timer delay in normal
operation. To exit Customer Test Mode, remove the VDD to a V5 voltage differential of 10 V so that the decrease
in this value automatically causes an exit.
10
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CAUTION
Avoid exceeding any Absolute Maximum Voltages on any pins when placing the part into Customer
Test Mode. Also avoid exceeding Absolute Maximum Voltages for the individual cell voltages (V5–
V4), (V4–V3), (V4–V3), (V3–V2), (V2–V1), and (V1–VSS). Stressing the pins beyond the rated limits
may cause permanent damage to the device.
Figure 8-2 shows the timing for the Customer Test Mode.
Cell Voltage (V)
(V5–V4, V4–V3, V3–V2, V2–V1, V1–VSS)
10 V
VOV
VOV – VHYS
> 10 ms
OUT (V)
Figure 8-2. Timing for Customer Test Mode
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and
TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
9.1 Application Information
In the case of an Open Drain Active Low configuration, an external pull-up resistor is required on the OUT pin.
Changes to the ranges stated in Table 9-1 will impact the accuracy of the cell measurements.
C VD
VDD
OUT
V5
VSS
V4
V1
V3
V2
RVD
Cell5
R IN
Cell4
R IN
Cell3
R IN
CIN
CIN
CIN
Cell2
R IN
CIN
Cell1
R IN
CIN
Copyright © 2016, Texas Instruments Incorporated
Figure 9-1. Application Configuration
9.1.1 Design Requirements
Changes to the ranges stated in Table 9-1 will impact the accuracy of the cell measurements. Figure 9-1 shows
each external component.
Table 9-1. Parameters
PARAMETER
EXTERNAL COMPONENT
MIN
NOM
MAX
UNIT
RIN
900
1000
1100
Ω
Voltage monitor filter capacitance
CIN
0.01
0.1
µF
Supply voltage filter resistance
RVD
100
1K
Ω
Supply voltage filter capacitance
CVD
Voltage monitor filter resistance
0.1
CD external delay capacitance
0.1
OUT Open drain version pull-up resistance to
PACK+
100
12
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µF
1
µF
kΩ
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: BQ7718
BQ7718
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SLUSAX1L – DECEMBER 2012 – REVISED JUNE 2021
Note
The device is calibrated using an RIN value = 1 kΩ. Using a value other than this recommended value
changes the accuracy of the cell voltage measurements and VOV trigger level.
9.1.2 Detailed Design Procedure
Figure 9-2 shows the measurement for current consumption for the product for both VDD and Vx.
VDD
OUT
V5
VSS
I IN
V4
V1
I IN
V3
V2
ICC
I IN
Cell5
Cell 4
Cell 3
I IN
Cell 2
IIN
Cell 1
Copyright © 2016, Texas Instruments Incorporated
Figure 9-2. Configuration for IC Current Consumption Test
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SLUSAX1L – DECEMBER 2012 – REVISED JUNE 2021
9.1.2.1 Application Curves
4.40
4.39
4.38
0.316
Mean
Min
Max
0.315
4.36
VHYS (V)
VOUT (V)
4.37
4.35
4.34
4.33
0.314
0.313
4.32
4.31
4.30
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.312
−50
−25
0
G001
Figure 9-3. Overvoltage Threshold (OVT) vs.
Temperature
25
50
Temperature (°C)
75
100
125
G002
Figure 9-4. Hysteresis VHYS vs. Temperature
1.6
1.8
1.5
1.6
1.4
1.4
1.2
ICELL (µA)
IDD (µA)
1.3
1.1
1.0
1.2
1.0
0.9
0.8
0.8
0.7
0.6
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.6
−50
Figure 9-5. IDD Current Consumption vs.
Temperature at VDD = 16 V
8
−3.70
7
−3.72
−3.76
VOUT (V)
IOUT (mA)
25
50
Temperature (°C)
75
100
125
G004
6
−3.74
−3.78
−3.80
−3.82
5
4
3
2
−3.84
1
−3.86
−25
0
25
50
Temperature (°C)
75
100
125
0
0
G005
Figure 9-7. Output Current IOUT vs.
Temperature
14
0
Figure 9-6. ICELL vs. Temperature
at VCELL= 9.2 V
−3.68
−3.88
−50
−25
G003
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5
10
15
VDD (V)
20
25
30
G006
Figure 9-8. VOUT vs. VDD
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Product Folder Links: BQ7718
BQ7718
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SLUSAX1L – DECEMBER 2012 – REVISED JUNE 2021
9.2 Systems Examples
In these application examples, an external pull-up resistor is required on the OUT pin to configure for an Open
Drain Active Low operation.
C VD
R VD
Cell 4
Cell 3
Cell 2
Cell 1
RIN
RIN
C VD
VDD
OUT
VSS
V5
VSS
V4
V1
V4
V1
V3
V2
V3
V2
VDD
OUT
V5
RVD
CIN
RIN
CIN
Cell3
RIN
CIN
Cell2
RIN
CIN
Cell1
CIN
RIN
RIN
CIN
CIN
Copyright © 2016, Texas Instruments Incorporated
Copyright © 2016, Texas Instruments Incorporated
Figure 9-10. 3-Series Cell Configuration with Fixed
Delay
Figure 9-9. 4-Series Cell Configuration
C VD
RVD
Cell2
Cell1
RIN
CIN
RIN
CIN
VDD
OUT
V5
VSS
V4
V1
V5
V2
Copyright © 2016, Texas Instruments Incorporated
Figure 9-11. 2-Series Cell Configuration with Internal Fixed Delay
10 Power Supply Recommendations
The maximum power of this device is 25 V on VDD.
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11 Layout
11.1 Layout Guidelines
•
•
Ensure the RC filters for the V1 and VDD pins are placed as close as possible to the target terminal.
The VSS pin should be routed to the CELL– terminal.
11.2 Layout Example
Place the RC filters close to the
device terminals
Power Trace Line
Pack +
VDD
OUT
VC5
VSS
VCELL5
OUT
Pack VC4
VC1
PWPD
VCELL4
VC3
VC2
VCELL3
VCELL2
VCELL1
Figure 11-1. Example Layout
16
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SLUSAX1L – DECEMBER 2012 – REVISED JUNE 2021
12 Device and Documentation Support
12.1 Documentation Support
For additional information, see the BQ7718 technical documentation, including the documentation available to
aid functional safety system design.
12.2 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.7 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2023
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
BQ771800DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771800
Samples
BQ771800DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771800
Samples
BQ771801DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771801
Samples
BQ771801DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771801
Samples
BQ771802DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771802
Samples
BQ771802DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771802
Samples
BQ771803DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771803
Samples
BQ771803DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771803
Samples
BQ771806DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771806
Samples
BQ771806DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771806
Samples
BQ771807DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771807
Samples
BQ771807DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771807
Samples
BQ771808DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771808
Samples
BQ771808DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771808
Samples
BQ771809DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771809
Samples
BQ771809DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771809
Samples
BQ771811DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771811
Samples
BQ771811DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771811
Samples
BQ771815DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771815
Samples
BQ771815DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771815
Samples
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
18-Jul-2023
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
BQ771817DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771817
Samples
BQ771817DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771817
Samples
BQ771818DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771818
Samples
BQ771818DPJT
ACTIVE
WSON
DPJ
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771818
Samples
BQ771823DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 110
771823
Samples
BQ771824DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 110
771824
Samples
BQ771825DPJR
ACTIVE
WSON
DPJ
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
771825
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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