BQ77216
SLUSE36J – JULY 2021 – REVISED NOVEMBER 2023
BQ77216 Voltage and Temperature Protection for 3-Series to 16-Series Cell Li-Ion
Batteries with Internal Delay Timer
1 Features
3 Description
•
•
The BQ77216 family of products provides a range
of voltage and temperature monitoring, including
overvoltage (OVP), undervoltage (UVP), open wire
(OW), and overtemperature (OT) protection for Liion battery pack systems. Each cell is monitored
independently for overvoltage, undervoltage, and
open-wire conditions. With the addition of an
external NTC thermistor, the device can detect
overtemperature conditions.
•
•
•
•
•
•
•
•
•
•
•
•
In the BQ77216 device, an internal delay timer
is initiated upon detection of an overvoltage,
undervoltage,
open-wire,
or
overtemperature
condition. Upon expiration of the delay timer, the
respective output is triggered into its active state
(either high or low, depending on the configuration).
Device Information Table
PART NUMBER
PACKAGE
BQ7721600(1)
(1)
BODY SIZE (NOM)
4.40 mm × 7.80 mm
(6.40 mm × 7.80 mm,
including leads)
TSSOP (24)
For available catalog packages, see the orderable addendum
at the end of the data sheet and the Device Comparison
Table.
Fuse or
Back-to-Back FETs
2 Applications
•
PACK+
RVD
3-series cell to 16-series cell protection
High-accuracy overvoltage protection
– ± 10 mV at 25°C
– ± 20 mV from 0°C to 60°C
Overvoltage protection options from 3.55 V to
5.1 V
Undervoltage protection with options from 1.0 V to
3.5 V
Open-wire connection detection
Overtemperature protection
Random cell connection
Functional safety-capable
Fixed internal delay timers
Fixed detections thresholds
Fixed output drive type for each of COUT and
DOUT
– Active high or active low
– Active high drive to 6 V
– Open drain with the ability to be pulled up
externally to VDD
Low power consumption ICC ≈ 1 µA
(VCELL(ALL) < VOV)
Low leakage current per cell input < 100 nA with
open wire detection disabled
Package footprint options:
– Leaded 24-pin TSSOP with 0.65-mm lead pitch
CVD
Protection for Li-ion battery packs used in:
– Handheld garden tools
– Handheld power tools
– Cordless vacuum cleaners
– UPS battery backup
– Light electric vehicles (eBike, eScooter, pedalassist bicycles)
VDD
RIN
V16
CIN
DOUT
RIN
V3
RDOUT
CIN
RIN
V2
GND
CIN
RIN
COUT
V1
CIN
VSS
RCOUT
RNTC
TS
PACK±
GND
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
BQ77216
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SLUSE36J – JULY 2021 – REVISED NOVEMBER 2023
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Description (continued).................................................. 3
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................4
7 Specifications.................................................................. 5
7.1 Absolute Maximum Ratings ....................................... 5
7.2 ESD Ratings .............................................................. 5
7.3 Recommended Operating Conditions ........................5
7.4 Thermal Information ...................................................5
7.5 DC Characteristics ..................................................... 6
7.6 Timing Requirements ................................................. 8
8 Detailed Description........................................................9
8.1 Overview..................................................................... 9
8.2 Functional Block Diagram........................................... 9
8.3 Feature Description.....................................................9
8.4 Device Functional Modes..........................................11
2
9 Application and Implementation.................................. 13
9.1 Application Information............................................. 13
9.2 Systems Example..................................................... 15
10 Power Supply Recommendations..............................16
11 Layout........................................................................... 17
11.1 Layout Guidelines................................................... 17
11.2 Layout Example...................................................... 17
12 Device and Documentation Support..........................18
12.1 Third-Party Products Disclaimer............................. 18
12.2 Receiving Notification of Documentation Updates..18
12.3 Support Resources................................................. 18
12.4 Trademarks............................................................. 18
12.5 Electrostatic Discharge Caution..............................18
12.6 Glossary..................................................................18
13 Revision History.......................................................... 18
14 Mechanical, Packaging, and Orderable
Information.................................................................... 18
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4 Description (continued)
Overvoltage triggers the COUT pin if a fault is detected, and undervoltage triggers the DOUT pin if a fault is
detected. If an overtemperature or open-wire fault is detected, then the DOUT and COUT are triggered. For
quicker production-line testing, the BQ77216 device provides a Customer Test Mode (CTM) with greatly reduced
delay time.
5 Device Comparison Table
Table 5-1. BQ77216 Device Comparison
PART NUMBER
TA
PACKAGE
PACKAGE
DESIGNATOR
OVP (V)
OV HYSTERESIS (V)
OVP DELAY
UVP (V)
UVP DELAY
BQ7721600
–40°C to 110°C
24-Pin TSSOP
PW
4.325
0.100
1s
2.25
1s
BQ7721602
–40°C to 110°C
24-Pin TSSOP
PW
4.325
0.100
1s
2.25
1s
BQ7721603
–40°C to 110°C
24-Pin TSSOP
PW
4.3
0.100
2s
2
2s
BQ7721605
–40°C to 110°C
24-Pin TSSOP
PW
4.225
0.100
1s
2.6
1s
BQ7721606
–40°C to 110°C
24-Pin TSSOP
PW
4.275
0.100
1s
2.5
1s
BQ7721607
–40°C to 110°C
24-Pin TSSOP
PW
4.25
0.100
4s
2.5
BQ7721609
–40°C to 110°C
24-Pin TSSOP
PW
4.35
0.200
4s
BQ7721610
–40°C to 110°C
24-Pin TSSOP
PW
4.25
0.100
4s
2.5
2s
BQ7721611
–40°C to 110°C
24-Pin TSSOP
PW
3.8
0.200
4s
1.5
1s
BQ7721612
–40°C to 110°C
24-Pin TSSOP
PW
3.6
0.200
2s
2.0
2s
BQ7721613
–40°C to 110°C
24-Pin TSSOP
PW
4.25
0.100
4s
2.0
2s
BQ7721614
–40°C to 110°C
24-Pin TSSOP
PW
3.9
0.100
4s
1.85
2s
BQ7721615
–40°C to 110°C
24-Pin TSSOP
PW
4.23
0.100
4s
2.0
2s
BQ7721616
–40°C to 110°C
24-Pin TSSOP
PW
4.18
0.100
4s
2.0
2s
2s
Disabled
Table 5-2. BQ77216 Device Comparison (continued)
PART NUMBER
UV HYSTERESIS (V)
OTC (°C)
UTC (°C)
OW
LATCH
OUTPUT DRIVE
TAPE AND REEL
BQ7721600
0.100
70
NA
Enabled
Disabled
Active Low
BQ7721600PWR
BQ7721602PWR
BQ7721602
0.100
70
NA
Enabled
Disabled
Active High, 6-V
Drive
BQ7721603
0.100
75
NA
Enabled
Disabled
Active High, 6-V
Drive
BQ7721603PWR
BQ7721605
0.200
75
NA
Disabled
Disabled
Active High, 6-V
Drive
BQ7721605PWR
BQ7721606PWR
BQ7721606
0.200
75
NA
Disabled
Disabled
Active High, 6-V
Drive
BQ7721607
0.100
83
–30
Enabled
Disabled
Active High, 6-V
Drive
BQ7721607PWR
BQ7721609
Disabled
83
NA
Enabled
Disabled
Active High, 6-V
Drive
BQ7721609PWR
BQ7721610PWR
BQ7721610
0.100
83
NA
Enabled
Disabled
Active High, 6V Drive (COUT)
Active Low
(DOUT)
BQ7721611
0.200
70
NA
Disabled
Disabled
Active High, 6-V
Drive
BQ7721611PWR
BQ7721612
0.200
75
NA
Disabled
Disabled
Active Low
BQ7721612PWR
BQ7721613
0.200
83
–30
Enabled
Disabled
Active High, 6-V
Drive
BQ7721613PWR
BQ7721614
0.100
75
NA
Enabled
Disabled
Active High, 6-V
Drive
BQ7721614PWR
BQ7721615
0.200
83
-20
Disabled
Disabled
Active High, 6-V
Drive
BQ7721615PWR
Disabled
Active High, 6-V
Drive
BQ7721616PWR
BQ7721616
0.200
80
-20
Disabled
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6 Pin Configuration and Functions
NC
1
24
TS
VDD
2
23
DOUT
V16
3
22
COUT
V15
4
21
VSS
V14
5
20
V1
V13
6
19
V2
V12
7
18
V3
V11
8
17
V4
V10
9
16
NC
V9
10
15
NC
V8
11
14
V5
V7
12
13
V6
Not to scale
Table 6-1. 24-Lead Pin Functions
NO. NAME
TYPE
DESCRIPTION
1
NC
—
Not electrically connected and can be left floating
2
VDD
P
Power supply
3
V16
I
Sense input for positive voltage of the sixteenth cell from the bottom of the stack
4
V15
I
Sense input for positive voltage of the fifteenth cell from the bottom of the stack
5
V14
I
Sense input for positive voltage of the fourteenth cell from the bottom of the stack
6
V13
I
Sense input for positive voltage of the thirteenth cell from the bottom of the stack
7
V12
I
Sense input for positive voltage of the twelfth cell from the bottom of the stack
8
V11
I
Sense input for positive voltage of the eleventh cell from the bottom of the stack
9
V10
I
Sense input for positive voltage of the tenth cell from the bottom of the stack
10
V9
I
Sense input for positive voltage of the ninth cell from the bottom of the stack
11
V8
I
Sense input for positive voltage of the eighth cell from the bottom of the stack
12
V7
I
Sense input for positive voltage of the seventh cell from the bottom of the stack
13
V6
I
Sense input for positive voltage of the sixth cell from the bottom of the stack
Sense input for positive voltage of the fifth cell from the bottom of the stack
14
V5
I
15
NC
—
Not electrically connected and can be left floating
16
NC
—
Not electrically connected and can be left floating
17
V4
I
Sense input for positive voltage of the fourth cell from the bottom of the stack
18
V3
I
Sense input for positive voltage of the third cell from the bottom of the stack
19
V2
I
Sense input for positive voltage of the second cell from the bottom of the stack
20
V1
I
Sense input for positive voltage of the lowest cell in the stack
21
VSS
P
Electrically connected to IC ground and negative terminal of the lowest cell in the stack
22
COUT
O
Output drive for overvoltage, open wire, undertemperature, and overtemperature. It can be left floating if not
used.
23
DOUT
O
Output drive for undervoltage, open wire, undertemperature, and overtemperature. It can be left floating if not
used.
24
TS
I
Temperature sensor input. If not used, connect it with a 10-kΩ resistor to VSS.
I = Input, O = Output, P = Power Connection
4
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
VDD – VSS
–0.3
85
V
Vn – VSS where n = 1 to 16
–0.3
85
V
TS
–0.3
1.5
V
COUT – VSS, DOUT – VSS
–0.3
85
V
Functional temperature,
TFUNC
–40
110
°C
Storage temperature, TSTG
–65
150
°C
Supply voltage range
Input voltage range
Output voltage range
(1)
UNIT
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and
this may affect device reliability, functionality, performance, and shorten the device lifetime.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/
JEDEC JS-001, all pins(1)
±2000
Charged device model (CDM), per ANSI/ESDA/
JEDEC JS-002, all pins
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VDD
Supply voltage
(1)
Input voltage range of Vn - Vn-1 where n = 2 to 16 and V1 - VSS
VIN
TS
NOM
MAX
UNIT
5
75
V
0
5
V
0
1.5
V
12
13
V
VCTM
Customer Test Mode Entry VDD > V16 + VCTM
CTS
Total capacitance on the TS Pin
200
pF
TA
Ambient temperature
–40
85
°C
TJ
Junction temperature
–65
150
°C
(1)
VDD is equal to top of stack voltage
7.4 Thermal Information
DEVICE
THERMAL
METRIC(1)
PW (TSSOP)
UNIT
24 PINS
RθJA
Junction-to-ambient thermal resistance
97.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
40.5
°C/W
RθJB
Junction-to-board thermal resistance
53.1
°C/W
ΨJT
Junction-to-top characterization parameter
4.3
°C/W
ΨJB
Junction-to-board characterization parameter
52.7
°C/W
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7.4 Thermal Information (continued)
DEVICE
THERMAL
METRIC(1)
UNIT
PW (TSSOP)
24 PINS
RθJC(bot)
(1)
Junction-to-case (bottom) thermal resistance
NA
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 DC Characteristics
Typical values stated where TA = 25°C and VDD = 58 V, MIN/MAX values stated where TA = –40°C to 85°C and VDD = 5 V
to 75 V (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OVER VOLTAGE PROTECTION (OV)
VOV
OV Detection Range
3.55
VOV_STEP OV Detection Steps
VOV_HYS
VOV_ACC
OV Detection Hysteresis
5.1
V
25
mV
Selected OV Hysteresis depends on the
part number. See the device selection
table for details.
VOV –
100
mV
Selected OV Hysteresis depends on the
part number. See the device selection
table for details.
VOV –
200
mV
OV Detection Accuracy
TA = 25℃
–10
10
mV
OV Detection Accuracy
0℃ ≤ TA ≤ 60℃
–20
20
mV
OV Detection Accuracy
–40℃ ≤ TA ≤ 110℃
–50
50
mV
UNDER VOLTAGE PROTECTION (UV)
VUV
UV Detection Range
1.0
VUV_STEP UV Detection Steps
VUV_HYS
VUV_ACC
VUV_MIN
UV Detection Hysteresis
3.5
V
50
mV
Selected OV Hysteresis depends on the
part number. See the device selection
table for details.
VUV +
100
mV
Selected OV Hysteresis depends on the
part number. See the device selection
table for details.
VUV +
200
mV
UV Detection Accuracy
TA = 25℃
–30
30
mV
UV Detection Accuracy
–40 ≤ TA ≤ 110℃
–50
50
mV
UV Detection Disabled Threshold
Vn – Vn-1 where n = 2 to 16 and V1 –
VSS
450
550
mV
Available options: 62°C, 65°C, 70°C,
75°C, 80°C, 83°C
62.0
83.0
°C
500
OVER TEMPERATURE PROTECTION (OT)
TOT
OT Detection Range
ROT_EXT
TOT_ACC
(1)
6
OT Detection External Resistance
62°C
2850
65°C
2570
70°C
2195
75°C
1915
80°C
1651
83°C
1525
OT Detection Accuracy
–5
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Ω
5
°C
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7.5 DC Characteristics (continued)
Typical values stated where TA = 25°C and VDD = 58 V, MIN/MAX values stated where TA = –40°C to 85°C and VDD = 5 V
to 75 V (unless otherwise noted).
PARAMETER
TOT_HYS
(2)
RNTC
TEST CONDITIONS
MIN
OT Detection Hysteresis
Internal Pullup Resistor
After TI Factory Trim
19.5
TYP
MAX
UNIT
–10
°C
4186
Ω
3530
Ω
20
20.6
kΩ
OPEN WIRE PROTECTION (OW)
VOW
OW Detection Threshold
Vn < Vn-1 where n = 2 to 16
V1 – VSS
VOW_HYS OW Detection Hysteresis
Vn < Vn-1 where n = 1 to 16
VOW_ACC OW Detection Accuracy
–40 ℃ ≤ TA ≤ 110℃
–200
mV
500
mV
VOW
+100
mV
–25
25
mV
3.5
µA
SUPPLY AND LEAKAGE CURRENT
ICC
IIN
Supply Current
(2)
Input Current at Vx Pins
No fault detected
2
Vn – Vn-1 and V1 – VSS = 4 V, where n =
2 to 16, Open Wire Enabled
–0.3
0.3
µA
Vn – Vn-1 and V1 – VSS = 4 V, where n =
2 to 16, Open Wire Disabled
–0.1
0.1
µA
OUTPUT DRIVE, COUT and DOUT, CMOS ACTIVE HIGH VERSIONS ONLY
Output Drive Voltage for COUT and
DOUT, Active High 6V
Vn – Vn-1 or V1 – VSS > VOV, where n
= 2 to 16, VDD = 58 V, IOH = 100 µA
measured out of COUT, DOUT pin
6
Output Drive Voltage for COUT and
DOUT, Active High VDD
VDD – VCOUT or VDOUT, Vn – Vn-1 or V1
– VSS > VOV, where n = 2 to 16, IOH = 10
µA measured out of COUT, DOUT pin
0
1
1.5
V
Output Drive Voltage for COUT and
DOUT, Active High 6V
VDD – VCOUT or VDOUT, if 15 of 16
cells are short-circuited and only one cell
remains powered and > VOV, VDD = Vx
(cell voltage), IOH = 100 µA,
0
1
1.5
V
Output Drive Voltage for COUT and
DOUT, Active High 6V and VDD
Vn – Vn-1 and V1 – VSS < VOV, where
n = 2 to 16, VDD = 58 V, IOH = 100 µA
measured into pin
250
400
mV
100
120
kΩ
4.5
mA
3
mA
400
mV
3
mA
100
nA
VOUT_AH
ROUT_AH
IOUT_AH_
H
Internal Pullup Resistor
OUT Source Current (during OV)
IOUT_AH_L OUT Sink Current (no OV)
80
V
Vn – Vn-1 or V1 – VSS > VOV, where
n = 2 to 16, VDD = 58 V, OUT = 0 V.
Measured out of COUT, DOUT pin
Vn – Vn-1 and V1 – VSS < VOV, where
n = 2 to 16, VDD = 58 V, OUT = VDD.
Measured into COUT, DOUT pin
0.3
OUTPUT DRIVE, COUT and DOUT, NCH OPEN DRAIN ACTIVE LOW VERSIONS ONLY
VOUT_AL
Output Drive Voltage for COUT and
DOUT, Active Low
Vn – Vn-1 or V1 – VSS > VOV, where n
= 2 to 16, VDD = 58 V, IOH = 100 µA
measured into COUT, DOUT pin
IOUT_AL_L OUT Source Current (during OV)
Vn – Vn-1 or V1 – VSS > VOV, where
n = 2 to 16, VDD = 58 V, OUT = VDD.
Measured into COUT, DOUT pin
IOUT_AL_H OUT Sink Current (no OV)
Vn – Vn-1 and V1 – VSS < VOV, where
n = 2 to 16, VDD = 58 V, OUT = VDD.
Measured out of COUT, DOUT pin
(1)
(2)
250
0.3
Assured by Design. This accuracy assumes the external resistance is within ±2% of the R_OT_EXT values for the corresponding
temperature threshold.
Assured by Design
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7.6 Timing Requirements
Typical values stated where TA = 25°C and VDD = 58 V, MIN/MAX values stated where TA = –40°C to 85°C and VDD = 5 V
to 85 V (unless otherwise noted).
PARAMETER
tOV_DELAY
8
TEST CONDITIONS
MIN
OV Delay Time
TYP
MAX
UNIT
0.25
s
0.5
s
1
s
2
s
4
s
0.25
s
0.5
s
1
s
2
s
4
s
tUV_DELAY
UV Delay Time
tOT_DELAY
OT Delay Time
tOW_DELAY
OW Delay Time
tDELAY_ACC
Delay Time Accuracy
For 0.25-s, 0.5-s delays
–128
128
ms
tDELAY_ACC
Delay Time Accuracy
For 1-s delays
–150
150
ms
tDELAY_DR
For all delays other than 0.25-s, 0.5-s,
Delay time drift across operating temp
1-s delays
–10%
10%
tCTM_DELAY
Fault Detection Delay Time during
Customer Test Mode
4
See Customer Test Mode.
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50
s
ms
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8 Detailed Description
8.1 Overview
The BQ77216 family of devices provides a range of voltage and temperature monitoring including overvoltage
(OVP), undervoltage (UVP), open wire (OW), and overtemperature (OT) protection for Li-ion battery pack
systems. Each cell is monitored independently for overvoltage, undervoltage, and open-wire conditions. With
the addition of an external NTC thermistor, the device can detect overtemperature conditions. An internal delay
timer is initiated upon detection of an overvoltage, undervoltage, open-wire, or overtemperature condition. Upon
expiration of the delay timer, the respective output is triggered into its active state (either high or low, depending
on the configuration). The overvoltage triggers the COUT pin if a fault is detected, and undervoltage triggers the
DOUT pin if a fault is detected. If an undertemperature, overtemperature, or open-wire fault is detected, then
both the DOUT and COUT are triggered.
For quicker production-line testing, the BQ77216 device provides a Customer Test Mode (CTM) with greatly
reduced delay time.
8.2 Functional Block Diagram
VDD
V16
RTCPU
Internal
Regulator
VSS
DOUT
V3
V2
Sensing Circuit
Oscillator
V1
Delay
Timer
Osc.
Monitor
VUV
VSS
+
±
VSS
VOV
COUT
VOT
Delay
Timer
VSS
VSS
TS
8.3 Feature Description
8.3.1 Voltage Fault Detection
In the BQ77216 device, each cell is monitored independently. Overvoltage is detected by comparing the actual
cell voltage to a protection voltage reference, VOV. If any cell voltage exceeds the programmed OV value, a timer
circuit is activated. When the timer expires, the COUT pin goes from inactive to active state. The timer is reset
if the cell voltage falls below the recovery threshold (VOV – VOV_HYS). Undervoltage is detected by comparing
the actual cell voltage to a protection voltage reference, VUV. If any cell voltage falls below the programmed UV
value, a timer circuit is activated. When the timer expires, the DOUT pin goes from inactive to active state. The
timer is reset if the cell voltage rises below the recovery threshold (VUV + VUV_HYS).
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COUT State
Cell Voltage (V)
(Vn ± Vn-1, V1 ± VSS)
SLUSE36J – JULY 2021 – REVISED NOVEMBER 2023
VOV
VOV ± VOV_HYS
Active
tOV_DELAY
Inactive
Cell Voltage (V)
(Vn ± Vn-1, V1 ± VSS)
Figure 8-1. Timing for Overvoltage Sensing
VuV + VuV_HYS
VUV
DOUT State
Active
tUV_DELAY
Inactive
Figure 8-2. Timing for Undervoltage Sensing
8.3.2 Open-Wire Fault Detection
In the BQ77216 device, each cell input is monitored independently to determine if the input is connected to a cell
or not by applying a 50-μA pull down current to ground that is activated for 128 μs every 128 ms. If the device
detects that Vn < Vn–1 – VOW V, then a timer is activated. When the timer expires, the COUT and DOUT pins
go from an inactive to active state. The timer is reset if the cell input rises above or below the recovery threshold
(VOW + VOW_HYS).
8.3.3 Temperature Fault Detection
In the BQ77216 device, the TS pin is ratiometrically monitored with an internal pullup resistance RNTC.
Overtemperature is detected by evaluating the TS input voltage to determine the external resistance falls below
a protection resistance, ROT_EXT. If the resistance falls below the programmed OT value, a timer circuit is
activated. When the timer expires, the COUT and DOUT pins go from inactive to active state. The timer is
reset if the resistance rises above the recovery threshold (ROT + ROT_HYS). Under temperature is detected by
evaluating the TS input voltage to determine the external resistance falls below a protection resistance, RUT_EXT.
If the resistance rises above the programmed UT value, a timer circuit is activated. When the timer expires, the
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COUT and DOUT pins go from inactive to active state. The timer is reset if the resistance falls below above the
recovery threshold (ROT– R OT_HYS) If external capacitance is added to the TS pin, it needs to be within the spec
limit shown in recommended operating conditions.
Note
Texas Instruments does not recommend adding an external capacitor to the TS pin. The capacitance
on this pin will affect the TS measurement accuracy if greater than CTS.
8.3.4 Oscillator Health Check
The device can detect if the internal oscillator slows down below the fOSC_FAULT threshold. When this occurs then
the COUT and DOUT go from inactive to active state. If the oscillator returns to normal then the fault recovers.
8.3.5 Sense Positive Input for Vx
This is an input to sense each single battery cell voltage. A series resistor and a capacitor across the cell for
each input are required for noise filtering and stable voltage monitoring.
8.3.6 Output Drive, COUT and DOUT
These pins serve as the fault signal outputs and may be ordered in either active HIGH with drive to 6 V or active
LOW options configured through internal OTP.
The COUT and DOUT respond per the following table when a fault is detected if the specific fault is enabled.
Table 8-1. Fault Detection vs COUT and DOUT Action
FAULT Detected
COUT
DOUT
Overvoltage
Active
Inactive
Undervoltage
Inactive
Active
Open Wire
Active
Active
Overtemperature
Active
Active
Oscillator Health
Active
Active
8.3.7 The LATCH Function
The device can be enabled to latch the fault signal, which effectively disables the recovery functions of all fault
detections. The only way to recover from a fault state when the latch is enabled is a POR of the device.
8.3.8 Supply Input, VDD
This pin is the unregulated input power source for the IC. A series resistor is connected to limit the current, and a
capacitor is connected to ground for noise filtering.
8.4 Device Functional Modes
8.4.1 NORMAL Mode
When COUT and DOUT are inactive (no fault detected), the device operates in NORMAL mode and monitors for
voltage, open-wire, and temperature faults.
The COUT and DOUT pins are inactive and if configured:
• Active high is low.
• Active low is being externally pulled up and is an open drain.
8.4.2 FAULT Mode
FAULT mode is entered if the COUT or DOUT pins are activated. The OUT pin is either pulled high internally
if configured as active high or is pulled low internally if configured as active low. When COUT and DOUT are
deactivated, the device returns to NORMAL mode.
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8.4.3 Customer Test Mode
Customer Test Mode (CTM) helps to reduce test time for checking the delay timer parameter once the circuit is
implemented in the battery pack. To enter CTM, VDD should be set to at least VCTM higher than V16 (see Figure
8-3). The delay timer is greater than 10 ms, but considerably shorter than the timer delay in normal operation. To
exit Customer Test Mode, remove the VDD to a V16 voltage differential of 10 V so that the decrease in this value
automatically causes an exit.
CAUTION
Avoid exceeding any Absolute Maximum Voltages on any pins when placing the part into Customer
Test Mode. Also avoid exceeding Absolute Maximum Voltages for the individual cell voltages (VCn–
VCn-1) and (V1–VSS). Stressing the pins beyond the rated limits may cause permanent damage to
the device.
COUT State
Cell Voltage (V)
(Vn ± Vn-1, V1 ± VSS)
VDD (V)
Figure 8-3 shows the timing for the Customer Test Mode.
VCTM
VOV
VOV ± VOV_HYS
Active
tCTM_DELAY
Inactive
Figure 8-3. Timing for Customer Test Mode
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
Changes to the ranges stated in Table 9-1 will impact the accuracy of the cell measurements.
QDSG
QCHG
PACK+
ROFF
ROFF
RVD
CVD
VDD
RIN
V16
CIN
DOUT
RIN
V3
RDOUT
CIN
RIN
GND
V2
CIN
RIN
V1
CIN
COUT
VSS
TS
RCOUT
RNTC
PACK-
GND
Figure 9-1. Application Configuration
9.1.1 Design Requirements
Changes to the ranges stated in Table 9-1 will impact the accuracy of the cell measurements. Figure 9-1 shows
each external component.
Table 9-1. Parameters
PARAMETER
Voltage monitor filter resistance
EXTERNAL COMPONENT
RIN
MIN
NOM
MAX
UNIT
900
1000
1100
Ω
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Table 9-1. Parameters (continued)
PARAMETER
EXTERNAL COMPONENT
MIN
NOM
0.01
MAX
UNIT
0.1
µF
Voltage monitor filter capacitance
CIN
Supply voltage filter resistance
RVD
100
300
1K
Ω
Supply voltage filter capacitance
CVD
0.05
0.1
1
µF
Note
The device is calibrated using an RIN value = 1 kΩ. Using a value other than this recommended value
changes the accuracy of the cell voltage measurements and VOV trigger level.
9.1.2 Detailed Design Procedure
Figure 9-2 shows the measurement for current consumption for the product for both VDD and Vx.
PACK+
ICC
VDD
IIN
V16
CELL16
DOUT
IIN
V3
IIN
V2
IIN
V1
CELL3
CELL2
COUT
CELL1
VSS
TS
RNTC
PACK-
GND
Figure 9-2. Configuration for IC Current Consumption Test
9.1.2.1 Cell Connection Sequence
The BQ77216 device can be connected to the array of cells in any order without damaging the device.
During cell attachment, the device could detect a fault if the cells are not connected within a fault detection delay
period. If this occurs, then COUT and/or DOUT could transition from inactive to active. Both COUT and DOUT
can be tied to VSS or VDD to prevent any change in output state during cell attach.
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9.2 Systems Example
In this application example, the choice of a FUSE or FETs is required on the COUT and DOUT pins—configured
as an active-high drive to 6-V outputs.
RVD
Fuse or
Back-to-Back FETs
PACK+
CVD
VDD
V16
V15
RIN
V14
CIN
RIN
V13
CIN
DOUT
RIN
V3
RDOUT
CIN
RIN
GND
V2
CIN
RIN
V1
CIN
COUT
VSS
TS
RCOUT
RNTC
PACK-
GND
Figure 9-3. 14-Series Cell Configuration with Active High 6-V Option
When pairing with the BQ769x2 or BQ76940 devices, the top cell must be used. For the BQ77216 device to
drive the CHG and DSG FETs, the active high 6-V option is preferred. Its COUT and DOUT are controlling two
N-CH FETs to jointly control the CHG and DSG FETs with the monitoring device. For such joint architecture,
the open-wire feature of the BQ77216 device may be affected if the primary protector or monitor device is
actively measuring the cells. Care is needed to ensure the VOW spec of the BQ77216 device is met or to
choose a version of the BQ77216 device with open wire disabled. When working with a BQ769x2 device, set the
LOOP_SLOW to 0x11 to ensure the BQ77216 VOW spec is met.
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FUSE
PCHG
PDSG
PACK+
COUT
PDSG
FUSE
BREG
FUSE
PDSG
LD
PCHG
PACK
NC
DSG
CP1
CHG
BAT
VC16
+
V15
+
VC15
REGIN
V14
+
VC14
REG1
V13
V12
V11
V10
V9
V8
V7
+
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
CAN
TRANSCEIVER
REG2
VC12
RST_SHUT
VC11
DDSG
DSG Logic Out
DCHG
CHG Logic Out DOUT
VDD
GPIO
MCU
VC10
VC9
DFETOFF
VC8
CFETOFF
VC7
HDQ
GPIO
GPIO
COUT
TS3
VC3
V2
REG18
ALERT
TS2
VC4
INT
+
V3
TS1
V4
SRN
SCL
NC
SCL
VSS
SDA
VC5
SRP
SDA
+
VC0
VC6
V5
V6
COMM TO
SYSTEM
COMM
3.3V
VC13
VC1
COUT
5V
V16
VC2
DOUT
VDD
PCHG
DOUT
GND
V1
TS
VSS
TS1
+
TS1
TS2
+
TS3
+
PACK-
Figure 9-4. BQ77216 with BQ76952
10 Power Supply Recommendations
The maximum power supply of this device is 85 V on VDD.
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11 Layout
11.1 Layout Guidelines
•
•
Ensure the RC filters for the Vn and VDD pins are placed as close as possible to the target terminal.
The VSS pin should be routed to the CELL– terminal.
11.2 Layout Example
Place the RC filters close to the device
terminals
Power Trace
VDD
Pack +
V16
VCELL16
COUT
COUT
VSS
Pack -
V4
V1
V3
V2
VCELL4
VCELL3
VCELL2
VCELL1
Figure 11-1. Example Layout
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12 Device and Documentation Support
12.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Notifications to register and receive a weekly digest of any product information that has changed. For change
details, review the revision history included in any revised document.
12.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (July 2023) to Revision J (November 2023)
Page
• Updated the Device Comparison Table .............................................................................................................3
• Updated the TS pin description.......................................................................................................................... 4
• Added the undertemperature protection description........................................................................................ 10
Changes from Revision H (March 2023) to Revision I (July 2023)
Page
• Updated the Device Comparison Table .............................................................................................................3
Changes from Revision G (July 2022) to Revision H (March 2023)
Page
• Updated the Device Comparison Table .............................................................................................................3
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
15-Dec-2023
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
BQ7721600PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BQ7721600
Samples
BQ7721602PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BQ7721602
Samples
BQ7721603PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BQ7721603
Samples
BQ7721605PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 110
BQ7721605
Samples
BQ7721606PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 110
BQ7721606
Samples
BQ7721607PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 110
BQ7721607
Samples
BQ7721609PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 110
BQ7721609
Samples
BQ7721610PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 110
BQ7721610
Samples
BQ7721611PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 110
BQ7721611
Samples
BQ7721612PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 110
BQ7721612
Samples
BQ7721613PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 110
BQ7721613
Samples
BQ7721614PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 110
BQ7721614
Samples
BQ7721615PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 110
BQ7721615
Samples
BQ7721616PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 110
BQ7721616
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
15-Dec-2023
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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