bq78PL116
SLUSAB8B – OCTOBER 2010 – REVISED FEBRUARY 2011
www.ti.com
PowerLAN™ Master Gateway Battery Management Controller
With PowerPump™ Cell Balancing Technology
Check for Samples: bq78PL116
FEATURES
1
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bq78PL116 Designed for Managing 3- to
16-Series-Cell Battery Systems
– Support for LCD and Electronic Paper
Displays or EPDs
– Configurable for 11-A, 26-A, or 110-A
Operating Currents
Systems With More Than Four Series Cells
Require External bq76PL102 Dual-Cell
Monitors
SmartSafety Features:
– Prevention: Optimal Cell Management
– Diagnosis: Improved Sensing of Cell
Problems
– Fail Safe: Detection of Event Precursors
Rate-of-Change Detection of All Important Cell
Characteristics:
– Impedance
– Cell Temperature
PowerPump Technology Transfers Charge
Efficiently From Cell to Cell During All
Operating Conditions, Resulting in Longer
Run Time and Cell Life
– Includes User-Configurable PowerPump
Cell-Balancing Modes
High-Resolution 18-Bit Integrating Delta-Sigma
Coulomb Counter for Precise Charge-Flow
Measurements and Gas Gauging
Multiple Independent Δ-Σ ADCs: One-per-Cell
Voltage, Plus Separate Temperature, Current,
and Safety
Simultaneous, Synchronous Measurement of
Pack Current and Individual Cell Voltages
Very Low Power Consumption
– < 400 μA Active, < 185 μA Standby, < 85 μA
Ship, and < 1 μA Undervoltage Shutdown
Accurate, Advanced Temperature Monitoring
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of Cells and MOSFETs With up to 4 Sensors
Fail-Safe Operation of Pack Protection
Circuits: Up to Three Power MOSFETs and
One Secondary Safety Output (Fuse)
Fully Programmable Voltage, Current, Balance,
and Temperature-Protection Features
External Inputs for Auxiliary MOSFET Control
Smart Battery System 1.1 Compliant via
SMBus
APPLICATIONS
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Portable Medical Instruments and Test
Equipment
Mobility Devices (E-Bike)
Uninterruptible Power Supplies and Hand-Held
Tools
DESCRIPTION
The bq78PL116 master gateway battery controller is
part of a complete Li-Ion control, monitoring, and
safety solution designed for large series cell strings.
The bq78PL116 along with bq76PL102 PowerLAN™
dual-cell monitors provide complete battery-system
control, communications, and safety functions for a
structure of three up to 16 series cells. This
PowerLAN
system
provides
simultaneous,
synchronized voltage and current measurements
using one A/D per-cell technology. This eliminates
system-induced noise from measurements and allows
the precise, continuous, real-time calculation of cell
impedance under all operating conditions, even
during widely fluctuating load conditions.
PowerPump technology transfers charge between
cells to balance their voltage and capacity. Balancing
is possible during all battery modes: charge,
discharge, and rest. Highly efficient charge-transfer
circuitry nearly eliminates energy loss while providing
true real-time balance between cells, resulting in
longer run-time and improved cycle life.
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerLAN, PowerPump, bqWizard are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
© 2010–2011, Texas Instruments Incorporated
bq78PL116
SLUSAB8B – OCTOBER 2010 – REVISED FEBRUARY 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
Temperature is sensed by up to 4 external sensors and one on-chip sensor. This permits accurate temperature
monitoring of each cell individually. Firmware is then able to compensate for the temperature-induced effects on
capacity, impedance, and OCV on a cell-by-cell basis, resulting in superior charge/ discharge and balancing
control.
External MOSFET control inputs provide user- definable direct hardware control over MOSFET states. Smart
control prevents excessive current through MOSFET body diodes. Auxiliary inputs can be used for enhanced
safety and control in large multicell arrays.
The bq78PL116 is completely user-configurable, with parametric tables in flash memory to suit a variety of cell
chemistries, operating conditions, safety controls, and data reporting needs. It is easily configured using the
supplied bqWizard™ graphical user interface (GUI). The device is fully programmed and requires no algorithm or
firmware development.
The bq78PL116 pin functions of LED1/SEG1–LED5/SEG5, PSH/BP/TP, and FIELD support LED, LCD, and
electronic paper displays (EPDs). The user can configure the bq78PL116 for the desired display type.
P-LAN
V1
P1N
P1S
XT1
FLASH
CELL 4
DSG
EFCID
Balance
Temp
CELL 3
EFCIC
Voltage
SPROT
RISC
CPU
Voltage
Balance
Temp
Second-Level
Safety
CSBAT
Coulomb Counter
CCBAT
CSPACK
Current A/D
Voltage
Balance
Temp
PowerLAN
Communication
Link
Reset
Logic
RSTN
VLDO1
CHG
First-Level Safety
and
FET Control
SRAM
V2
P2N
P2S
XT2
Balance
Temp
PRE
CELL 2
V3
P3N
P3S
XT3
Voltage
CELL 1
V4
P4N
P4S
XT4
Watchdog
2.5 V LDO
Core / CPU
Measure
7
GPIO
Internal
Oscillator
CCPACK
SMBus
LED1–5/SEG1–5,
PSH/BP/TP,
FIELD
SMBCLK
SMBDAT
Internal
Temperature
I/O
Safety
B0320-03
Figure 1. BQ78PL116 Internal Block Diagram
2
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© 2010–2011, Texas Instruments Incorporated
Product Folder Link(s): bq78PL116
bq78PL116
SLUSAB8B – OCTOBER 2010 – REVISED FEBRUARY 2011
B0332-03
Pack
Positive
www.ti.com
Pack
Negative
V2 T2
V1 T1
V2 T2
V1 T1
9
V2 T2
8
V1 T1
7
V2 T2
6
V1 T1
5
V4 XT4
10
4
V3 XT3
11
3
V2 XT2
12
2
V1 XT1
SMBus
PowerLAN
Master Gateway Battery Controller
bq78PL116
PowerLAN
Communication
Link
bq76PL102
Dual-Cell Monitor
Bq76PL102
Dual-Cell Monitor
Example 12-cell configuration shown
bq76PL102
Dual-Cell Monitor
Bq76PL102
Dual-Cell Monitor
Pack Protection
Circuits and Fuse
1
RSENSE
Figure 2. Example bq78PL116 System Implementation (12 Cells)
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© 2010–2011, Texas Instruments Incorporated
Product Folder Link(s): bq78PL116
3
bq78PL116
SLUSAB8B – OCTOBER 2010 – REVISED FEBRUARY 2011
www.ti.com
Table 1. ORDERING INFORMATION
Product
bq78PL116
(1)
Cell
Configuration (1)
Package
Package
Designator
3 to 16 series cells
QFN-48, 7-mm ×
7-mm
Temperature
Range
–40°C to 85°C
RGZ
Ordering
Number
Quantity, Transport
Media
bq78PL116RGZ
T
250, tape and reel
bq78PL116RGZ
R
2500, tape and reel
For configurations consisting of more than four series cells, additional bq76PL102 parts must be used.
AVAILABLE OPTIONS
V1
XT1
XT2
V2
VLDO2
V3
XT3
XT4
V4
SMBDAT
SMBCLK
46
45
44
43
42
41
40
39
38
37
DSG
47
1
VSS
CHG
48
bq78PL116
RGZ Package
(Top View)
36
LED5/SEG5
2
35
LED4/SEG4
PRE
3
34
LED3/SEG3
EFCIC
4
33
LED2/SEG2
EFCID
5
32
LED1/SEG1
CCBAT
6
31
PSH/BP/TP
Thermal Pad
24
RSTN
P-LAN
25
23
12
P4N
OSCO
22
NC
P4S
26
21
11
P3N
OSCI
20
NC
P3S
27
19
10
SDI3
CSPACK
18
NC
SDO2
28
17
9
P2N
CSBAT
16
FIELD
P2S
29
15
8
P1N
VLDO1
14
SPROT
SDI1
30
13
7
SDO0
CCPACK
P0023-25
Figure 3. bq78PL116 Pinout
bq78PL116 TERMINAL FUNCTIONS
NAME
NO.
TYPE
(1)
DESCRIPTION
CCBAT
6
IA
Coulomb counter input (sense resistor), connect to battery negative
CCPACK
7
IA
Coulomb counter input (sense resistor), connect to pack negative
CHG
1
O
Charge MOSFET control (active-high, low opens MOSFET)
CSBAT
9
IA
Current sense input (safety), connect to battery negative
CSPACK
10
IA
Current sense input (safety), connect to pack negative
DSG
2
O
Discharge MOSFET control (active-high, low opens MOSFET)
EFCIC
4
I
External charge MOSFET control input
EFCID
5
I
External discharge MOSFET control input
(1)
4
Types: I = Input, IA = Analog input, IO = Input/Output, O = Output, P = Power
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Product Folder Link(s): bq78PL116
bq78PL116
SLUSAB8B – OCTOBER 2010 – REVISED FEBRUARY 2011
www.ti.com
bq78PL116 TERMINAL FUNCTIONS (continued)
NAME
NO.
TYPE
(1)
DESCRIPTION
FIELD
29
O
EPD field segment
LED1/SEG1
32
O
LED1 – open-drain, active-low, LCD and EPD segment 1
LED2/SEG2
33
O
LED2 – open-drain, active-low, LCD and EPD segment 2
LED3/SEG3
34
O
LED3 – open-drain, active-low, LCD and EPD segment 3
LED4/SEG4
35
O
LED4 – open-drain, active-low, LCD and EPD segment 4
LED5/SEG5
36
O
LED5 – open-drain, active-low, LCD and EPD segment 5
N/C
26, 27
IO
Connect 1-MΩ resistor to VSS
N/C
28
O
No connect
OSCI
11
I
External oscillator input (no connect, internal oscillator used)
OSCO
12
O
External oscillator output (no connect, internal oscillator used)
P1N
15
O
Charge-balance gate drive, cell 1 north
P2N
17
O
Charge-balance gate drive, cell 2 north
P2S
16
O
Charge-balance gate drive, cell 2 south
P3N
21
O
Charge-balance gate drive, cell 3 north
P3S
20
O
Charge-balance gate drive, cell 3 south
P4N
23
O
Charge-balance gate drive, cell 4 north
P4S
22
O
Charge-balance gate drive, cell 4 south
P-LAN
24
IO
PowerLAN I/O to external bq76PL102 nodes
PRE
3
O
Precharge MOSFET control (active-high)
PSH/BP/TP
31
IO
Pushbutton detect for LED display, LCD backplane, EPD top plane and charge pump
RSTN
25
I
Device reset, active-low
SDI1
14
I
Connect to SDO0 via a capacitor
SDI3
19
I
Internal PowerLAN connection – connect to SDO2 through a 0.01-μF capacitor
SDO0
13
O
Requires 100-kΩ pullup resistor to VLDO1
SDO2
18
O
Internal PowerLAN connection – connect to SDI3 through a 0.01-μF capacitor
SMBCLK
37
IO
SMBus clock signal
SMBDAT
38
IO
SMBus data signal
SPROT
30
O
Secondary protection output, active-high (FUSE)
V1
47
IA
Cell-1 positive input
V2
44
IA
Cell-2 positive input
V3
42
IA
Cell-3 positive input
V4
39
IA
Cell-4 positive input
VLDO1
8
P
Internal LDO-1 output, bypass with 10-μF capacitor to VSS
VLDO2
43
P
Internal LDO-2 output, bypass with 10-μF capacitor to V2
VSS
48
IA
Cell-1 negative input
XT1
46
IA
External temperature-sensor-1 input
XT2
45
IA
External temperature-sensor-2 input
XT3
41
IA
External temperature-sensor-3 input
XT4
40
IA
External temperature-sensor-4 input
–
–
P
Thermal pad. Connect to VSS
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Product Folder Link(s): bq78PL116
5
bq78PL116
SLUSAB8B – OCTOBER 2010 – REVISED FEBRUARY 2011
www.ti.com
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
RANGE
UNITS
TA
Operating free-air temperature (ambient)
–40 to 85
°C
Tstg
Storage temperature
–65 to 150
°C
V4
Voltage range with respect to V3
–0.5 to 5.0
V
V3
Voltage range with respect to V2
–0.5 to 5.0
V
V2
Voltage range with respect to V1
–0.5 to 5.0
V
V1
Voltage range with respect to VSS
–0.5 to 5.0
V
EFCIC, EFCID
Voltage range with respect to VSS
–0.5 to 5.0
V
LED1/SEG1—LED5/SEG5
Voltage on I/O pin with respect to VSS
–0.5 to 5.0
V
SMBCLK, SMBDAT
Voltage range with respect to VSS
–0.5 to 6.0
V
VLDO1
Voltage with respect to VSS
3.0
V
VLDO2
Voltage range with respect to V2
3.0
V
RSTN
Voltage range with respect to VSS
–0.5 to VLDO1 + 0.5
V
FIELD, SPROT, PSH/BP/TP
Voltage range with respect to VSS
–0.5 to VLDO1 + 0.5
V
CCBAT, CCPACK, CSBAT, CSPACK
Voltage range with respect to VSS
–0.5 to VLDO1 + 0.5
V
CHG, DSG, PRE
Voltage range with respect to VSS
–0.5 to VLDO1 + 0.5
V
OSCI, OSCO
Voltage with respect to VSS
–0.5 to VLDO1 + 0.5
V
XT1, XT2
Voltage with respect to VSS
–0.5 to VLDO1 + 0.5
V
SDO0
Voltage range with respect to VSS
–0.5 to VLDO1 + 0.5
V
XT3, XT4
Voltage range with respect to V2
–0.5 to VLDO2 + 0.5
V
SDO2, SDI3, P-LAN
Voltage range with respect to V2
–0.5 to VLDO2 + 0.5
V
SDO0, SDI1
Voltage range with respect to VSS
–0.5 to V1 + 0.5
V
P1N, P2S, P2N
Voltage range with respect to VSS
–0.5 to V1 + 0.5
V
P3S, P3N, P4S, P4N
Voltage range with respect to V2
–0.5 to V3 + 0.5
V
PRE, CHG, DSG, SPROT, FIELD,
PSH/BP/TP
Current source/sink
20
mA
LED1/SEG1–LED5/SEG5
Current source/sink
20
mA
VLDO1, VLDO2
Current source/sink
20
mA
ESD tolerance
JEDEC, JESD22-A114 human-body model, R = 1500 Ω, C =
100 pF
2
kV
Lead temperature, sodlering
Total time < 3 seconds
300
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
VSUP
Supply voltage—V1, V2, V3, V4
MIN
NOM
All cell voltages equal,
four-cell operation
2.5
3.6
All cell voltages equal,
three-cell operation (V3 =
V4)
2.8
3.6
Minimum startup voltage—V1, V2, V3, V4 All cell voltages equal
VIN
Input cell voltage range—V(n+1) – V(n), n
= 1, 2, 3, 4
CVLDO1
VLDO 1 capacitor—VLDO1
2.2
CVLDO2
VLDO 2 capacitor—VLDO2
2.2
CVn
Cell-voltage capacitor—Vn
4.5
4.5
2.9
V
0
1
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UNIT
V
VStartup
6
MAX
4.5
V
10
47
μF
10
47
μF
μF
© 2010–2011, Texas Instruments Incorporated
Product Folder Link(s): bq78PL116
bq78PL116
SLUSAB8B – OCTOBER 2010 – REVISED FEBRUARY 2011
www.ti.com
ELECTRICAL CHARACTERISTICS
TA = –40°C to 85°C (unless otherwise noted)
DC Characteristics
PARAMETER
TEST CONDITIONS
IDD
Operating-mode current (at
V2)
ISTBY
Standby-mode current (at V2) SMBCLK = SMBDAT = VSS, IBAT = 0,
cells = 3.6 V
ISHIP
Ship-mode current (at V2)
SMBCLK = SMBDAT = VSS, IBAT = 0,
cells = 3.6 V
IECUV
Extreme cell undervoltage
shutdown current
All cells < 2.7 V and any cell < ECUV set
point
SPROT, LEDEN,
PSH/BP/TP(bq78PL116),
FIELD(bq78PL116)
IOL < 4 mA
SPROT, LEDEN,
PSH/BP/TP(bq78PL116),
FIELD(bq78PL116)
IOH < –4 mA
VOL
VOH
(1)
VIL
SPROT, LEDEN,
PSH/BP/TP(bq78PL116),
FIELD(bq78PL116)
VIH
SPROT, LEDEN,
PSH/BP/TP(bq78PL116),
FIELD(bq78PL116)
(1)
MIN
Acrtive mode, cells = 3.6 V
TYP
MAX
UNIT
400
μA
185
μA
85
μA
0
1
μA
0.5
V
VLDO1 – 0.1
V
0.25 VLDO1
V
0.75 VLDO1
V
Does not apply to SMBus pins.
Voltage-Measurement Characteristics
TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
Measurement range
2.75
MAX
UNIT
4.5
V