CC1310F128RHBR

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community Reference Design CC1310 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 CC1310 SimpleLink™ Ultra-Low-Power Sub-1 GHz Wireless MCU 1 Device Overview 1.1 Features 1 • Microcontroller – Powerful ARM® Cortex®-M3 Processor – EEMBC CoreMark® Score: 142 – EEMBC ULPBench™ Score: 158 – Clock Speed up to 48-MHz – 32KB, 64KB, and 128KB of In-System Programmable Flash – 8KB of SRAM for Cache (or as General-Purpose RAM) – 20KB of Ultra-Low-Leakage SRAM – 2-Pin cJTAG and JTAG Debugging – Supports Over-the-Air (OTA) Update • Ultra-Low-Power Sensor Controller – Can Run Autonomously From the Rest of the System – 16-Bit Architecture – 2KB of Ultra-Low-Leakage SRAM for Code and Data • Efficient Code-Size Architecture, Placing Parts of TI-RTOS, Drivers, and Bootloader in ROM • RoHS-Compliant Package – 7-mm × 7-mm RGZ VQFN48 (30 GPIOs) – 5-mm × 5-mm RHB VQFN32 (15 GPIOs) – 4-mm × 4-mm RSM VQFN32 (10 GPIOs) • Peripherals – All Digital Peripheral Pins Can Be Routed to Any GPIO – Four General-Purpose Timer Modules (Eight 16-Bit or Four 32-Bit Timers, PWM Each) – 12-Bit ADC, 200 ksamples/s, 8-Channel Analog MUX – Continuous Time Comparator – Ultra-Low-Power Clocked Comparator – Programmable Current Source – UART – 2× SSI (SPI, MICROWIRE, TI) – I2C, I2S – Real-Time Clock (RTC) – AES-128 Security Module – True Random Number Generator (TRNG) – Support for Eight Capacitive Sensing Buttons – Integrated Temperature Sensor SPACER SPACER SPACER • • • • SPACER External System – On-Chip Internal DC-DC Converter – Seamless Integration With the SimpleLink™ CC1190 Range Extenders Low Power – Wide Supply Voltage Range: 1.8 to 3.8 V – RX: 5.4 mA – TX at +10 dBm: 13.4 mA – Active-Mode MCU 48 MHz Running Coremark: 2.5 mA (51 µA/MHz) – Active-Mode MCU: 48.5 CoreMark/mA – Active-Mode Sensor Controller at 24 MHz: 0.4 mA + 8.2 µA/MHz – Sensor Controller, One Wakeup Every Second Performing One 12-Bit ADC Sampling: 0.95 µA – Standby: 0.7 µA (RTC Running and RAM and CPU Retention) – Shutdown: 185 nA (Wakeup on Extexternernal Events) RF Section – Excellent Receiver Sensitivity –124 dBm Using Long-Range Mode, –110 dBm at 50 kbps (Sub-1 GHz) – Excellent Selectivity (±100 kHz): 56 dB – Excellent Blocking Performance (±10 MHz): 90 dB – Programmable Output Power up to +15 dBm – Single-Ended or Differential RF Interface – Suitable for Systems Targeting Compliance With Worldwide Radio Frequency Regulations • ETSI EN 300 220, EN 303 204 (Europe) • FCC CFR47 Part 15 (US) • ARIB STD-T108 (Japan) – Wireless M-Bus and Selected IEEE® 802.15.4g PHY Tools and Development Environment – Full-Feature and Low-Cost Development Kits – Multiple Reference Designs for Different RF Configurations – Packet Sniffer PC Software – Sensor Controller Studio – SmartRF™ Studio – SmartRF Flash Programmer 2 – IAR Embedded Workbench® for ARM – Code Composer Studio™ 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CC1310 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 1.2 • • • • • • • Applications 315-, 433-, 470-, 500-, 779-, 868-, 915-, 920-MHz ISM and SRD Systems Low-Power Wireless Systems With 50-kHz to 5-MHz Channel Spacing Home and Building Automation Wireless Alarm and Security Systems Industrial Monitoring and Control Smart Grid and Automatic Meter Reading Wireless Healthcare Applications 1.3 www.ti.com • • • • • • • Wireless Sensor Networks Active RFID IEEE 802.15.4g, IP-Enabled Smart Objects (6LoWPAN), Wireless M-Bus, KNX Systems, Wi-SUN™, and Proprietary Systems Energy-Harvesting Applications Electronic Shelf Label (ESL) Long-Range Sensor Applications Heat-Cost Allocators Description The CC1310 is a member of the CC26xx and CC13xx family of cost-effective, ultra-low-power, 2.4-GHz and Sub-1 GHz RF devices. Very low active RF and microcontroller (MCU) current consumption, in addition to flexible low-power modes, provide excellent battery lifetime and allow long-range operation on small coin-cell batteries and in energy-harvesting applications. The CC1310 device is the first device in a Sub-1 GHz family of cost-effective, ultra-low-power wireless MCUs. The CC1310 device combines a flexible, very low power RF transceiver with a powerful 48-MHz Cortex®-M3 microcontroller in a platform supporting multiple physical layers and RF standards. A dedicated Radio Controller (Cortex®-M0) handles low-level RF protocol commands that are stored in ROM or RAM, thus ensuring ultra-low power and flexibility. The low-power consumption of the CC1310 device does not come at the expense of RF performance; the CC1310 device has excellent sensitivity and robustness (selectivity and blocking) performance. The CC1310 device is a highly integrated, true single-chip solution incorporating a complete RF system and an on-chip DC-DC converter. Sensors can be handled in a very low-power manner by a dedicated autonomous ultra-low-power MCU that can be configured to handle analog and digital sensors; thus the main MCU (Cortex-M3) can maximize sleep time. The CC1310 power and clock management and radio systems require specific configuration and handling by software to operate correctly, which has been implemented in the TI-RTOS. TI recommends using this software framework for all application development on the device. The complete TI-RTOS and device drivers are offered in source code free of charge. Device Information (1) PACKAGE BODY SIZE (NOM) CC1310F128RGZ PART NUMBER VQFN (48) 7.00 mm × 7.00 mm CC1310F128RHB VQFN (32) 5.00 mm × 5.00 mm CC1310F128RSM VQFN (32) 4.00 mm × 4.00 mm CC1310F64RGZ VQFN (48) 7.00 mm × 7.00 mm CC1310F64RHB VQFN (32) 5.00 mm × 5.00 mm CC1310F64RSM VQFN (32) 4.00 mm × 4.00 mm CC1310F32RGZ VQFN (48) 7.00 mm × 7.00 mm CC1310F32RHB VQFN (32) 5.00 mm × 5.00 mm CC1310F32RSM VQFN (32) 4.00 mm × 4.00 mm (1) 2 For more information, see Section 9. Device Overview Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com 1.4 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 Functional Block Diagram Figure 1-1 shows a block diagram for the CC1310 device. SimpleLinkTM CC1310 Wireless MCU cJTAG RF core ROM Main CPU: ADC ARM® Cortex®-M3 32-, 64-, 128-KB Flash ADC Digital PLL DSP Modem 8-KB Cache 20-KB SRAM ARM® Cortex®-M0 4x 32-Bit Timers UART 2x SSI (SPI,µW,TI) ROM Sensor Controller General Peripherals / Modules I 2C 4-KB SRAM Sensor Controller Engine 12-Bit ADC, 200ks/s I2S Watchdog Timer 2x Analog Comparators 10 / 15 / 30 GPIOs TRNG SPI / I2C Digital Sensor IF AES Temp. / Batt. Monitor Constant Current Source RTC 32 ch. PDMA Time-to-Digital Converter 2-KB SRAM DC-DC Converter Copyright © 2016, Texas Instruments Incorporated Figure 1-1. CC1310 Block Diagram Device Overview Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 3 CC1310 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 www.ti.com Table of Contents 1 Device Overview ......................................... 1 5.17 DC Characteristics .................................. 23 1.1 Features .............................................. 1 5.18 Thermal Characteristics ............................. 24 1.2 Applications ........................................... 2 5.19 Timing and Switching Characteristics ............... 24 1.3 Description ............................................ 2 5.20 Typical Characteristics .............................. 28 1.4 Functional Block Diagram ............................ 3 6 Detailed Description ................................... 32 2 3 Revision History ......................................... 5 Device Comparison ..................................... 6 6.1 Overview 6.2 Main CPU ........................................... 32 Related Products ..................................... 6 6.3 RF Core ............................................. 33 4 Terminal Configuration and Functions .............. 7 6.4 Sensor Controller 4.1 Pin Diagram – RSM Package ........................ 7 6.5 Memory .............................................. 35 4.2 Signal Descriptions – RSM Package ................. 8 6.6 Debug ........................ 9 4.4 Signal Descriptions – RHB Package ................ 10 4.5 Pin Diagram – RGZ Package ....................... 11 4.6 Signal Descriptions – RGZ Package ................ 12 Specifications ........................................... 14 5.1 Absolute Maximum Ratings ......................... 14 5.2 ESD Ratings ........................................ 14 5.3 Recommended Operating Conditions ............... 14 5.4 Power Consumption Summary...................... 15 5.5 RF Characteristics .................................. 15 5.6 Receive (RX) Parameters, 861 MHz to 1054 MHz . 16 5.7 Receive (RX) Parameters, 431 MHz to 527 MHz .. 17 5.8 Transmit (TX) Parameters, 861 MHz to 1054 MHz . 18 5.9 Transmit (TX) Parameters, 431 MHz to 527 MHz .. 19 5.10 PLL Parameters ..................................... 20 5.11 ADC Characteristics................................. 20 5.12 Temperature Sensor ................................ 21 5.13 Battery Monitor ...................................... 21 5.14 Continuous Time Comparator ....................... 21 5.15 Low-Power Clocked Comparator ................... 22 5.16 Programmable Current Source ..................... 22 6.7 Power Management ................................. 36 3.1 4.3 5 Pin Diagram – RHB Package 7 8 9 ................................... ............................................... ...................................... .................. 6.10 Voltage Supply Domains ............................ 6.11 System Architecture ................................. Application, Implementation, and Layout ......... 7.1 TI Design ............................................ Device and Documentation Support ............... 8.1 Device Nomenclature ............................... 8.2 Tools and Software ................................. 8.3 Documentation Support ............................. 8.4 Texas Instruments Low-Power RF Website ........ 8.5 Low-Power RF eNewsletter ......................... 8.6 Additional Information ............................... 8.7 Community Resources .............................. 8.8 Trademarks.......................................... 8.9 Electrostatic Discharge Caution ..................... 8.10 Export Control Notice ............................... 8.11 Glossary ............................................. 6.8 Clock Systems 6.9 General Peripherals and Modules 32 34 35 37 37 38 38 39 40 41 41 42 43 43 43 43 44 44 44 44 45 Mechanical, Packaging, and Orderable Information .............................................. 45 9.1 4 ............................................ Packaging Information Table of Contents .............................. 45 Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 2 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from October 28, 2015 to October 27, 2016 • • • • • • • • • • • • • • • • Page Added 32KB and 64KB to the Features bullet for in-system programmable flash .......................................... 1 Changed to the correct pin count in the Features bullet RoHS-Compliant Package ........................................ 1 Changed CC1310 Block Diagram .................................................................................................. 3 Changed Figure 4-2, corrected typo in pin name................................................................................. 9 Changed the table note in Absolute Maximum Ratings from: VDDS to: ground............................................ 14 Changed ESD ratings for all pins in ESD Ratings .............................................................................. 14 Added OOK modulation power consumption to Section 5.4 .................................................................. 15 Added OOK modulation sensitivity to Section 5.6 ............................................................................. 16 Added receive parameters for 431-MHz to 527-MHz band in Receive (RX) Parameters, 431 MHz to 527 MHz ...... 17 Added transmit parameters for 431-MHz to 527-MHz band in Transmit (TX) Parameters, 431 MHz to 527 MHz ..... 19 Changed ADC reference voltage to correct value in ADC Characteristics .................................................. 21 Added thermal characteristics for RHB and RSM packages ................................................................. 24 Changed Figure 5-5 by extending the temperature............................................................................. 28 Changed BOD restriction footnote in Table 6-2—restriction does not apply to die revision B and later................. 36 Added Voltage Supply Domains .................................................................................................. 38 Changed Device Nomenclature image ........................................................................................... 41 Changes from September 30, 2015 to October 28, 2015 • Added the RSM and RHB packages Page .............................................................................................. Changes from August 31, 2015 to September 30, 2015 • • 7 Page Changed device status from: Product Preview to: Production Data ........................................................... 1 Removed the RSM and RHB packages .......................................................................................... 7 Revision History Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 5 CC1310 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 www.ti.com 3 Device Comparison Table 3-1 lists the device family overview. Table 3-1. Device Family Overview DEVICE PHY SUPPORT FLASH (KB) RAM (KB) GPIOs CC1310F128RGZ Proprietary, Wireless M-Bus, IEEE 802.15.4g 128 20 30 CC1310F64RGZ Proprietary, Wireless M-Bus, IEEE 802.15.4g 64 16 30 CC1310F32RGZ Proprietary, Wireless M-Bus, IEEE 802.15.4g 32 16 30 CC1310F128RHB Proprietary, Wireless M-Bus, IEEE 802.15.4g 128 20 15 CC1310F64RHB Proprietary, Wireless M-Bus, IEEE 802.15.4g 64 16 15 CC1310F32RHB Proprietary, Wireless M-Bus, IEEE 802.15.4g 32 16 15 CC1310F128RSM Proprietary, Wireless M-Bus, IEEE 802.15.4g 128 20 10 CC1310F64RSM Proprietary, Wireless M-Bus, IEEE 802.15.4g 64 16 10 CC1310F32RSM Proprietary, Wireless M-Bus, IEEE 802.15.4g 32 16 10 3.1 PACKAGE SIZE 7 mm × 7 mm 5 mm × 5 mm 4 mm × 4 mm Related Products Wireless Connectivity The wireless connectivity portfolio offers a wide selection of low-power RF solutions suitable for a broad range of application. The offerings range from fully customized solutions to turnkey offerings with precertified hardware and software (protocol). Sub-1 GHz Long-range, low power wireless connectivity solutions are offered in a wide range of Sub-1 GHz ISM bands. Companion Products Review products that are frequently purchased or used with this product. Reference Designs for CC1310 The TI Designs Reference Design Library is a robust reference design library spanning analog, embedded processor, and connectivity. Created by TI experts to help you jump-start your system design, all TI Designs include schematic or block diagrams, BOMs and design files to speed your time to market. Search and download designs at ti.com/tidesigns. 6 Device Comparison Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 4 Terminal Configuration and Functions 4.1 Pin Diagram – RSM Package 17 VSS 18 DCDC_SW 19 VDDS_DCDC 20 VSS 21 RESET_N 22 DIO_5 23 DIO_6 24 DIO_7 Figure 4-1 shows the RSM pinout diagram. DIO_8 25 16 DIO_4 DIO_9 26 15 DIO_3 VDDS 27 14 JTAG_TCKC VDDR 28 13 JTAG_TMSC VSS 29 12 DCOUPL X24M_P 30 11 VDDS2 X24M_N 31 10 DIO_2 3 4 5 6 7 8 VSS X32K_Q1 X32K_Q2 VSS DIO_0 2 RX_TX 1 RF_P 9 RF_N VDDR_RF 32 DIO_1 Figure 4-1. RSM (4-mm × 4-mm) Pinout, 0.4-mm Pitch I/O pins marked in Figure 4-1 in bold have high-drive capabilities; they are as follows: • Pin 8, DIO_0 • Pin 9, DIO_1 • Pin 10, DIO_2 • Pin 13, JTAG_TMSC • Pin 15, DIO_3 • Pin 16, DIO_4 I/O pins marked in Figure 4-1 in italics have analog capabilities; they are as follows: • Pin 22, DIO_5 • Pin 23, DIO_6 • Pin 24, DIO_7 • Pin 25, DIO_8 • Pin 26, DIO_9 Terminal Configuration and Functions Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 7 CC1310 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 4.2 www.ti.com Signal Descriptions – RSM Package Table 4-1. Signal Descriptions – RSM Package PIN NAME NO. TYPE DESCRIPTION DCDC_SW 18 Power Output from internal DC-DC (1) DCOUPL 12 Power 1.27-V regulated digital-supply decoupling capacitor (2) DIO_0 8 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_1 9 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_2 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_3 15 Digital I/O GPIO, high-drive capability, JTAG_TDO DIO_4 16 Digital I/O GPIO, high-drive capability, JTAG_TDI DIO_5 22 Digital or analog I/O GPIO, Sensor Controller, analog DIO_6 23 Digital or analog I/O GPIO, Sensor Controller, analog DIO_7 24 Digital or analog I/O GPIO, Sensor Controller, analog DIO_8 25 Digital or analog I/O GPIO, Sensor Controller, analog DIO_9 26 Digital or analog I/O GPIO, Sensor Controller, analog EGP – Power JTAG_TMSC 13 Digital I/O JTAG TMSC JTAG_TCKC 14 Digital I/O JTAG TCKC RESET_N 21 Digital input RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal from PA during TX RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal from PA during TX RX_TX 4 RF I/O Optional bias pin for the RF LNA VDDS 27 Power 1.8-V to 3.8-V main chip supply (1) VDDS2 11 Power 1.8-V to 3.8-V GPIO supply (1) VDDS_DCDC 19 Power 1.8-V to 3.8-V DC-DC supply VDDR 28 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (3) VDDR_RF 32 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (4) 3, 7, 17, 20, 29 Power Ground X32K_Q1 5 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 6 Analog I/O 32-kHz crystal oscillator pin 2 X24M_N 30 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 31 Analog I/O 24-MHz crystal oscillator pin 2 VSS (1) (2) (3) (4) 8 Ground; exposed ground pad Reset, active low. No internal pullup. See the technical reference manual listed in Documentation Support for more details. Do not supply external circuitry from this pin. If internal DC-DC is not used, this pin is supplied internally from the main LDO. If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO. Terminal Configuration and Functions Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com 4.3 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 Pin Diagram – RHB Package 17 DCDC_SW 18 VDDS_DCDC 19 RESET_N 20 DIO_7 21 DIO_8 22 DIO_9 23 DIO_10 24 DIO_11 Figure 4-2 shows the RHB pinout diagram. DIO_12 25 16 DIO_6 DIO_13 26 15 DIO_5 DIO_14 27 14 JTAG_TCKC VDDS 28 13 JTAG_TMSC VDDR 29 12 DCOUPL X24M_P 30 11 VDDS2 X24M_N 31 10 DIO_4 1 2 3 4 5 6 7 8 RF_P RX_TX X32K_Q1 X32K_Q2 DIO_0 DIO_1 DIO_2 9 RF_N VDDR_RF 32 DIO_3 Figure 4-2. RHB (5-mm × 5-mm) Pinout, 0.5-mm Pitch I/O pins marked in Figure 4-2 in bold have high-drive capabilities; they are as follows: • Pin 8, DIO_2 • Pin 9, DIO_3 • Pin 10, DIO_4 • Pin 15, DIO_5 • Pin 16, DIO_6 I/O pins marked in Figure 4-2 in italics have analog capabilities; they are as follows: • Pin 20, DIO_7 • Pin 21, DIO_8 • Pin 22, DIO_9 • Pin 23, DIO_10 • Pin 24, DIO_11 • Pin 25, DIO_12 • Pin 26, DIO_13 • Pin 27, DIO_14 Terminal Configuration and Functions Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 9 CC1310 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 4.4 www.ti.com Signal Descriptions – RHB Package Table 4-2. Signal Descriptions – RHB Package PIN NAME TYPE NO. DESCRIPTION DCDC_SW 17 Power Output from internal DC-DC (1) DCOUPL 12 Power 1.27-V regulated digital-supply decoupling (2) DIO_0 6 Digital I/O GPIO, Sensor Controller DIO_1 7 Digital I/O GPIO, Sensor Controller DIO_2 8 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_3 9 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_4 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_5 15 Digital I/O GPIO, high-drive capability, JTAG_TDO DIO_6 16 Digital I/O GPIO, high-drive capability, JTAG_TDI DIO_7 20 Digital or analog I/O GPIO, Sensor Controller, analog DIO_8 21 Digital or analog I/O GPIO, Sensor Controller, analog DIO_9 22 Digital or analog I/O GPIO, Sensor Controller, analog DIO_10 23 Digital or analog I/O GPIO, Sensor Controller, Analog DIO_11 24 Digital or analog I/O GPIO, Sensor Controller, analog DIO_12 25 Digital or analog I/O GPIO, Sensor Controller, analog DIO_13 26 Digital or analog I/O GPIO, Sensor Controller, analog DIO_14 27 Digital or analog I/O GPIO, Sensor Controller, analog EGP – Power JTAG_TMSC 13 Digital I/O JTAG TMSC, high-drive capability JTAG_TCKC 14 Digital I/O JTAG TCKC RESET_N 19 Digital input RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal from PA during TX RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal from PA during TX RX_TX 3 RF I/O Optional bias pin for the RF LNA VDDR 29 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (3) VDDR_RF 32 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (4) VDDS 28 Power 1.8-V to 3.8-V main chip supply (1) VDDS2 11 Power 1.8-V to 3.8-V GPIO supply (1) VDDS_DCDC 18 Power 1.8-V to 3.8-V DC-DC supply X24M_N 30 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 31 Analog I/O 24-MHz crystal oscillator pin 2 X32K_Q1 4 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 5 Analog I/O 32-kHz crystal oscillator pin 2 (1) (2) (3) (4) 10 Ground; exposed ground pad Reset, active low. No internal pullup. See the technical reference manual listed in Documentation Support for more details. Do not supply external circuitry from this pin. If internal DC-DC is not used, this pin is supplied internally from the main LDO. If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO. Terminal Configuration and Functions Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com 4.5 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 Pin Diagram – RGZ Package 25 JTAG_TCKC 26 DIO_16 27 DIO_17 29 DIO_19 28 DIO_18 31 DIO_21 30 DIO_20 33 DCDC_SW 32 DIO_22 35 RESET_N 34 VDDS_DCDC 36 DIO_23 Figure 4-3 shows the RGZ pinout diagram. DIO_24 37 24 JTAG_TMSC DIO_25 38 23 DCOUPL DIO_26 39 22 VDDS3 DIO_27 40 DIO_28 41 21 DIO_15 20 DIO_14 DIO_29 42 DIO_30 43 19 DIO_13 18 DIO_12 VDDS 44 17 DIO_11 16 DIO_10 VDDR 45 15 DIO_9 14 DIO_8 X24M_N 46 X24M_P 47 13 VDDS2 5 6 7 8 9 X32K_Q2 DIO_1 DIO_2 DIO_3 DIO_4 DIO_7 12 4 X32K_Q1 DIO_6 11 3 DIO_5 10 2 RF_N RX_TX RF_P 1 VDDR_RF 48 Figure 4-3. RGZ (7-mm × 7-mm) Pinout, 0.5-mm Pitch I/O pins marked in Figure 4-3 in bold have high-drive capabilities; they are as follows: • Pin 10, DIO_5 • Pin 11, DIO_6 • Pin 12, DIO_7 • Pin 24, JTAG_TMSC • Pin 26, DIO_16 • Pin 27, DIO_17 I/O pins marked in Figure 4-3 in italics have analog capabilities; they are as follows: • Pin 36, DIO_23 • Pin 37, DIO_24 • Pin 38, DIO_25 • Pin 39, DIO_26 • Pin 40, DIO_27 • Pin 41, DIO_28 • Pin 42, DIO_29 • Pin 43, DIO_30 Terminal Configuration and Functions Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 11 CC1310 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 4.6 www.ti.com Signal Descriptions – RGZ Package Table 4-3. Signal Descriptions – RGZ Package PIN NAME TYPE NO. DESCRIPTION DCDC_SW 33 Power Output from internal DC-DC (1) (2) DCOUPL 23 Power 1.27-V regulated digital-supply (decoupling capacitor) (2) DIO_1 6 Digital I/O GPIO, Sensor Controller DIO_2 7 Digital I/O GPIO, Sensor Controller DIO_3 8 Digital I/O GPIO, Sensor Controller DIO_4 9 Digital I/O GPIO, Sensor Controller DIO_5 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_6 11 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_7 12 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_8 14 Digital I/O GPIO DIO_9 15 Digital I/O GPIO DIO_10 16 Digital I/O GPIO DIO_11 17 Digital I/O GPIO DIO_12 18 Digital I/O GPIO DIO_13 19 Digital I/O GPIO DIO_14 20 Digital I/O GPIO DIO_15 21 Digital I/O GPIO DIO_16 26 Digital I/O GPIO, JTAG_TDO, high-drive capability DIO_17 27 Digital I/O GPIO, JTAG_TDI, high-drive capability DIO_18 28 Digital I/O GPIO DIO_19 29 Digital I/O GPIO DIO_20 30 Digital I/O GPIO DIO_21 31 Digital I/O GPIO DIO_22 32 Digital I/O GPIO DIO_23 36 Digital or analog I/O GPIO, Sensor Controller, analog DIO_24 37 Digital or analog I/O GPIO, Sensor Controller, analog DIO_25 38 Digital or analog I/O GPIO, Sensor Controller, analog DIO_26 39 Digital or analog I/O GPIO, Sensor Controller, analog DIO_27 40 Digital or analog I/O GPIO, Sensor Controller, analog DIO_28 41 Digital or analog I/O GPIO, Sensor Controller, analog DIO_29 42 Digital or analog I/O GPIO, Sensor Controller, analog DIO_30 43 Digital or analog I/O GPIO, Sensor Controller, analog EGP – Power JTAG_TMSC 24 Digital I/O JTAG TMSC, high-drive capability JTAG_TCKC 25 Digital I/O JTAG TCKC (3) RESET_N 35 Digital input RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal from PA during TX RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal from PA during TX VDDR 45 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (4) (1) (2) (3) (4) 12 Ground; exposed ground pad Reset, active-low. No internal pullup. See technical reference manual listed in Documentation Support for more details. Do not supply external circuitry from this pin. For design consideration regrading noise immunity for this pin, see the JTAG Interface chapter in the CC13xx, CC26xx SimpleLink™ Wireless MCU Technical Reference Manual. If internal DC-DC is not used, this pin is supplied internally from the main LDO. Terminal Configuration and Functions Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 Table 4-3. Signal Descriptions – RGZ Package (continued) PIN NAME NO. TYPE DESCRIPTION VDDR_RF 48 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (5) VDDS 44 Power 1.8-V to 3.8-V main chip supply (1) VDDS2 13 Power 1.8-V to 3.8-V DIO supply (1) VDDS3 22 Power 1.8-V to 3.8-V DIO supply (1) VDDS_DCDC 34 Power 1.8-V to 3.8-V DC-DC supply X24M_N 46 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 47 Analog I/O 24-MHz crystal oscillator pin 2 RX_TX 3 RF I/O X32K_Q1 4 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 5 Analog I/O 32-kHz crystal oscillator pin 2 (5) Optional bias pin for the RF LNA If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO. Terminal Configuration and Functions Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 13 CC1310 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 www.ti.com 5 Specifications 5.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) VDDS (3) MIN MAX UNIT –0.3 4.1 V –0.3 VDDS + 0.3, max 4.1 V –0.3 VDDR + 0.3, max 2.25 V Voltage scaling enabled –0.3 VDDS Voltage scaling disabled, internal reference –0.3 1.49 Voltage scaling disabled, VDDS as reference –0.3 VDDS / 2.9 10 dBm –40 150 °C Supply voltage Voltage on any digital pin (4) Voltage on crystal oscillator pins X32K_Q1, X32K_Q2, X24M_N, and X24M_P Vin Voltage on ADC input Input RF level Tstg (1) (2) (3) (4) Storage temperature V Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to ground, unless otherwise noted. VDDS2 and VDDS3 must be at the same potential as VDDS. Including analog-capable DIO 5.2 ESD Ratings VALUE VESD (1) (2) 5.3 Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS001 (1) All pins ±3000 Charged device model (CDM), per JESD22-C101 (2) All pins ±500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX –40 85 °C 1.8 3.8 V Rising supply voltage slew rate 0 100 mV/µs Falling supply voltage slew rate 0 20 mV/µs 3 mV/µs 5 °C/s Ambient temperature Operating supply voltage (VDDS) For operation in battery-powered and 3.3-V systems (internal DC-DC can be used to minimize power consumption) Falling supply voltage slew rate, with low-power flash setting (1) Positive temperature gradient in standby (2) (1) (2) 14 No limitation for negative temperature gradient, or outside standby mode UNIT For small coin-cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-µF VDDS input capacitor must be used to ensure compliance with this slew rate. Applications using RCOSC_LF as sleep timer must also consider the drift in frequency caused by a change in temperature (see 32-kHz RC Oscillator (RCOSC_LF)). Specifications Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com 5.4 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 Power Consumption Summary Measured on the Texas Instruments CC1310EM-7XD-7793 reference design unless otherwise noted. Tc = 25°C, VDDS = 3.6 V with DC-DC enabled, unless otherwise noted. Using boost mode (increasing VDDR to 1.95 V), will increase currents in this table by 15% (does not apply to TX 14-dBm setting where this current is already included). PARAMETER Icore Core current consumption TEST CONDITIONS TYP Reset. RESET_N pin asserted or VDDS below power-on-reset threshold 100 Shutdown. No clocks running, no retention 185 Standby. With RTC, CPU, RAM, and (partial) register retention. RCOSC_LF 0.7 Standby. With RTC, CPU, RAM, and (partial) register retention. XOSC_LF 0.8 UNIT nA µA Idle. Supply Systems and RAM powered. 570 Active. MCU running CoreMark at 48 MHz 1.2 mA + 25.5 µA/MHz Active. MCU running CoreMark at 48 MHz 2.5 Active. MCU running CoreMark at 24 MHz 1.9 Radio RX 5.5 mA Radio TX, 10-dBm output power, (G)FSK, 868 MHz 13.4 mA Radio TX, OOK modulation, 10-dBm output power, AVG 11.2 mA Radio TX, boost mode (VDDR = 1.95 V), 14-dBm output power, (G)FSK, 868 MHz 23.5 mA Radio TX, OOK modulation, boost mode (VDDR = 1.95 V), 14dBm, AVG 14.8 mA mA PERIPHERAL CURRENT CONSUMPTION (1) (2) (3) Iperi (1) (2) (3) 5.5 Peripheral power domain Delta current with domain enabled 20 Serial power domain Delta current with domain enabled 13 RF core Delta current with power domain enabled, clock enabled, RF core idle 237 µDMA Delta current with clock enabled, module idle 130 Timers Delta current with clock enabled, module idle 113 I2C Delta current with clock enabled, module idle 12 I2S Delta current with clock enabled, module idle 36 SSI Delta current with clock enabled, module idle 93 UART Delta current with clock enabled, module idle 164 µA Adds to core current Icore for each peripheral unit activated Iperi is not supported in standby or shutdown modes. Measured at 3.0 V RF Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER Frequency bands (1) (1) MIN TYP MAX (287) (351) (359) (439) 431 527 (718) (878) 861 1054 UNIT MHz For more information, see the CC1310 SimpleLink Wireless MCU Silicon Errata. Specifications Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 15 CC1310 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 5.6 www.ti.com Receive (RX) Parameters, 861 MHz to 1054 MHz Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN Data rate Data rate offset tolerance, IEEE 802.15.4g PHY 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–3 Data rate step size TYP MAX UNIT 50 kbps 1600 ppm 1.5 bps Digital channel filter programmable bandwidth Using VCO divide by 5 setting Receiver sensitivity, 50 kbps 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 868 MHz and 915 MHz. Measured on CC1310EM-7XD-7793. –110 dBm Receiver saturation 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 10 dBm Selectivity, ±200 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 43, 45 dB Selectivity, ±400 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 48, 53 dB Blocking ±1 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 59, 62 dB Blocking ±2 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 64, 65 dB Blocking ±5 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 67, 68 dB Blocking ±10 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 76, 76 dB 40 Spurious emissions 1 GHz to 13 GHz Radiated emissions measured according to (VCO leakage at 3.5 GHz) and 30 MHz ETSI EN 300 220 to 1 GHz 4000 kHz –70 dBm Image rejection (image compensation enabled, the image compensation is calibrated in production) Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 44 dB RSSI dynamic range 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode). Starting from the sensitivity limit. This range will give an accuracy of ±2 dB. 95 dB RSSI accuracy 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode). Starting from the sensitivity limit across the given dynamic range. ±2 dB Receiver sensitivity, long-range mode 625 bps 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2. 868 MHz and 915 MHz. 16 Specifications –124 dBm Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 Receive (RX) Parameters, 861 MHz to 1054 MHz (continued) Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Wanted signal 3 dB above sensitivity limit. 10 ksym/s, Selectivity, ±100 kHz, long-range mode GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 625 bps 40-kHz RX bandwidth, BER = 10–2 52, 52 dB Wanted signal 3 dB above sensitivity limit. 10 ksym/s, Selectivity, ±200 kHz, long-range mode GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 625 bps 40-kHz RX bandwidth, BER = 10–2 61, 61 dB Blocking ±1 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 73, 77 dB Blocking ±2 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 79, 79 dB Blocking ±10 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 91, 91 dB Receiver sensitivity, OOK 4.8 kbps 4.8 kbps, OOK, 40-kHz RX bandwidth, BER = 10–2 868 MHz and 915 MHz –115 dBm 5.7 Receive (RX) Parameters, 431 MHz to 527 MHz Measured on the Texas Instruments CC1310EM-7XD-4251 reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled, fRF = 433.92 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. This frequency band is supported on die Revision B and later. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Receiver sensitivity, 50 kbps 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 –110 dBm Receiver saturation 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 10 dBm Selectivity, ±200 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 40, 42 dB Selectivity, ±400 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 42, 50 dB Blocking ±1 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 53, 58 dB Blocking ±2 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 59, 60 dB Blocking ±10 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 74, 74 dB Spurious emissions 1 GHz to 13 GHz Radiated emissions measured according to ETSI EN (VCO leakage at 3.5 GHz) and 30 MHz 300 220 to 1 GHz Image rejection (image compensation enabled, the image compensation is calibrated in production) Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 –74 dBm 43 dB Specifications Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 17 CC1310 SWRS181C – SEPTEMBER 2015 – REVISED OCTOBER 2016 www.ti.com Receive (RX) Parameters, 431 MHz to 527 MHz (continued) Measured on the Texas Instruments CC1310EM-7XD-4251 reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled, fRF = 433.92 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. This frequency band is supported on die Revision B and later. PARAMETER Receiver sensitivity, long-range mode 625 bps TEST CONDITIONS MIN 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2. 868 MHz and 915 MHZ. TYP MAX UNIT –124 dBm Wanted signal 3 dB above sensitivity limit. 10 ksym/s, Selectivity, ±100 kHz, long-range mode GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 625 bps 40-kHz RX bandwidth, BER = 10–2 57, 58 dB Wanted signal 3 dB above sensitivity limit. 10 ksym/s, Selectivity, ±200 kHz, long-range mode GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 625 bps 40-kHz RX bandwidth, BER = 10–2 56, 60 dB Blocking ±1 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 68, 73 dB Blocking ±2 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 74, 74 dB Blocking ±10 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 88, 89 dB Image rejection (image compensation enabled, the image compensation is calibrated in production), long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 55 dB 5.8 Transmit (TX) Parameters, 861 MHz to 1054 MHz Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Maximum output power, boost mode VDDR = 1.95 V Minimum VDDS for boost mode is 2.1 V 868 MHz and 915 MHz 14 dBm Maximum output power 868 MHz and 915 MHz 12 dBm Output power programmable range 24 dB Output power variation Tested at +10-dBm setting ±0.9 dB Output power variation, boost mode +14 dBm ±0.5 dB Spurious emissions (excluding harmonics) (1) Harmonics (1) 18 Transmitting +14 dBm ETSI restricted bands