CC1310F64RSMR

Product Folder Order Now Technical Documents Tools & Software Support & Community Reference Design CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 CC1310 SimpleLink™ 超低功耗低于 1GHz 无线 MCU 1 器件概述 1.1 特性 1 • 微控制器 – 性能强大的 Arm® Cortex®-M3 处理器 – EEMBC CoreMark®评分：142 – EEMBC ULPBench™评分：158 – 时钟速率最高可达 48MHz – 32KB、64KB 和 128KB 系统内可编程闪存 – 8KB 缓存静态随机存取存储器 (SRAM) （或用作通用 RAM） – 20KB 超低泄漏 SRAM – 2 引脚 cJTAG 和 JTAG 调试 – 支持无线 (OTA) 升级 • 超低功耗传感器控制器 – 可独立于系统其余部分自主运行 – 16 位架构 – 2KB 超低泄漏代码和数据 SRAM • 有效的代码尺寸架构，在 ROM 中放置 TI-RTOS、驱动程序、引导加载程序的部件 • 与 RoHS 兼容的封装 – 7mm × 7mm RGZ VQFN48 封装（30 个通用输 入/输出 (GPIO)） – 5mm × 5mm RHB VQFN32 封装（15 个 GPIO） – 4mm × 4mm RSM VQFN32 封装（10 个 GPIO） • 外设 – 所有数字外设引脚均可连接任意 GPIO – 四个通用定时器模块 （8 × 16 位或 4 × 32 位，均采用脉宽调制 (PWM)） – 12 位模数转换器 (ADC)、200MSPS、8 通道模 拟多路复用器 – 持续时间比较器 – 超低功耗时钟比较器 – 可编程电流源 – UART – 2 个同步串行接口 (SSI)（SPI、MICROWIRE 和 TI） – I2C、I2S – 实时时钟 (RTC) – AES-128 安全模块 – 真随机数发生器 (TRNG) – 支持八个电容感测按钮 – 集成温度传感器 空白 空白 • • • • 空白 空白 外部系统 – 片上内部直流/直流转换器 – 无缝集成 SimpleLink™CC1190 范围扩展器 低功耗 – 宽电源电压范围：1.8 至 3.8V – RX：5.4mA – TX（+10dBm 时）：13.4mA – Coremark 运行时的 48MHz 有源模式微控制器 (MCU)：2.5mA (51µA/MHz) – 有源模式 MCU：48.5 CoreMark/mA – 有源模式传感器控制器（24 MHz）： 0.4mA + 8.2μA/MHz – 传感器控制器，每秒唤醒一次来执行一次 12 位 ADC 采样：0.95µA – 待机电流：0.7μA（实时时钟 (RTC) 运行，RAM 和 CPU 保持） – 关断电流：185nA（发生外部事件时唤醒） 射频 (RF) 部分 – 出色的接收器灵敏度：远距离模式下为 –124dBm；50kbps 时为 –110dBm – 出色的可选择性 (±100kHz)：56dB – 出色的阻断性能 (±10MHz)： 90dB – 可编程输出功率：时最高可达 +9dBm – 单端或差分 RF 接口 – 适用于符合全球射频规范的系统 – ETSI EN 300 220 和 EN 303 204（欧洲） – FCC CFR47 第 15 部分（美国） – ARIB STD-T108（日本） – 无线 M-Bus (EN 13757-4) 和 IEEE®802.15.4g PHY 工具和开发环境 – 功能全面的低成本开发套件 – 针对不同 RF 配置的多种参考设计 – 数据包监听器 PC 软件 – Sensor Controller Studio – SmartRF™Studio – SmartRF Flash Programmer 2 – IAR Embedded Workbench®（适用于 Arm） – Code Composer Studio™(CCS) IDE – CCS UniFlash 1 本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确 性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。 English Data Sheet: SWRS181 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 1.2 • • • • • • • 应用 315、433、470、500、779、868、915、 920MHz 工业、科学和医疗 (ISM) 及短程设备 (SRD) 系统 信道间隔为 50kHz 至 5MHz 的 低功耗无线系统 家庭和楼宇自动化 无线警报和安全系统 工业用监控和控制 智能电网和自动抄表 无线医疗保健 应用 1.3 www.ti.com.cn • • • • • • • 无线传感器网络 有源射频识别 (RFID) IEEE 802.15.4g、支持 IP 的智能对象 (6LoWPAN)、无线仪表总线、KNX 系统、 Wi-SUN™及专有系统 能量收集 应用 电子货架标签 (ESL) 远距离传感器 应用 热量分配表 说明 CC1310 器件是一款经济高效型超低功耗低于 1GHz 射频器件，由 德州仪器 (TI)™倾力打造，属于 SimpleLink™ 微控制器 (MCU) 平台的组成部分。该平台包含 Wi-Fi®、低功耗 Bluetooth®、低于 1GHz、以 太网、 Zigbee®、Thread 和主机 MCU。所有这些器件均共用一个简单易用的通用开发环境，其中包含单个 核心软件开发套件 (SDK) 和丰富的工具集。借助一次性集成的 SimpleLink 平台，用户可以将产品组合中的 任何器件组合添加到自己的设计中，从而在设计要求变更时实现 100% 代码重用。有关更多信息，请访问 www.ti.com.cn/simplelink。 凭借极低的有源射频和 MCU 电流消耗以及灵活的低功耗模式，CC1310 器件可确保卓越的电池寿命，并能 够在小型纽扣电池供电的情况下以及在能量采集应用中实现远距离 工作。 CC1310 器件是 CC13xx 和 CC26xx 系列经济高效型超低功耗无线 MCU 中的一员，能够支持低于 1GHz 射 频。CC1310 器件在一个支持多个物理层和射频标准的平台上将灵活的超低功耗射频收发器与强大的 48MHz Arm® Cortex®-M3 微控制器结合在一起。专用无线电控制器 (Cortex®-M0) 可处理存储在 ROM 或 RAM 中的低级射频协议命令，因而可确保超低功耗和灵活性。CC1310 器件在实现低功耗的同时不以牺牲 射频性能为代价；CC1310 器件具有出色的灵敏度和稳健性（选择性和阻断性）性能。 CC1310 器件是高度集成的真正的单芯片解决方案，整合了完整的射频系统和片上直流/直流转换器。 传感器可由专用的超低功耗自主 MCU 以超低功耗方式进行处理（该 MCU 可配置为处理模拟和数字传感 器），因此主 MCU (Arm® Cortex®-M3) 能够最大限度延长睡眠时间。 CC1310 器件的电源和时钟管理系统以及无线电系统需要采用特定配置并由软件处理才能正确运行，这已在 TI-RTOS 中实现。TI 建议将此软件框架用于该器件的全部应用开发过程。完整的 TI-RTOS 和设备驱动程序 均有免费的源代码可供使用。 2 器件概述 版权 © 2015–2018, Texas Instruments Incorporated CC1310 www.ti.com.cn ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 器件信息 (1) 封装 封装尺寸（标称值） CC1310F128RGZ 器件型号 VQFN (48) 7.00mm × 7.00mm CC1310F128RHB VQFN (32) 5.00mm × 5.00mm CC1310F128RSM VQFN (32) 4.00mm x 4.00mm CC1310F64RGZ VQFN (48) 7.00mm × 7.00mm CC1310F64RHB VQFN (32) 5.00mm × 5.00mm CC1310F64RSM VQFN (32) 4.00mm x 4.00mm CC1310F32RGZ VQFN (48) 7.00mm × 7.00mm CC1310F32RHB VQFN (32) 5.00mm × 5.00mm CC1310F32RSM VQFN (32) 4.00mm × 4.00mm (1) 详细信息请见节 9。 版权 © 2015–2018, Texas Instruments Incorporated 器件概述 3 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 1.4 www.ti.com.cn 功能框图 图 1-1 所示为 CC1310 器件框图。 SimpleLinkTM CC1310 Wireless MCU cJTAG Main CPU: RF core ROM ADC ARM® Cortex®-M3 ADC 32-, 64-, 128-KB Flash Digital PLL DSP Modem 8-KB Cache 20-KB SRAM ARM® Cortex®-M0 4x 32-Bit Timers UART 2x SSI (SPI,µW,TI) ROM Sensor Controller General Peripherals / Modules I 2C 4-KB SRAM Sensor Controller Engine 12-Bit ADC, 200ks/s I2S Watchdog Timer 2x Analog Comparators 10 / 15 / 30 GPIOs TRNG SPI / I2C Digital Sensor IF AES Temp. / Batt. Monitor Constant Current Source 32 ch. PDMA RTC Time-to-Digital Converter 2-KB SRAM DC-DC Converter Copyright © 2016, Texas Instruments Incorporated 图 1-1. CC1310 框图 4 器件概述 版权 © 2015–2018, Texas Instruments Incorporated CC1310 www.ti.com.cn ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 内容 1 器件概述 .................................................... 1 5.17 DC Characteristics .................................. 29 1.1 特性 ................................................... 1 5.18 Thermal Characteristics ............................. 30 1.2 应用 ................................................... 2 5.19 Timing and Switching Characteristics ............... 30 1.3 说明 ................................................... 2 5.20 Typical Characteristics .............................. 34 1.4 功能框图 .............................................. 4 6 Detailed Description ................................... 38 2 3 修订历史记录............................................... 6 Device Comparison ..................................... 7 6.1 Overview 6.2 Main CPU ........................................... 38 Related Products ..................................... 7 6.3 RF Core ............................................. 39 4 Terminal Configuration and Functions .............. 8 6.4 Sensor Controller 4.1 Pin Diagram – RSM Package ........................ 8 6.5 Memory .............................................. 41 4.2 Signal Descriptions – RSM Package ................. 9 6.6 Debug 4.3 Pin Diagram – RHB Package ....................... 10 6.7 Power Management ................................. 42 4.4 Signal Descriptions – RHB Package ................ 11 4.5 Pin Diagram – RGZ Package ....................... 12 4.6 Signal Descriptions – RGZ Package ................ 13 ...................................... .................. 6.10 Voltage Supply Domains ............................ 6.11 System Architecture ................................. Application, Implementation, and Layout ......... 7.1 Application Information .............................. 7.2 TI Design or Reference Design ..................... 器件和文档支持 .......................................... 8.1 器件命名规则 ........................................ 8.2 工具和软件 .......................................... 8.3 文档支持 ............................................. 8.4 德州仪器 (TI) 低功耗射频网站 ....................... 8.5 其他信息 ............................................. 8.6 社区资源 ............................................. 8.7 商标.................................................. 8.8 静电放电警告 ........................................ 8.9 出口管制提示 ........................................ 8.10 术语表 ............................................... 机械、封装和可订购信息................................ 9.1 封装信息 ............................................. 3.1 5 Specifications ........................................... 15 5.1 Absolute Maximum Ratings ......................... 15 5.2 ESD Ratings 5.3 Recommended Operating Conditions ............... 15 5.4 Power Consumption Summary...................... 16 5.5 .................................. . Receive (RX) Parameters, 431 MHz to 527 MHz .. Transmit (TX) Parameters, 861 MHz to 1054 MHz . Transmit (TX) Parameters, 431 MHz to 527 MHz .. PLL Parameters ..................................... ADC Characteristics................................. Temperature Sensor ................................ Battery Monitor ...................................... Continuous Time Comparator ....................... Low-Power Clocked Comparator ................... Programmable Current Source ..................... 5.6 5.7 5.8 5.9 5.10 5.11 5.12 5.13 5.14 5.15 5.16 ........................................ 15 RF Characteristics 16 Receive (RX) Parameters, 861 MHz to 1054 MHz 17 版权 © 2015–2018, Texas Instruments Incorporated 7 8 23 25 26 26 26 28 28 28 28 29 9 ............................................ ................................... ............................................... 6.8 Clock Systems 6.9 General Peripherals and Modules 内容 38 40 41 43 43 44 44 45 45 46 46 47 48 50 50 50 50 51 51 51 51 51 51 5 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 www.ti.com.cn 2 修订历史记录 注：之前版本的页码可能与当前版本有所不同。 Changes from October 27, 2016 to July 13, 2018 • • • • • • • • • • • • • • • • 已添加 Code Composer Studio UniFlash .......................................................................................... 1 已更改 描述部分....................................................................................................................... 2 Changed Table 3-1 ................................................................................................................... 7 Changed Figure 4-1 .................................................................................................................. 8 Changed Figure 4-2 ................................................................................................................. 10 Added support for split supply rail to Section 5.3 ............................................................................... 15 Changed Operating supply voltage ............................................................................................... 15 Added test conditions at 433.92 MHz to Section 5.4 ........................................................................... 16 Moved footnote to specific values in Section 5.5 ............................................................................... 16 Changed footnote in Section 5.5 .................................................................................................. 16 Changed test conditions for Receiver sensitivity, 50 kbps in Section 5.6 ................................................... 17 Added parameters to Section 5.6 ................................................................................................. 17 Added Receiver sensitivity parameters to Section 5.7 ......................................................................... 23 Changed ............................................................................................................................. 31 Changed footnote in ................................................................................................................ 31 已添加 “软件”部分 ................................................................................................................... 48 Changes from October 28, 2015 to October 27, 2016 • • • • • • • • • • • • • • • • 6 Page Added the RSM and RHB packages ............................................................................................... 8 Changes from August 31, 2015 to September 30, 2015 • • Page 已添加 32KB 和 64KB 至系统内可编程闪存的特性要点 ......................................................................... 1 已更改 至正确引脚数（位于特性要点 与 RoHS 兼容的封装 .................................................................... 1 已更改 CC1310 框图 ................................................................................................................. 4 Changed Figure 4-2, corrected typo in pin name ............................................................................... 10 Changed the table note in Section 5.1 from: VDDS to: ground ............................................................... 15 Changed ESD ratings for all pins in Section 5.2 ................................................................................ 15 Added OOK modulation power consumption to Section 5.4 .................................................................. 16 Added OOK modulation sensitivity to Section 5.6 .............................................................................. 22 Added receive parameters for 431-MHz to 527-MHz band in Section 5.7 .................................................. 23 Added transmit parameters for 431-MHz to 527-MHz band in Section 5.9 ................................................. 26 Changed ADC reference voltage to correct value in Section 5.11 ........................................................... 27 Added thermal characteristics for RHB and RSM packages in Section 5.18 ............................................... 30 Changed Standby MCU Current Consumption, 32-kHz Clock, RAM and MCU Retention by extending the temperature .......................................................................................................................... 34 Changed BOD restriction footnote in Table 6-2—restriction does not apply to die revision B and later................. 42 Added Section 6.10 ................................................................................................................. 44 已更改 图 8-1 ........................................................................................................................ 47 Changes from September 30, 2015 to October 28, 2015 • Page Page 已更改 器件状态，从“产品预览”更改为“量产数据” ................................................................................ 1 Removed the RSM and RHB packages ........................................................................................... 8 修订历史记录 Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com.cn ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 3 Device Comparison Table 3-1 lists the device family overview. Table 3-1. Device Family Overview DEVICE RADIO SUPPORT CC1310F128RGZ CC1310F64RGZ Proprietary, Wireless M-Bus, IEEE 802.15.4g CC1310F32RGZ CC1310F128RHB CC1310F64RHB Proprietary, Wireless M-Bus, IEEE 802.15.4g CC1310F32RHB CC1310F128RSM CC1310F64RSM Proprietary, Wireless M-Bus, IEEE 802.15.4g CC1310F32RSM 3.1 FLASH (KB) RAM (KB) GPIOs 128 20 30 64 16 30 32 16 30 128 20 15 64 16 15 32 16 15 128 20 10 64 16 10 32 16 10 PACKAGE SIZE RGZ (7 mm × 7 mm VQFN48) RHB (5 mm × 5 mm VQFN32) RSM (4 mm × 4 mm VQFN32) CC1350 Sub-1 GHz Bluetooth low energy 128 20 10-30 RGZ (7 mm × 7 mm VQFN48) RHB (5 mm × 5 mm VQFN32) RSM (4 mm × 4 mm VQFN32) CC2640R2 Bluetooth 5 low energy 2.4-GHz proprietary FSK-based formats 128 20 10-31 RGZ (7 mm × 7 mm VQFN48) RHB (5 mm × 5 mm VQFN32) RSM (4 mm × 4 mm VQFN32) YFV (2.7 mm × 2.7 mm DSBGA34) CC1312R Sub-1 GHz Proprietary, Wireless M-Bus, IEEE 802.15.4g 352 80 30 RGZ (7 mm × 7 mm VQFN48) CC1352R Dual-band (2.4-GHz and Sub-1 GHz) Multiprotocol 352 80 28 RGZ (7 mm × 7 mm VQFN48) CC2652R Multiprotocol Bluetooth 5 low energy Zigbee Thread 2.4-GHz proprietary FSK-based formats 352 80 31 RGZ (7 mm × 7 mm VQFN48) Related Products Wireless Connectivity The wireless connectivity portfolio offers a wide selection of low-power RF solutions suitable for a broad range of application. The offerings range from fully customized solutions to turnkey offerings with precertified hardware and software (protocol). Sub-1 GHz Long-range, low power wireless connectivity solutions are offered in a wide range of Sub-1 GHz ISM bands. Companion Products Review products that are frequently purchased or used with this product. Device Comparison Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 7 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 www.ti.com.cn 4 Terminal Configuration and Functions 4.1 Pin Diagram – RSM Package 17 VSS 18 DCDC_SW 19 VDDS_DCDC 20 VSS 21 RESET_N 22 DIO_5 23 DIO_6 24 DIO_7 Figure 4-1 shows the RSM pinout diagram. DIO_8 25 16 DIO_4 DIO_9 26 15 DIO_3 VDDS 27 14 JTAG_TCKC VDDR 28 13 JTAG_TMSC VSS 29 12 DCOUPL X24M_N 30 11 VDDS2 X24M_P 31 10 DIO_2 3 4 5 6 7 8 VSS X32K_Q1 X32K_Q2 VSS DIO_0 2 RX_TX 1 RF_P 9 RF_N VDDR_RF 32 DIO_1 Figure 4-1. RSM (4-mm × 4-mm) Pinout, 0.4-mm Pitch Top View I/O pins marked in Figure 4-1 in bold have high-drive capabilities; they are as follows: • Pin 8, DIO_0 • Pin 9, DIO_1 • Pin 10, DIO_2 • Pin 13, JTAG_TMSC • Pin 15, DIO_3 • Pin 16, DIO_4 I/O pins marked in Figure 4-1 in italics have analog capabilities; they are as follows: • Pin 22, DIO_5 • Pin 23, DIO_6 • Pin 24, DIO_7 • Pin 25, DIO_8 • Pin 26, DIO_9 8 Terminal Configuration and Functions Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com.cn 4.2 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 Signal Descriptions – RSM Package Table 4-1. Signal Descriptions – RSM Package PIN NAME NO. TYPE DESCRIPTION DCDC_SW 18 Power Output from internal DC/DC (1) DCOUPL 12 Power 1.27-V regulated digital-supply decoupling capacitor (2) DIO_0 8 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_1 9 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_2 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_3 15 Digital I/O GPIO, high-drive capability, JTAG_TDO DIO_4 16 Digital I/O GPIO, high-drive capability, JTAG_TDI DIO_5 22 Digital or analog I/O GPIO, Sensor Controller, analog DIO_6 23 Digital or analog I/O GPIO, Sensor Controller, analog DIO_7 24 Digital or analog I/O GPIO, Sensor Controller, analog DIO_8 25 Digital or analog I/O GPIO, Sensor Controller, analog DIO_9 26 Digital or analog I/O GPIO, Sensor Controller, analog EGP – Power JTAG_TMSC 13 Digital I/O JTAG TMSC JTAG_TCKC 14 Digital I/O JTAG TCKC (3) RESET_N 21 Digital input RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal from PA during TX RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal from PA during TX RX_TX 4 RF I/O Optional bias pin for the RF LNA VDDS 27 Power 1.8-V to 3.8-V main chip supply (1) VDDS2 11 Power 1.8-V to 3.8-V GPIO supply (1) VDDS_DCDC 19 Power 1.8-V to 3.8-V DC/DC supply VDDR 28 Power 1.7-V to 1.95-V supply, connect to output of internal DC/DC (2) (4) VDDR_RF 32 Power 1.7-V to 1.95-V supply, connect to output of internal DC/DC (2) (5) 3, 7, 17, 20, 29 Power Ground X32K_Q1 5 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 6 Analog I/O 32-kHz crystal oscillator pin 2 X24M_N 30 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 31 Analog I/O 24-MHz crystal oscillator pin 2 VSS (1) (2) (3) (4) (5) Ground; exposed ground pad Reset, active low. No internal pullup. See the technical reference manual listed in 节 8.3 for more details. Do not supply external circuitry from this pin. For design consideration regrading noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™ Wireless MCU Technical Reference Manual. If internal DC/DC is not used, this pin is supplied internally from the main LDO. If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO. Terminal Configuration and Functions Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 9 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 4.3 www.ti.com.cn Pin Diagram – RHB Package 17 DCDC_SW 18 VDDS_DCDC 19 RESET_N 20 DIO_7 21 DIO_8 22 DIO_9 23 DIO_10 24 DIO_11 Figure 4-2 shows the RHB pinout diagram. DIO_12 25 16 DIO_6 DIO_13 26 15 DIO_5 DIO_14 27 14 JTAG_TCKC VDDS 28 13 JTAG_TMSC VDDR 29 12 DCOUPL X24M_N 30 11 VDDS2 X24M_P 31 10 DIO_4 1 2 3 4 5 6 7 8 RF_P RX_TX X32K_Q1 X32K_Q2 DIO_0 DIO_1 DIO_2 9 RF_N VDDR_RF 32 DIO_3 Figure 4-2. RHB (5-mm × 5-mm) Pinout, 0.5-mm Pitch Top View I/O pins marked in Figure 4-2 in bold have high-drive capabilities; they are as follows: • Pin 8, DIO_2 • Pin 9, DIO_3 • Pin 10, DIO_4 • Pin 15, DIO_5 • Pin 16, DIO_6 I/O pins marked in Figure 4-2 in italics have analog capabilities; they are as follows: • Pin 20, DIO_7 • Pin 21, DIO_8 • Pin 22, DIO_9 • Pin 23, DIO_10 • Pin 24, DIO_11 • Pin 25, DIO_12 • Pin 26, DIO_13 • Pin 27, DIO_14 10 Terminal Configuration and Functions Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com.cn 4.4 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 Signal Descriptions – RHB Package Table 4-2. Signal Descriptions – RHB Package PIN NAME TYPE NO. DESCRIPTION DCDC_SW 17 Power Output from internal DC/DC (1) DCOUPL 12 Power 1.27-V regulated digital-supply decoupling (2) DIO_0 6 Digital I/O GPIO, Sensor Controller DIO_1 7 Digital I/O GPIO, Sensor Controller DIO_2 8 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_3 9 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_4 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_5 15 Digital I/O GPIO, high-drive capability, JTAG_TDO DIO_6 16 Digital I/O GPIO, high-drive capability, JTAG_TDI DIO_7 20 Digital or analog I/O GPIO, Sensor Controller, analog DIO_8 21 Digital or analog I/O GPIO, Sensor Controller, analog DIO_9 22 Digital or analog I/O GPIO, Sensor Controller, analog DIO_10 23 Digital or analog I/O GPIO, Sensor Controller, Analog DIO_11 24 Digital or analog I/O GPIO, Sensor Controller, analog DIO_12 25 Digital or analog I/O GPIO, Sensor Controller, analog DIO_13 26 Digital or analog I/O GPIO, Sensor Controller, analog DIO_14 27 Digital or analog I/O GPIO, Sensor Controller, analog EGP – Power JTAG_TMSC 13 Digital I/O JTAG TMSC, high-drive capability JTAG_TCKC 14 Digital I/O JTAG TCKC (3) RESET_N 19 Digital input RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal from PA during TX RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal from PA during TX RX_TX 3 RF I/O Optional bias pin for the RF LNA VDDR 29 Power 1.7-V to 1.95-V supply, connect to output of internal DC/DC (2) (4) VDDR_RF 32 Power 1.7-V to 1.95-V supply, connect to output of internal DC/DC (2) (5) VDDS 28 Power 1.8-V to 3.8-V main chip supply (1) VDDS2 11 Power 1.8-V to 3.8-V GPIO supply (1) VDDS_DCDC 18 Power 1.8-V to 3.8-V DC/DC supply X24M_N 30 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 31 Analog I/O 24-MHz crystal oscillator pin 2 X32K_Q1 4 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 5 Analog I/O 32-kHz crystal oscillator pin 2 (1) (2) (3) (4) (5) Ground; exposed ground pad Reset, active low. No internal pullup. For more details, see the technical reference manual listed in 节 8.3. Do not supply external circuitry from this pin. For design consideration regrading noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™ Wireless MCU Technical Reference Manual. If internal DC/DC is not used, this pin is supplied internally from the main LDO. If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO. Terminal Configuration and Functions Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 11 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 4.5 www.ti.com.cn Pin Diagram – RGZ Package 25 JTAG_TCKC 26 DIO_16 27 DIO_17 29 DIO_19 28 DIO_18 31 DIO_21 30 DIO_20 33 DCDC_SW 32 DIO_22 35 RESET_N 34 VDDS_DCDC 36 DIO_23 Figure 4-3 shows the RGZ pinout diagram. DIO_24 37 24 JTAG_TMSC DIO_25 38 23 DCOUPL DIO_26 39 22 VDDS3 DIO_27 40 DIO_28 41 21 DIO_15 20 DIO_14 DIO_29 42 DIO_30 43 19 DIO_13 18 DIO_12 VDDS 44 17 DIO_11 16 DIO_10 VDDR 45 15 DIO_9 14 DIO_8 X24M_N 46 X24M_P 47 13 VDDS2 5 6 7 8 9 X32K_Q2 DIO_1 DIO_2 DIO_3 DIO_4 DIO_7 12 4 X32K_Q1 DIO_6 11 3 DIO_5 10 2 RF_N RX_TX RF_P 1 VDDR_RF 48 Figure 4-3. RGZ (7-mm × 7-mm) Pinout, 0.5-mm Pitch Top View I/O pins marked in Figure 4-3 in bold have high-drive capabilities; they are as follows: • Pin 10, DIO_5 • Pin 11, DIO_6 • Pin 12, DIO_7 • Pin 24, JTAG_TMSC • Pin 26, DIO_16 • Pin 27, DIO_17 I/O pins marked in Figure 4-3 in italics have analog capabilities; they are as follows: • Pin 36, DIO_23 • Pin 37, DIO_24 • Pin 38, DIO_25 • Pin 39, DIO_26 • Pin 40, DIO_27 • Pin 41, DIO_28 • Pin 42, DIO_29 • Pin 43, DIO_30 12 Terminal Configuration and Functions Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com.cn 4.6 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 Signal Descriptions – RGZ Package Table 4-3. Signal Descriptions – RGZ Package PIN NAME NO. TYPE DESCRIPTION DCDC_SW 33 Power Output from internal DC/DC (1) (2) DCOUPL 23 Power 1.27-V regulated digital-supply (decoupling capacitor) (2) DIO_1 6 Digital I/O GPIO, Sensor Controller DIO_2 7 Digital I/O GPIO, Sensor Controller DIO_3 8 Digital I/O GPIO, Sensor Controller DIO_4 9 Digital I/O GPIO, Sensor Controller DIO_5 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_6 11 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_7 12 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_8 14 Digital I/O GPIO DIO_9 15 Digital I/O GPIO DIO_10 16 Digital I/O GPIO DIO_11 17 Digital I/O GPIO DIO_12 18 Digital I/O GPIO DIO_13 19 Digital I/O GPIO DIO_14 20 Digital I/O GPIO DIO_15 21 Digital I/O GPIO DIO_16 26 Digital I/O GPIO, JTAG_TDO, high-drive capability DIO_17 27 Digital I/O GPIO, JTAG_TDI, high-drive capability DIO_18 28 Digital I/O GPIO DIO_19 29 Digital I/O GPIO DIO_20 30 Digital I/O GPIO DIO_21 31 Digital I/O GPIO DIO_22 32 Digital I/O GPIO DIO_23 36 Digital or analog I/O GPIO, Sensor Controller, analog DIO_24 37 Digital or analog I/O GPIO, Sensor Controller, analog DIO_25 38 Digital or analog I/O GPIO, Sensor Controller, analog DIO_26 39 Digital or analog I/O GPIO, Sensor Controller, analog DIO_27 40 Digital or analog I/O GPIO, Sensor Controller, analog DIO_28 41 Digital or analog I/O GPIO, Sensor Controller, analog DIO_29 42 Digital or analog I/O GPIO, Sensor Controller, analog DIO_30 43 Digital or analog I/O GPIO, Sensor Controller, analog EGP – Power JTAG_TMSC 24 Digital I/O JTAG TMSC, high-drive capability JTAG_TCKC 25 Digital I/O JTAG TCKC (3) RESET_N 35 Digital input RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal from PA during TX RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal from PA during TX (1) (2) (3) Ground; exposed ground pad Reset, active-low. No internal pullup. See technical reference manual listed in 节 8.3 for more details. Do not supply external circuitry from this pin. For design consideration regrading noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™ Wireless MCU Technical Reference Manual. Terminal Configuration and Functions Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 13 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 www.ti.com.cn Table 4-3. Signal Descriptions – RGZ Package (continued) PIN TYPE DESCRIPTION NAME NO. VDDR 45 Power 1.7-V to 1.95-V supply, connect to output of internal DC/DC (2) (4) VDDR_RF 48 Power 1.7-V to 1.95-V supply, connect to output of internal DC/DC (2) (5) VDDS 44 Power 1.8-V to 3.8-V main chip supply (1) VDDS2 13 Power 1.8-V to 3.8-V DIO supply (1) VDDS3 22 Power 1.8-V to 3.8-V DIO supply (1) VDDS_DCDC 34 Power 1.8-V to 3.8-V DC/DC supply X24M_N 46 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 47 Analog I/O 24-MHz crystal oscillator pin 2 RX_TX 3 RF I/O X32K_Q1 4 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 5 Analog I/O 32-kHz crystal oscillator pin 2 (4) (5) 14 Optional bias pin for the RF LNA If internal DC/DC is not used, this pin is supplied internally from the main LDO. If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO. Terminal Configuration and Functions Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com.cn ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 5 Specifications 5.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN MAX UNIT –0.3 4.1 V –0.3 VDDSn + 0.3, max 4.1 V –0.3 VDDR + 0.3, max 2.25 V Voltage scaling enabled –0.3 VDDS Voltage scaling disabled, internal reference –0.3 1.49 Voltage scaling disabled, VDDS as reference –0.3 VDDS / 2.9 10 dBm –40 150 °C Supply voltage (VDDS, VDDS2, and VDDS3) Voltage on any digital pin (3) (4) Voltage on crystal oscillator pins X32K_Q1, X32K_Q2, X24M_N, and X24M_P Voltage on ADC input (Vin) Input RF level Storage temperature (Tstg) (1) (2) (3) (4) V Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to ground, unless otherwise noted. Including analog-capable DIO. Each pin is referenced to a specific VDDSn (VDDS, VDDS2 or VDDS3). For a pin-to-VDDS mapping table, see Table 6-3. 5.2 ESD Ratings VALUE VESD (1) (2) 5.3 Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS001 (1) All pins ±3000 Charged device model (CDM), per JESD22-C101 (2) All pins ±500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) Ambient temperature Operating supply voltage (VDDS) MIN MAX –40 85 UNIT °C 1.8 3.8 V VDDS < 2.7 V 1.8 3.8 V VDDS ≥ 2.7 V 1.9 3.8 V Rising supply voltage slew rate 0 100 mV/µs Falling supply voltage slew rate 0 20 mV/µs 3 mV/µs 5 °C/s For operation in battery-powered and Operating supply voltages (VDDS2 and VDDS3) 3.3-V systems (internal DC/DC can be used to minimize power consumption) Operating supply voltages (VDDS2 and VDDS3) Falling supply voltage slew rate, with low-power flash setting (1) Positive temperature gradient in standby (2) (1) (2) No limitation for negative temperature gradient, or outside standby mode For small coin-cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-µF VDDS input capacitor must be used to ensure compliance with this slew rate. Applications using RCOSC_LF as sleep timer must also consider the drift in frequency caused by a change in temperature (see ). Specifications Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 15 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 5.4 www.ti.com.cn Power Consumption Summary Measured on the Texas Instruments CC1310EM-7XD-7793 reference design unless otherwise noted. Tc = 25°C, VDDS = 3.6 V with DC/DC enabled, unless otherwise noted. Using boost mode (increasing VDDR to 1.95 V), will increase currents in this table by 15% (does not apply to TX 14-dBm setting where this current is already included). PARAMETER Icore Core current consumption TEST CONDITIONS 100 Shutdown. No clocks running, no retention 185 Standby. With RTC, CPU, RAM, and (partial) register retention. RCOSC_LF 0.7 Standby. With RTC, CPU, RAM, and (partial) register retention. XOSC_LF 0.8 (1) (2) (3) 5.5 UNIT nA µA Idle. Supply Systems and RAM powered. 570 Active. MCU running CoreMark at 48 MHz 1.2 mA + 25.5 µA/MHz Active. MCU running CoreMark at 48 MHz 2.5 Active. MCU running CoreMark at 24 MHz 1.9 mA Radio RX, 868 MHz 5.5 mA Radio TX, 10-dBm output power, (G)FSK, 868 MHz 13.4 mA Radio TX, OOK modulation, 10-dBm output power, AVG 11.2 mA Radio TX, boost mode (VDDR = 1.95 V), 14-dBm output power, (G)FSK, 868 MHz 23.5 mA Radio TX, OOK modulation, boost mode (VDDR = 1.95 V), 14dBm, AVG 14.8 mA Radio TX, boost mode (VDDR = 1.95 V), 15-dBm output power, (G)FSK, measured on CC1310EM-7XD-4251, 433.92 MHz 25.1 mA Radio TX, 10-dBm output power, measured on CC1310EM7XD-4251, 433.92 MHz 13.2 mA PERIPHERAL CURRENT CONSUMPTION Iperi TYP Reset. RESET_N pin asserted or VDDS below power-on-reset threshold (1) (2) (3) Peripheral power domain Delta current with domain enabled 20 Serial power domain Delta current with domain enabled 13 RF core Delta current with power domain enabled, clock enabled, RF core idle 237 µDMA Delta current with clock enabled, module idle 130 Timers Delta current with clock enabled, module idle 113 I2C Delta current with clock enabled, module idle 12 I2S Delta current with clock enabled, module idle 36 SSI Delta current with clock enabled, module idle 93 UART Delta current with clock enabled, module idle 164 µA Adds to core current Icore for each peripheral unit activated Iperi is not supported in standby or shutdown modes. Measured at 3.0 V RF Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER MIN 287 Frequency bands (1) 351 431 527 (1) (1) 878 UNIT (1) 439 (1) 861 16 MAX 359 (1) 718 (1) TYP MHz 1054 These frequency bands are functionally verified. Radio settings for specific physical layer parameters can be made available upon request. Specifications Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com.cn 5.6 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 Receive (RX) Parameters, 861 MHz to 1054 MHz Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC/DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN Data rate Data rate offset tolerance, IEEE 802.15.4g PHY TYP MAX Up to 4 Mbps 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–3 Data rate step size UNIT bps 1600 ppm 1.5 bps Digital channel filter programmable bandwidth Using VCO divide by 5 setting Receiver sensitivity, 50 kbps 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2. 868 MHz and 915 MHz –110 dBm Receiver saturation 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 10 dBm Selectivity, ±200 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 44, 47 dB Selectivity, ±400 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 48, 53 dB Blocking ±1 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 59, 62 dB Blocking ±2 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 64, 65 dB Blocking ±5 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 67, 68 dB Blocking ±10 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 76, 76 dB Spurious emissions 1 GHz to 13 GHz (VCO leakage at 3.5 GHz) and 30 MHz to 1 GHz Conducted emissions measured according to ETSI EN 300 220 Image rejection (image compensation enabled, the image compensation is calibrated in production), 50 kbps 40 4000 kHz –70 dBm Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 44 dB RSSI dynamic range 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode). Starting from the sensitivity limit. This range will give an accuracy of ±2 dB. 95 dB RSSI accuracy 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode). Starting from the sensitivity limit across the given dynamic range. ±2 dB Receiver sensitivity, 500 kbps GFSK, 175-kHz deviation, 1.243-MHz RX bandwidth, BER = 10–2 –97 dBm Blocking, ±2 MHz, 500 kbps Wanted signal 3 dB above sensitivity limit. 500 kbps, GFSK, 175-kHz deviation, 1.243-MHz RX bandwidth, BER = 10–2 35, 36 Specifications Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 dB 17 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 www.ti.com.cn Receive (RX) Parameters, 861 MHz to 1054 MHz (continued) Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC/DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN Blocking, ±10 MHz, 500 kbps Wanted signal 3 dB above sensitivity limit. 500 kbps, GFSK, 175-kHz deviation, 1.243-MHz RX bandwidth, BER = 10–2 Receiver sensitivity, long-range mode, 5 kbps TYP MAX UNIT 55, 47 dB 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 2, 49-kHz RX bandwidth, BER = 10–2. 868 MHz and 915 MHz –119 dBm Receiver sensitivity, long-range mode, 2.5 kbps 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 4, 49-kHz RX bandwidth, BER = 10–2. 868 MHz and 915 MHz –120 dBm Receiver sensitivity, long-range mode, 1.25 kbps 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 49-kHz RX bandwidth, BER = 10–2. 868 MHz and 915 MHz –121 dBm Selectivity, ±100 kHz, long-range mode, 5 kbps Wanted signal 3 dB above sensitivity limit. 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 2, 49-kHz RX bandwidth, BER = 10–2 47, 47 dB Selectivity, ±200 kHz, long-range mode, 5 kbps Wanted signal 3 dB above sensitivity limit. 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 2, 49-kHz RX bandwidth, BER = 10–2 54, 55 dB Selectivity, ±300 kHz, long-range mode, 5 kbps Wanted signal 3 dB above sensitivity limit. 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 2, 49-kHz RX bandwidth, BER = 10–2 57, 56 dB Blocking, ±1 MHz, long-range mode, 5 kbps Wanted signal 3 dB above sensitivity limit. 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 2, 49-kHz RX bandwidth, BER = 10–2 68, 67 dB Blocking, ±2 MHz, long-range mode, 5 kbps Wanted signal 3 dB above sensitivity limit. 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 2, 49-kHz RX bandwidth, BER = 10–2 74, 74 dB Blocking, ±10 MHz, long-range mode, 5 kbps Wanted signal 3 dB above sensitivity limit. 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 2, 49-kHz RX bandwidth, BER = 10–2 85, 85 dB Image rejection (image compensation enabled, the image compensation is calibrated in production), long-range mode, 5 kbps Wanted signal 3 dB above sensitivity limit. 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 2, 49-kHz RX bandwidth, BER = 10–2 52 dB Receiver sensitivity, wM-BUS S2-mode, 32.768 kbps fRF = 868.3 MHz, 32.768 ksym/s, Manchester coding, FSK, 50-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 –111 dBm Selectivity, ±200 kHz, wM-BUS S2-mode, 32.768 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.3 MHz, 32.768 ksym/s, Manchester coding, FSK, 50-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 42, 43 dB Selectivity, ±400 kHz, wM-BUS S2-mode, 32.768 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.3 MHz, 32.768 ksym/s, Manchester coding, FSK, 50-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 41, 47 dB Blocking, ±1 MHz, wM-BUS S2-mode, 32.768 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.3 MHz, 32.768 ksym/s, Manchester coding, FSK, 50-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 43, 52 dB Blocking, ±2 MHz, wM-BUS S2-mode, 32.768 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.3 MHz, 32.768 ksym/s, Manchester coding, FSK, 50-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 52, 55 dB Blocking, ±10 MHz, wM-BUS S2-mode, 32.768 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.3 MHz, 32.768 ksym/s, Manchester coding, FSK, 50-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 68, 72 dB 18 Specifications Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com.cn ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 Receive (RX) Parameters, 861 MHz to 1054 MHz (continued) Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC/DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Image rejection (image compensation enabled, the image compensation is calibrated in production), wM-BUS S2-mode, 32.768 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.3 MHz, 32.768 ksym/s, Manchester coding, FSK, 50-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 Receiver sensitivity, wM-BUS C-mode, 100 kbps fRF = 868.95 MHz, 100 ksym/s, NRZ coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 –107 dBm Selectivity, ±400 kHz, wM-BUS C-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, NRZ coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 41, 46 dB Selectivity, ±800 kHz, wM-BUS C-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, NRZ coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 41, 50 dB Blocking, ±1 MHz, wM-BUS C-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, NRZ coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 43, 51 dB Blocking, ±2 MHz, wM-BUS C-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, NRZ coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 51, 53 dB Blocking, ±5 MHz, wM-BUS C-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, NRZ coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 55, 61 dB Blocking, ±10 MHz, wM-BUS C-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, NRZ coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 67, 68 dB Receiver sensitivity, wM-BUS T-mode, 100 kbps fRF = 868.95 MHz, 100 ksym/s, 3 out of 6 coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 –105 dBm Selectivity, ±400 kHz, wM-BUS T-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, 3 out of 6 coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 41, 46 dB Selectivity, ±800 kHz, wM-BUS T-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, 3 out of 6 coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 41, 50 dB Blocking, ±1 MHz, wM-BUS T-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, 3 out of 6 coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 42, 51 dB Blocking, ±2 MHz, wM-BUS T-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, 3 out of 6 coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 51, 52 dB Blocking, ±5 MHz, wM-BUS T-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, 3 out of 6 coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 54, 60 dB Blocking, ±10 MHz, wM-BUS T-mode, 100 kbps Wanted signal 3 dB above sensitivity limit. fRF = 868.95 MHz, 100 ksym/s, 3 out of 6 coding, FSK, 45-kHz deviation, 196-kHz RX bandwidth, BER = 10–2 67, 68 dB Receiver sensitivity, WideBand-DSSS (WB-DSSS), 30 kbps fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 8, 622-kHz RX bandwidth, BER = 10–2 –109 dBm Blocking, ±1 MHz, WB-DSSS, 30 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 8, 622-kHz RX bandwidth, BER = 10–2 57, 57 dB Blocking, ±2 MHz, WB-DSSS, 30 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 8, 622-kHz RX bandwidth, BER = 10–2 58, 58 dB 43 Specifications Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 dB 19 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 www.ti.com.cn Receive (RX) Parameters, 861 MHz to 1054 MHz (continued) Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC/DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Blocking, ±5 MHz, WB-DSSS, 30 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 8, 622-kHz RX bandwidth, BER = 10–2 59, 57 dB Blocking, ±10 MHz, WB-DSSS, 30 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 8, 622-kHz RX bandwidth, BER = 10–2 71, 68 dB Receiver sensitivity, WideBand-DSSS (WB-DSSS), 60 kbps fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 4, 622-kHz RX bandwidth, BER = 10–2 –108 dBm Blocking, ±1 MHz, WB-DSSS, 60 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 4, 622-kHz RX bandwidth, BER = 10–2 56, 56 dB Blocking, ±2 MHz, WB-DSSS, 60 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 4, 622-kHz RX bandwidth, BER = 10–2 57, 57 dB Blocking, ±5 MHz, WB-DSSS, 60 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 4, 622-kHz RX bandwidth, BER = 10–2 57, 56 dB Blocking, ±10 MHz, WB-DSSS, 60 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 4, 622-kHz RX bandwidth, BER = 10–2 70, 67 dB Receiver sensitivity, WideBand-DSSS (WB-DSSS), 120 kbps fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 2, 622-kHz RX bandwidth, BER = 10–2 –106 dBm Blocking, ±1 MHz, WB-DSSS, 120 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 2, 622-kHz RX bandwidth, BER = 10–2 54, 54 dB Blocking, ±2 MHz, WB-DSSS, 120 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 2, 622-kHz RX bandwidth, BER = 10–2 55, 55 dB Blocking, ±5 MHz, WB-DSSS, 120 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 2, 622-kHz RX bandwidth, BER = 10–2 55, 54 dB Blocking, ±10 MHz, WB-DSSS, 120 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 2, 622-kHz RX bandwidth, BER = 10–2 69, 65 dB Receiver sensitivity, WideBand-DSSS (WB-DSSS), 240 kbps fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 1, 622-kHz RX bandwidth, BER = 10–2 –105 dBm Blocking, ±1 MHz, WB-DSSS, 240 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 1, 622-kHz RX bandwidth, BER = 10–2 53, 53 dB Blocking, ±2 MHz, WB-DSSS, 240 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 1, 622-kHz RX bandwidth, BER = 10–2 53, 54 dB 20 Specifications Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com.cn ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 Receive (RX) Parameters, 861 MHz to 1054 MHz (continued) Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC/DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Blocking, ±5 MHz, WB-DSSS, 240 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 1, 622-kHz RX bandwidth, BER = 10–2 53, 54 dB Blocking, ±10 MHz, WB-DSSS, 240 kbps Wanted signal 3 dB above sensitivity limit. fRF = 915 MHz, 480 ksym/s, GFSK, 195-kHz deviation, FEC (half rate), DSSS = 1, 622-kHz RX bandwidth, BER = 10–2 68, 64 dB Receiver sensitivity, 10 kbps GFSK, 19-kHz deviation, 78-kHz RX bandwidth, BER = 10–2 –114 dBm Selectivity, ±100 kHz, 10 kbps Wanted signal 3 dB above sensitivity limit. 10 kbps, GFSK, 19-kHz deviation, 78-kHz RX bandwidth, BER = 10–2 40, 40 dB Selectivity, ±200 kHz, 10 kbps Wanted signal 3 dB above sensitivity limit. 10 kbps, GFSK, 19-kHz deviation, 78-kHz RX bandwidth, BER = 10–2 46, 44 dB Selectivity, ±400 kHz, 10 kbps Wanted signal 3 dB above sensitivity limit. 10 kbps, GFSK, 19-kHz deviation, 78-kHz RX bandwidth, BER = 10–2 50, 45 dB Blocking, ±2 MHz, 10 kbps Wanted signal 3 dB above sensitivity limit. 10 kbps, GFSK, 19-kHz deviation, 78-kHz RX bandwidth, BER = 10–2 62, 61 dB Blocking, ±10 MHz, 10 kbps Wanted signal 3 dB above sensitivity limit. 10 kbps, GFSK, 19-kHz deviation, 78-kHz RX bandwidth, BER = 10–2 76, 72 dB Image rejection (image compensation enabled, the image compensation is calibrated in production), 10 kbps Wanted signal 3 dB above sensitivity limit. 10 kbps, GFSK, 19-kHz deviation, 78-kHz RX bandwidth, BER = 10–2 43 dB Receiver sensitivity, 4.8 kbps GFSK, 5.2-kHz deviation, 49-kHz RX bandwidth, BER = 10–2 Selectivity, ±100 kHz, 4.8 kbps –114 dBm Wanted signal 3 dB above sensitivity limit. 4.8 kbps, GFSK, 5.2-kHz deviation, 49-kHz RX bandwidth, BER = 10–2 44, 43 dB Selectivity, ±200 kHz, 4.8 kbps Wanted signal 3 dB above sensitivity limit. 4.8 kbps, GFSK, 5.2-kHz deviation, 49-kHz RX bandwidth, BER = 10–2 49, 48 dB Selectivity, ±400 kHz, 4.8 kbps Wanted signal 3 dB above sensitivity limit. 4.8 kbps, GFSK, 5.2-kHz deviation, 49-kHz RX bandwidth, BER = 10–2 52, 49 dB Blocking, ±2 MHz, 4.8 kbps Wanted signal 3 dB above sensitivity limit. 4.8 kbps, GFSK, 5.2-kHz deviation, 49-kHz RX bandwidth, BER = 10–2 64, 63 dB Blocking, ±10 MHz, 4.8 kbps Wanted signal 3 dB above sensitivity limit. 4.8 kbps, GFSK, 5.2-kHz deviation, 49-kHz RX bandwidth, BER = 10–2 73, 72 dB Image rejection (image compensation enabled, the image compensation is calibrated in production), 4.8 kbps Wanted signal 3 dB above sensitivity limit. 4.8 kbps, GFSK, 5.2-kHz deviation, 49-kHz RX bandwidth, BER = 10–2 43 dB Receiver sensitivity, CC1101 compatible mode, 2.4 kbps GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 –116 dBm Selectivity, ±100 kHz, CC1101 compatible mode, 2.4 kbps Wanted signal 3 dB above sensitivity limit. 2.4 kbps, GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 45, 44 dB Selectivity, ±200 kHz, CC1101 compatible mode, 2.4 kbps Wanted signal 3 dB above sensitivity limit. 2.4 kbps, GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 51, 47 dB Specifications Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 21 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 www.ti.com.cn Receive (RX) Parameters, 861 MHz to 1054 MHz (continued) Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC/DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Blocking, ±2 MHz, CC1101 compatible mode, 2.4 kbps Wanted signal 3 dB above sensitivity limit. 2.4 kbps, GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 63, 62 dB Blocking, ±10 MHz, CC1101 compatible mode, 2.4 kbps Wanted signal 3 dB above sensitivity limit. 2.4 kbps, GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 76, 71 dB Image rejection (image compensation enabled, the image compensation is calibrated in production), CC1101 compatible mode, 2.4 kbps Wanted signal 3 dB above sensitivity limit. 2.4 kbps, GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 45 dB Receiver sensitivity, CC1101 compatible mode, 1.2 kbps GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 –117 dBm Selectivity, ±100 kHz, CC1101 compatible mode, 1.2 kbps Wanted signal 3 dB above sensitivity limit. 1.2 kbps, GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 45, 44 dB Selectivity, ±200 kHz, CC1101 compatible mode, 1.2 kbps Wanted signal 3 dB above sensitivity limit. 1.2 kbps, GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 51, 47 dB Blocking, ±2 MHz, CC1101 compatible mode, 1.2 kbps Wanted signal 3 dB above sensitivity limit. 1.2 kbps, GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 63, 62 dB Blocking, ±10 MHz, CC1101 compatible mode, 1.2 kbps Wanted signal 3 dB above sensitivity limit. 1.2 kbps, GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 81, 81 dB Image rejection (image compensation enabled, the image compensation is calibrated in production), CC1101 compatible mode, 1.2 kbps Wanted signal 3 dB above sensitivity limit. 1.2 kbps, GFSK, 5.2-kHz deviation (commonly used settings on CC1101), 49-kHz RX bandwidth, BER = 10–2 45 dB Receiver sensitivity, legacy long-range mode, 625 bps 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2. 868 MHz and 915 MHz. Selectivity, ±100 kHz, legacy long-range mode, 625 bps –124 dBm Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 56, 56 dB Selectivity, ±200 kHz, legacy long-range mode, 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 62, 65 dB Blocking ±1 MHz, legacy long-range mode, 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 73, 77 dB Blocking ±2 MHz, legacy long-range mode, 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 79, 79 dB Blocking ±10 MHz, legacy long-range mode, 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 91, 91 dB Receiver sensitivity, OOK, 4.8 kbps 4.8 kbps, OOK, 40-kHz RX bandwidth, BER = 10–2. 868 MHz and 915 MHz –115 dBm 22 Specifications Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com.cn 5.7 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 Receive (RX) Parameters, 431 MHz to 527 MHz Measured on the Texas Instruments CC1310EM-7XD-4251 reference design with Tc = 25°C, VDDS = 3.0 V, DC/DC enabled, fRF = 433.92 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. This frequency band is supported on die Revision B and later. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Receiver sensitivity, 50 kbps 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 –110 dBm Receiver saturation 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 10 dBm Selectivity, ±200 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 40, 42 dB Selectivity, ±400 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 42, 50 dB Blocking ±1 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 53, 58 dB Blocking ±2 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 59, 60 dB Blocking ±10 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 74, 74 dB Spurious emissions 1 GHz to 13 GHz (VCO leakage at 3.5 GHz) and 30 MHz to 1 GHz Conducted emissions measured according to ETSI EN 300 220 Image rejection (image compensation enabled, the image compensation is calibrated in production), 50 kbps –74 dBm Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 43 dB Receiver sensitivity, long-range mode, 5 kbps 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 2, 49-kHz RX bandwidth, BER = 10–2. 433 MHz –119 dBm Receiver sensitivity, long-range mode, 2.5 kbps 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 4, 49-kHz RX bandwidth, BER = 10–2. 433 MHz –120 dBm Receiver sensitivity, long-range mode, 1.25 kbps 20 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 49-kHz RX bandwidth, BER = 10–2. 433 MHz –121 dBm Receiver sensitivity, legacy long-range mode, 625 bps 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2. 868 MHz and 915 MHZ. –124 dBm Selectivity, ±100 kHz, legacy long-range mode, 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 57, 58 dB Selectivity, ±200 kHz, legacy long-range mode, 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 56, 60 dB Blocking ±1 MHz, legacy long-range mode, 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 68, 73 dB Blocking ±2 MHz, legacy long-range mode, 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 74, 74 dB Blocking ±10 MHz, legacy long-range mode, 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 88, 89 dB Specifications Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 23 CC1310 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 www.ti.com.cn Receive (RX) Parameters, 431 MHz to 527 MHz (continued) Measured on the Texas Instruments CC1310EM-7XD-4251 reference design with Tc = 25°C, VDDS = 3.0 V, DC/DC enabled, fRF = 433.92 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. This frequency band is supported on die Revision B and later. PARAMETER Image rejection (image compensation enabled, the image compensation is calibrated in production), legacy longrange mode, 625 bps 24 TEST CONDITIONS MIN Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 Specifications TYP 55 MAX UNIT dB Copyright © 2015–2018, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1310 CC1310 www.ti.com.cn 5.8 ZHCSEB0D – SEPTEMBER 2015 – REVISED JULY 2018 Transmit (TX) Parameters, 861 MHz to 1054 MHz Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC/DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Maximum output power, boost mode VDDR = 1.95 V Minimum VDDS for boost mode is 2.1 V 868 MHz and 915 MHz 14 dBm Maximum output power 868 MHz and 915 MHz 12 dBm 24 dB Output power programmable range Output power variation Tested at +10-dBm setting ±0.9 dB Output power variation, boost mode +14 dBm ±0.5 dB Spurious emissions (excluding harmonics) (1) Harmonics Spurious emissions out-of-band, 915 MHz (1) Spurious emissions out-of-band, 920.6 MHz (1) (1) Transmitting +14 dBm ETSI restricted bands