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CC2620
SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
CC2620 SimpleLink™ ZigBee® RF4CE Wireless MCU
1 Device Overview
1.1
Features
1
• Microcontroller
– Powerful ARM® Cortex®-M3
– EEMBC CoreMark® Score: 142
– Up to 48-MHz Clock Speed
– 128KB of In-System Programmable Flash
– 8KB of SRAM for Cache
– 20KB of Ultralow-Leakage SRAM
– 2-Pin cJTAG and JTAG Debugging
– Supports Over-The-Air Upgrade (OTA)
• Ultralow-Power Sensor Controller
– Can Run Autonomous From the Rest of the
System
– 16-Bit Architecture
– 2KB of Ultralow-Leakage SRAM for Code and
Data
• Efficient Code Size Architecture, Placing Drivers,
IEEE 802.15.4 MAC, and Bootloader in ROM
• RoHS-Compliant Packages
– 4-mm × 4-mm RSM VQFN32 (10 GPIOs)
– 7-mm × 7-mm RGZ VQFN48 (31 GPIOs)
• Peripherals
– All Digital Peripheral Pins Can Be Routed to
Any GPIO
– Four General-Purpose Timer Modules
(Eight 16-Bit or Four 32-Bit Timers, PWM Each)
– 12-Bit ADC, 200-ksamples/s, 8-Channel Analog
MUX
– Continuous Time Comparator
– Ultralow-Power Analog Comparator
– Programmable Current Source
– UART
– 2× SSI (SPI, MICROWIRE, TI)
– I2C
– I2S
– Real-Time Clock (RTC)
– AES-128 Security Module
– True Random Number Generator (TRNG)
– 10, 15, or 31 GPIOs, Depending on Package
Option
– Support for Eight Capacitive-Sensing Buttons
– Integrated Temperature Sensor
• External System
– On-Chip internal DC-DC Converter
– Very Few External Components
– Seamless Integration With the SimpleLink™
CC2590 and CC2592 Range Extenders
• Low Power
– Wide Supply Voltage Range
• Normal Operation: 1.8 to 3.8 V
• External Regulator Mode: 1.7 to 1.95 V
– Active-Mode RX: 5.9 mA
– Active-Mode TX at 0 dBm: 6.1 mA
– Active-Mode TX at +5 dBm: 9.1 mA
– Active-Mode MCU: 61 µA/MHz
– Active-Mode MCU: 48.5 CoreMark/mA
– Active-Mode Sensor Controller: 8.2 µA/MHz
– Standby: 1 µA (RTC Running and RAM/CPU
Retention)
– Shutdown: 100 nA (Wake Up on External
Events)
• RF Section
– 2.4-GHz RF Transceiver Compatible With IEEE
802.15.4 PHY and MAC
– Excellent Receiver Sensitivity (–100 dBm),
Selectivity, and Blocking Performance
– Link budget of 105 dB
– Programmable Output Power up to +5 dBm
– Single-Ended or Differential RF Interface
– Suitable for Systems Targeting Compliance With
Worldwide Radio Frequency Regulations
• ETSI EN 300 328 (Europe)
• EN 300 440 Class 2 (Europe)
• FCC CFR47 Part 15 (US)
• ARIB STD-T66 (Japan)
• Tools and Development Environment
– Full-Feature and Low-Cost Development Kits
– Multiple Reference Designs for Different RF
Configurations
– Packet Sniffer PC Software
– Sensor Controller Studio
– RemoTI™ Target Emulator
– SmartRF™ Studio
– SmartRF Flash Programmer 2
– IAR Embedded Workbench® for ARM
– Code Composer Studio™
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CC2620
SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
1.2
•
•
•
•
Applications
Remote Controls
Set-Top Boxes
TVs
Media Players
1.3
www.ti.com
•
•
•
•
DVDs
OTTs
Consumer Electronics
HID Applications
Description
The CC2620 device is a wireless MCU targeting ZigBee® RF4CE remote control applications, both
controller and target node.
The device is a member of the CC26xx family of cost-effective, ultralow power, 2.4-GHz RF devices. Very
low active RF and MCU current and low-power mode current consumption provide excellent battery
lifetime and allow for operation on small coin cell batteries and in energy-harvesting applications.
The CC2620 device contains a 32-bit ARM Cortex-M3 processor that runs at 48 MHz as the main
processor and a rich peripheral feature set that includes a unique ultralow power sensor controller. This
sensor controller is ideal for interfacing external sensors and for collecting analog and digital data
autonomously while the rest of the system is in sleep mode. Thus, the CC2620 device is ideal for ZigBee
RF4CE remote controls with features like voice, motion, RF-IR hybrid remotes, and qwerty keyboards and
STB/target nodes with capacitive touch.
The IEEE 802.15.4 MAC is embedded into ROM and runs partly on an ARM Cortex-M0 processor. This
architecture improves overall system performance and power consumption and frees up flash memory for
the application.
Software stack support for this device includes: ZigBee RF4CE stack (RemoTI) which is available free of
charge from www.ti.com.
Device Information (1)
(1)
2
PART NUMBER
PACKAGE
BODY SIZE (NOM)
CC2620F128RGZ
VQFN (48)
7.00 mm × 7.00 mm
CC2620F128RSM
VQFN (32)
4.00 mm × 4.00 mm
For more information, see Section 9, Mechanical Packaging and Orderable Information.
Device Overview
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CC2620
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1.4
SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
Functional Block Diagram
Figure 1-1 shows a block diagram for the CC2620.
SimpleLinkTM CC26xx wireless MCU
RF core
cJTAG
Main CPU
ROM
ARM®
Cortex®-M3
ADC
ADC
128KB
Flash
Digital PLL
DSP modem
8KB
cache
4KB
SRAM
ARM®
20KB
SRAM
Cortex®-M0
ROM
Sensor controller
General peripherals / modules
I2C
4× 32-bit Timers
UART
2× SSI (SPI, µW, TI)
Sensor controller
engine
12-bit ADC, 200 ks/s
I2S
Watchdog timer
2x comparator
10 / 15 / 31 GPIOs
TRNG
SPI-I2C digital sensor IF
AES
Temp. / batt. monitor
Constant current source
32 ch. µDMA
RTC
Time-to-digital converter
2KB SRAM
DC-DC converter
Copyright © 2016, Texas Instruments Incorporated
Figure 1-1. Block Diagram
Device Overview
Copyright © 2015–2016, Texas Instruments Incorporated
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3
CC2620
SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
www.ti.com
Table of Contents
1
2
3
Device Overview ......................................... 1
1.1
Features .............................................. 1
1.2
Applications ........................................... 2
1.3
Description ............................................ 2
1.4
Functional Block Diagram ............................ 3
Revision History ......................................... 5
Device Comparison ..................................... 6
Related Products ..................................... 6
3.1
4
Terminal Configuration and Functions .............. 7
........................ 7
4.2
Signal Descriptions – RGZ Package ................. 7
4.3
Pin Diagram – RSM Package ........................ 9
4.4
Signal Descriptions – RSM Package ................. 9
Specifications ........................................... 11
5.1
Absolute Maximum Ratings ......................... 11
5.2
ESD Ratings ........................................ 11
5.3
Recommended Operating Conditions ............... 11
5.4
Power Consumption Summary...................... 12
5.5
General Characteristics ............................. 12
4.1
5
Pin Diagram – RGZ Package
5.6
IEEE 802.15.4 (Offset Q-PSK DSSS, 250 kbps) –
RX ................................................... 13
IEEE 802.15.4 (Offset Q-PSK DSSS, 250 kbps) –
TX ................................................... 13
5.7
5.8
.............
32.768-kHz Crystal Oscillator (XOSC_LF) ..........
48-MHz RC Oscillator (RCOSC_HF) ...............
32-kHz RC Oscillator (RCOSC_LF).................
ADC Characteristics.................................
Temperature Sensor ................................
Battery Monitor ......................................
Continuous Time Comparator .......................
Low-Power Clocked Comparator ...................
Programmable Current Source .....................
Synchronous Serial Interface (SSI) ................
DC Characteristics ..................................
Thermal Resistance Characteristics ................
24-MHz Crystal Oscillator (XOSC_HF)
5.9
5.10
5.11
5.12
5.13
5.14
5.15
5.16
5.17
5.18
5.19
5.20
4
6
7
...............................
...........................
5.23 Typical Characteristics ..............................
Detailed Description ...................................
6.1
Overview ............................................
6.2
Functional Block Diagram ...........................
6.3
Main CPU ...........................................
6.4
RF Core .............................................
6.5
Sensor Controller ...................................
6.6
Memory ..............................................
6.7
Debug ...............................................
6.8
Power Management .................................
6.9
Clock Systems ......................................
6.10 General Peripherals and Modules ..................
6.11 Voltage Supply Domains ............................
6.12 System Architecture .................................
Application, Implementation, and Layout .........
7.1
Application Information ..............................
5.21
Timing Requirements
5.22
Switching Characteristics
7.2
8
22
22
23
27
27
27
28
28
29
30
30
31
32
32
33
33
34
34
4 × 4 External Single-ended (4XS) Application
Circuit ............................................... 36
Device and Documentation Support ............... 38
8.1
Device Nomenclature ............................... 38
8.2
Tools and Software
14
8.3
Documentation Support ............................. 40
.................................
39
14
8.4
Texas Instruments Low-Power RF Website
15
8.5
Low-Power RF eNewsletter ......................... 40
15
8.6
Community Resources .............................. 40
15
8.7
Additional Information ............................... 41
17
8.8
Trademarks.......................................... 41
17
8.9
Electrostatic Discharge Caution ..................... 41
17
8.10
Export Control Notice
18
8.11
Glossary ............................................. 41
18
9
........
...............................
40
41
18
Mechanical Packaging and Orderable
Information .............................................. 41
20
9.1
Packaging Information
..............................
41
21
Table of Contents
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CC2620
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SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
2 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from January 20, 2016 to July 5, 2016
•
•
•
•
Page
Added split VDDS supply rail feature .............................................................................................. 1
Added option for up to 80-Ω ESR when CL is 6 pF or lower .................................................................. 14
Added tolerance for RCOSC_LF and RTC accuracy content ................................................................ 15
Added Figure 5-21, Supply Current vs Temperature .......................................................................... 24
Changes from December 2, 2015 to January 19, 2016
•
•
•
•
•
Page
Updated the Soc ADC internal voltage reference specification in Section 5.12 ...........................................
Moved all SSI parameters to Section 5.18 ......................................................................................
Added 0-dBm setting to the TX Current Consumption vs Supply Voltage (VDDS) graph ................................
Changed Figure 5-11, Receive Mode Current vs Supply Voltage (VDDS) .................................................
Changed the errata listed in Section 8.3 .........................................................................................
Changes from February 22, 2015 to December 2, 2015
•
•
•
•
•
•
•
•
•
•
•
15
18
23
23
40
Page
Removed RHB package option from CC2620 .................................................................................... 6
Added motional inductance recommendation to the 24-MHz XOSC table ................................................. 14
Added SPI timing parameters ..................................................................................................... 18
Added VOH and VOL min and max values for 4-mA and 8-mA load ....................................................... 20
Added min and max values for VIH and VIL .................................................................................... 21
Added IEEE 802.15.4 Sensitivity vs Channel Frequency ...................................................................... 23
Added RF Output Power vs Channel Frequency ............................................................................... 23
Added Figure 5-11, Receive Mode Current vs Supply Voltage (VDDS) ..................................................... 23
Changed Figure 5-20, SoC ADC ENOB vs Sampling Frequency (Input Frequency = FS / 10) .......................... 24
Clarified Brown Out Detector status and functionality in the Power Modes table. ......................................... 31
Added application circuit schematics and layout for 5XD and 4XS .......................................................... 34
Revision History
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5
CC2620
SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
www.ti.com
3 Device Comparison
Table 3-1. Device Family Overview
DEVICE
PHY SUPPORT
FLASH
(KB)
RAM (KB)
GPIO
PACKAGE (1)
CC2650F128xxx
Multi-Protocol (2)
128
20
31, 15, 10
RGZ, RHB, RSM
CC2640F128xxx
Bluetooth low energy (Normal)
128
20
31, 15, 10
RGZ, RHB, RSM
CC2630F128xxx
IEEE 802.15.4 Zigbee(/6LoWPAN)
128
20
31, 15, 10
RGZ, RHB, RSM
CC2620F128xxx
IEEE 802.15.4 (RF4CE)
128
20
31, 10
RGZ, RSM
(1)
(2)
3.1
Package designator replaces the xxx in device name to form a complete device name, RGZ is 7-mm × 7-mm VQFN48, RHB is
5-mm × 5-mm VQFN32, and RSM is 4-mm × 4-mm VQFN32.
The CC2650 device supports all PHYs and can be reflashed to run all the supported standards.
Related Products
Wireless Connectivity The wireless connectivity portfolio offers a wide selection of low power RF
solutions suitable for a broad range of application. The offerings range from fully customized
solutions to turn key offerings with pre-certified hardware and software (protocol).
Sub-1 GHz Long-range, low power wireless connectivity solutions are offered in a wide range of Sub-1
GHz ISM bands.
Companion Products Review products that are frequently purchased or used in conjunction with this
product.
SimpleLink™ CC2650 Wireless MCU LaunchPad™ Kit The CC2650 LaunchPad kit brings easy
Bluetooth® Smart connectivity to the LaunchPad kit ecosystem with the SimpleLink ultra-low
power CC26xx family of devices. This LaunchPad kit also supports development for multiprotocol support for the SimpleLink multi-standard CC2650 wireless MCU and the rest of
CC26xx family of products: CC2630 wireless MCU for ZigBee®/6LoWPAN and CC2640
wireless MCU for Bluetooth® Smart.
Reference Designs for CC2620 TI Designs Reference Design Library is a robust reference design library
spanning analog, embedded processor and connectivity. Created by TI experts to help you
jump-start your system design, all TI Designs include schematic or block diagrams, BOMs
and design files to speed your time to market. Search and download designs at
ti.com/tidesigns.
6
Device Comparison
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SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
4 Terminal Configuration and Functions
25 JTAG_TCKC
26 DIO_16
27 DIO_17
28 DIO_18
29 DIO_19
30 DIO_20
31 DIO_21
32 DIO_22
33 DCDC_SW
34 VDDS_DCDC
35 RESET_N
Pin Diagram – RGZ Package
36 DIO_23
4.1
DIO_24 37
24 JTAG_TMSC
DIO_25 38
23 DCOUPL
DIO_26 39
22 VDDS3
DIO_27 40
21 DIO_15
DIO_28 41
20 DIO_14
DIO_29 42
19 DIO_13
DIO_30 43
18 DIO_12
VDDS 44
17 DIO_11
VDDR 45
16 DIO_10
X24M_N 46
15 DIO_9
X24M_P 47
14 DIO_8
13 VDDS2
Note:
DIO_7 12
9
DIO_4
DIO_6 11
8
DIO_5 10
7
5
DIO_0
DIO_3
4
X32K_Q2
DIO_2
3
X32K_Q1
6
2
RF_N
DIO_1
1
RF_P
VDDR_RF 48
I/O pins marked in bold have high drive capabilities. I/O pins marked in italics have analog capabilities.
Figure 4-1. RGZ Package
48-Pin VQFN
(7-mm × 7-mm) Pinout, 0.5-mm Pitch
4.2
Signal Descriptions – RGZ Package
Table 4-1. Signal Descriptions – RGZ Package
NAME
NO.
TYPE
DESCRIPTION
DCDC_SW
33
Power
Output from internal DC-DC (1)
DCOUPL
23
Power
1.27-V regulated digital-supply decoupling capacitor (2)
DIO_0
5
Digital I/O
GPIO, Sensor Controller
DIO_1
6
Digital I/O
GPIO, Sensor Controller
DIO_2
7
Digital I/O
GPIO, Sensor Controller
DIO_3
8
Digital I/O
GPIO, Sensor Controller
DIO_4
9
Digital I/O
GPIO, Sensor Controller
DIO_5
10
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_6
11
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_7
12
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_8
14
Digital I/O
GPIO
DIO_9
15
Digital I/O
GPIO
DIO_10
16
Digital I/O
GPIO
(1)
(2)
See technical reference manual (listed in Section 8.3) for more details.
Do not supply external circuitry from this pin.
Terminal Configuration and Functions
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CC2620
SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
www.ti.com
Table 4-1. Signal Descriptions – RGZ Package (continued)
NAME
NO.
TYPE
DIO_11
17
Digital I/O
GPIO
DIO_12
18
Digital I/O
GPIO
DIO_13
19
Digital I/O
GPIO
DIO_14
20
Digital I/O
GPIO
DIO_15
21
Digital I/O
GPIO
DIO_16
26
Digital I/O
GPIO, JTAG_TDO, high-drive capability
DIO_17
27
Digital I/O
GPIO, JTAG_TDI, high-drive capability
DIO_18
28
Digital I/O
GPIO
DIO_19
29
Digital I/O
GPIO
DIO_20
30
Digital I/O
GPIO
DIO_21
31
Digital I/O
GPIO
DIO_22
32
Digital I/O
GPIO
DIO_23
36
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_24
37
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_25
38
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_26
39
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_27
40
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_28
41
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_29
42
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_30
43
Digital/Analog I/O
GPIO, Sensor Controller, Analog
JTAG_TMSC
24
Digital I/O
JTAG TMSC, high-drive capability
JTAG_TCKC
25
Digital I/O
JTAG TCKC
RESET_N
35
Digital input
RF_P
1
RF I/O
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
RF_N
2
RF I/O
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
VDDR
45
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC-DC (2) (3)
VDDR_RF
48
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC-DC (2) (4)
VDDS
44
Power
1.8-V to 3.8-V main chip supply (1)
VDDS2
13
Power
1.8-V to 3.8-V DIO supply (1)
VDDS3
22
Power
1.8-V to 3.8-V DIO supply (1)
VDDS_DCDC
34
Power
1.8-V to 3.8-V DC-DC supply
X32K_Q1
3
Analog I/O
32-kHz crystal oscillator pin 1
X32K_Q2
4
Analog I/O
32-kHz crystal oscillator pin 2
X24M_N
46
Analog I/O
24-MHz crystal oscillator pin 1
X24M_P
47
Analog I/O
24-MHz crystal oscillator pin 2
EGP
(3)
(4)
8
Power
DESCRIPTION
Reset, active-low. No internal pullup.
Ground – Exposed Ground Pad
If internal DC-DC is not used, this pin is supplied internally from the main LDO.
If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO.
Terminal Configuration and Functions
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17 VSS
18 DCDC_SW
19 VDDS_DCDC
20 VSS
21 RESET_N
22 DIO_5
23 DIO_6
Pin Diagram – RSM Package
24 DIO_7
4.3
SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
DIO_8 25
16 DIO_4
DIO_9 26
15 DIO_3
VDDS 27
14 JTAG_TCKC
VDDR 28
13 JTAG_TMSC
VSS 29
12 DCOUPL
X24M_N 30
11 VDDS2
X24M_P 31
10 DIO_2
Note:
5
6
7
8
X32K_Q1
X32K_Q2
VSS
DIO_0
3
VSS
4
2
RF_N
RX_TX
1
9
RF_P
VDDR_RF 32
DIO_1
I/O pins marked in bold have high drive capabilities. I/O pins marked in italics have analog capabilities.
Figure 4-2. RSM Package
32-Pin VQFN
(4-mm × 4-mm) Pinout, 0.4-mm Pitch
4.4
Signal Descriptions – RSM Package
Table 4-2. Signal Descriptions – RSM Package
NAME
NO.
TYPE
DESCRIPTION
DCDC_SW
18
Power
Output from internal DC-DC.
(1.7-V to 1.95-V operation)
DCOUPL
12
Power
1.27-V regulated digital-supply decoupling capacitor (2)
DIO_0
8
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_1
9
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_2
10
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_3
15
Digital I/O
GPIO, High drive capability, JTAG_TDO
DIO_4
16
Digital I/O
GPIO, High drive capability, JTAG_TDI
DIO_5
22
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_6
23
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_7
24
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_8
25
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_9
26
Digital/Analog I/O
GPIO, Sensor Controller, Analog
JTAG_TMSC
13
Digital I/O
JTAG TMSC
JTAG_TCKC
14
Digital I/O
JTAG TCKC
RESET_N
21
Digital Input
RF_N
2
RF I/O
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
RF_P
1
RF I/O
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
(1)
(2)
(1)
. Tie to ground for external regulator mode
Reset, active-low. No internal pullup.
See technical reference manual (listed in Section 8.3) for more details.
Do not supply external circuitry from this pin.
Terminal Configuration and Functions
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SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
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Table 4-2. Signal Descriptions – RSM Package (continued)
NAME
NO.
TYPE
DESCRIPTION
RX_TX
4
RF I/O
Optional bias pin for the RF LNA
VDDR
28
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC-DC.
(2) (3)
(2) (4)
VDDR_RF
32
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC-DC
VDDS
27
Power
1.8-V to 3.8-V main chip supply (1)
VDDS2
11
Power
1.8-V to 3.8-V GPIO supply (1)
VDDS_DCDC
19
Power
1.8-V to 3.8-V DC-DC supply. Tie to ground for external regulator mode
(1.7-V to 1.95-V operation).
3, 7, 17, 20,
29
Power
X32K_Q1
5
Analog I/O
32-kHz crystal oscillator pin 1
X32K_Q2
6
Analog I/O
32-kHz crystal oscillator pin 2
X24M_N
30
Analog I/O
24-MHz crystal oscillator pin 1
X24M_P
31
Analog I/O
24-MHz crystal oscillator pin 2
VSS
EGP
(3)
(4)
10
Power
Ground
Ground – Exposed Ground Pad
If internal DC-DC is not used, this pin is supplied internally from the main LDO.
If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO.
Terminal Configuration and Functions
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SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
5 Specifications
5.1
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN
MAX
Supply voltage (VDDS, VDDS2,
and VDDS3)
VDDR supplied by internal DC-DC regulator or
internal GLDO. VDDS_DCDC connected to VDDS on
PCB.
UNIT
–0.3
4.1
V
Supply voltage (VDDS (3) and
VDDR)
External regulator mode (VDDS and VDDR pins
connected on PCB)
–0.3
2.25
V
Voltage on any digital pin (4) (5)
–0.3
VDDSx + 0.3, max 4.1
V
Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X24M_N and X24M_P
–0.3
VDDR + 0.3, max 2.25
V
Voltage scaling enabled
–0.3
VDDS
Voltage scaling disabled, internal reference
–0.3
1.49
Voltage scaling disabled, VDDS as reference
–0.3
VDDS / 2.9
Storage temperature
–40
150
Voltage on ADC input (Vin)
Input RF level
5
Tstg
(1)
(2)
(3)
(4)
(5)
°C
ESD Ratings
VALUE
VESD
5.3
dBm
All voltage values are with respect to ground, unless otherwise noted.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
In external regulator mode, VDDS2 and VDDS3 must be at the same potential as VDDS.
Including analog-capable DIO.
Each pin is referenced to a specific VDDSx (VDDS, VDDS2 or VDDS3). For a pin-to-VDDS mapping table, see Table 6-3.
5.2
(1)
(2)
V
Electrostatic discharge
(ESD) performance
Human body model (HBM), per ANSI/ESDA/JEDEC
JS001 (1)
Charged device model (CDM), per JESD22-C101 (2)
All pins
±2500
RF pins
±750
Non-RF pins
±750
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
Ambient temperature range
Operating supply voltage
(VDDS and VDDR), external
regulator mode
For operation in 1.8-V systems
(VDDS and VDDR pins connected on PCB, internal DCDC cannot be used)
Operating supply voltage VDDS For operation in battery-powered and 3.3-V systems
(internal DC-DC can be used to minimize power
Operating supply voltages
consumption)
VDDS2 and VDDS3
MIN
MAX
–40
85
°C
1.7
1.95
V
1.8
3.8
V
0.7 × VDDS, min 1.8
3.8
V
Specifications
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UNIT
11
CC2620
SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
5.4
www.ti.com
Power Consumption Summary
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V with internal DC-DC converter, unless
otherwise noted.
PARAMETER
Icore
Core current consumption
TEST CONDITIONS
MIN
TYP
Reset. RESET_N pin asserted or VDDS below
Power-on-Reset threshold
100
Shutdown. No clocks running, no retention
150
Standby. With RTC, CPU, RAM and (partial)
register retention. RCOSC_LF
1
Standby. With RTC, CPU, RAM and (partial)
register retention. XOSC_LF
1.2
Standby. With Cache, RTC, CPU, RAM and
(partial) register retention. RCOSC_LF
2.5
Standby. With Cache, RTC, CPU, RAM and
(partial) register retention. XOSC_LF
2.7
Idle. Supply Systems and RAM powered.
550
(1)
nA
µA
5.9
Radio RX (2)
6.1
(1)
6.1
Radio TX, 5-dBm output power (2)
9.1
Radio TX, 0-dBm output power
UNIT
1.45 mA +
31 µA/MHz
Active. Core running CoreMark
Radio RX
MAX
mA
Peripheral Current Consumption (Adds to core current Icore for each peripheral unit activated) (3)
Iperi
(1)
(2)
(3)
5.5
Peripheral power domain
Delta current with domain enabled
20
µA
Serial power domain
Delta current with domain enabled
13
µA
RF Core
Delta current with power domain enabled, clock
enabled, RF core idle
237
µA
µDMA
Delta current with clock enabled, module idle
130
µA
Timers
Delta current with clock enabled, module idle
113
µA
I2C
Delta current with clock enabled, module idle
12
µA
I2S
Delta current with clock enabled, module idle
36
µA
SSI
Delta current with clock enabled, module idle
93
µA
UART
Delta current with clock enabled, module idle
164
µA
Single-ended RF mode is optimized for size and power consumption. Measured on CC2650EM-4XS.
Differential RF mode is optimized for RF performance. Measured on CC2650EM-5XD.
Iperi is not supported in Standby or Shutdown.
General Characteristics
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FLASH MEMORY
Supported flash erase cycles before
failure
Flash page/sector erase current
100
Average delta current
12.6
4
KB
Average delta current, 4 bytes at a time
8.15
mA
8
ms
8
µs
Flash page/sector size
Flash write current
Flash page/sector erase time (1)
Flash write time
(1)
12
(1)
k Cycles
4 bytes at a time
mA
This number is dependent on Flash aging and will increase over time and erase cycles.
Specifications
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5.6
SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
IEEE 802.15.4 (Offset Q-PSK DSSS, 250 kbps) – RX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Receiver sensitivity
Differential mode. Measured at the CC2650EM-5XD
SMA connector, PER = 1%
–100
dBm
Receiver sensitivity
Single-ended mode. Measured on CC2650EM-4XS,
at the SMA connector, PER = 1%
–97
dBm
Receiver saturation
Measured at the CC2650EM-5XD SMA connector,
PER = 1%
+4
dBm
Adjacent channel rejection
Wanted signal at –82 dBm, modulated interferer at
±5 MHz, PER = 1%
39
dB
Alternate channel rejection
Wanted signal at –82 dBm, modulated interferer at
±10 MHz, PER = 1%
52
dB
Channel rejection, ±15 MHz or
more
Wanted signal at –82 dBm, undesired signal is IEEE
802.15.4 modulated channel, stepped through all
channels 2405 to 2480 MHz, PER = 1%
57
dB
Blocking and desensitization,
5 MHz from upper band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1%
64
dB
Blocking and desensitization,
10 MHz from upper band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1%
64
dB
Blocking and desensitization,
20 MHz from upper band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1%
65
dB
Blocking and desensitization,
50 MHz from upper band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1%
68
dB
Blocking and desensitization,
–5 MHz from lower band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1%
63
dB
Blocking and desensitization,
–10 MHz from lower band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1%
63
dB
Blocking and desensitization,
–20 MHz from lower band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1%
65
dB
Blocking and desensitization,
–50 MHz from lower band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1%
67
dB
Spurious emissions, 30 MHz to
1000 MHz
Conducted measurement in a 50-Ω single-ended
load. Suitable for systems targeting compliance with
EN 300 328, EN 300 440 class 2, FCC CFR47, Part
15 and ARIB STD-T-66
–71
dBm
Spurious emissions, 1 GHz to
12.75 GHz
Conducted measurement in a 50 Ω single-ended
load. Suitable for systems targeting compliance with
EN 300 328, EN 300 440 class 2, FCC CFR47, Part
15 and ARIB STD-T-66
–62
dBm
Frequency error tolerance
Difference between the incoming carrier frequency
and the internally generated carrier frequency
>200
ppm
Symbol rate error tolerance
Difference between incoming symbol rate and the
internally generated symbol rate
>1000
ppm
RSSI dynamic range
RSSI accuracy
5.7
100
dB
±4
dB
IEEE 802.15.4 (Offset Q-PSK DSSS, 250 kbps) – TX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Output power, highest setting
Delivered to a single-ended 50-Ω load through a balun
5
dBm
Output power, highest setting
Measured on CC2650EM-4XS, delivered to a singleended 50-Ω load
2
dBm
Output power, lowest setting
Delivered to a single-ended 50-Ω load through a balun
–21
dBm
Error vector magnitude
At maximum output power
2%
Specifications
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IEEE 802.15.4 (Offset Q-PSK DSSS, 250 kbps) – TX (continued)
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
Spurious emission conducted
measurement
MIN
TYP
f < 1 GHz, outside restricted bands
–43
f < 1 GHz, restricted bands ETSI
–65
f < 1 GHz, restricted bands FCC
–76
f > 1 GHz, including harmonics
–46
MAX
UNIT
dBm
Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328
and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan)
5.8
24-MHz Crystal Oscillator (XOSC_HF)
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. (1)
PARAMETER
TEST CONDITIONS
ESR Equivalent series resistance (2)
ESR Equivalent series resistance
LM Motional inductance
MIN
6 pF < CL ≤ 9 pF
(2)
CL Crystal load capacitance (2)
80
Ω
< 1.6 × 10
/ CL
2
H
9
pF
24
MHz
–40
40
Start-up time (3) (5)
5.9
Ω
5
Crystal frequency tolerance (2) (4)
(5)
UNIT
60
–24
Crystal frequency (2) (3)
(1)
(2)
(3)
(4)
MAX
20
5 pF < CL ≤ 6 pF
Relates to load capacitance
(CL in Farads)
(2)
TYP
ppm
150
µs
Probing or otherwise stopping the XTAL while the DC-DC converter is enabled may cause permanent damage to the device.
The crystal manufacturer's specification must satisfy this requirement
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V
Includes initial tolerance of the crystal, drift over temperature, ageing and frequency pulling due to incorrect load capacitance. As per
IEEE 802.15.4 specification.
Kick-started based on a temperature and aging compensated RCOSC_HF using precharge injection.
32.768-kHz Crystal Oscillator (XOSC_LF)
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
Crystal frequency (1)
ESR Equivalent series resistance
(1)
30
CL Crystal load capacitance (1)
(1)
14
TYP
MAX
32.768
6
UNIT
kHz
100
kΩ
12
pF
The crystal manufacturer's specification must satisfy this requirement
Specifications
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SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
5.10 48-MHz RC Oscillator (RCOSC_HF)
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
Frequency
UNIT
48
Uncalibrated frequency accuracy
±1%
Calibrated frequency accuracy (1)
±0.25%
Start-up time
(1)
MAX
MHz
5
µs
Accuracy relative to the calibration source (XOSC_HF).
5.11 32-kHz RC Oscillator (RCOSC_LF)
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
Calibrated frequency (1)
32.8
Temperature coefficient
50
(1)
MAX
UNIT
kHz
ppm/°C
The frequency accuracy of the Real Time Clock (RTC) is not directly dependent on the frequency accuracy of the 32-kHz RC Oscillator.
The RTC can be calibrated to an accuracy within ±500 ppm of 32.768 kHz by measuring the frequency error of RCOSC_LF relative to
XOSC_HF and compensating the RTC tick speed. The procedure is explained in Running Bluetooth® Low Energy on CC2640 Without
32 kHz Crystal.
5.12 ADC Characteristics
Tc = 25°C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted. (1)
PARAMETER
TEST CONDITIONS
Input voltage range
MIN
TYP
0
Resolution
VDDS
12
Sample rate
DNL (3)
INL
(4)
ENOB
Internal 4.3-V equivalent reference
2
LSB
Gain error
Internal 4.3-V equivalent reference (2)
2.4
LSB
>–1
LSB
±3
LSB
Differential nonlinearity
Integral nonlinearity
Effective number of bits
Internal 4.3-V equivalent reference (2), 200 ksps,
9.6-kHz input tone
9.8
VDDS as reference, 200 ksps, 9.6-kHz input tone
10
Signal-to-noise
and
Distortion ratio
Spurious-free dynamic
range
Bits
11.1
(2)
, 200 ksps,
Total harmonic distortion VDDS as reference, 200 ksps, 9.6-kHz input tone
–65
–69
dB
–71
Internal 4.3-V equivalent reference (2), 200 ksps,
9.6-kHz input tone
60
VDDS as reference, 200 ksps, 9.6-kHz input tone
63
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
69
Internal 4.3-V equivalent reference
9.6-kHz input tone
(1)
(2)
(3)
(4)
ksps
Offset
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
SFDR
V
Bits
200
Internal 4.3-V equivalent reference
9.6-kHz input tone
SINAD,
SNDR
UNIT
(2)
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
THD
MAX
dB
(2)
, 200 ksps,
67
VDDS as reference, 200 ksps, 9.6-kHz input tone
72
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
73
dB
Using IEEE Std 1241™-2010 for terminology and test methods.
Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V.
No missing codes. Positive DNL typically varies from +0.3 to +3.5, depending on device (see Figure 5-22).
For a typical example, see Figure 5-23.
Specifications
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ADC Characteristics (continued)
Tc = 25°C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1)
PARAMETER
(5)
16
TEST CONDITIONS
MIN
TYP
50
MAX
UNIT
clockcycles
Conversion time
Serial conversion, time-to-output, 24-MHz clock
Current consumption
Internal 4.3-V equivalent reference (2)
0.66
mA
Current consumption
VDDS as reference
0.75
mA
Reference voltage
Equivalent fixed internal reference (input voltage scaling
enabled). For best accuracy, the ADC conversion should
be initiated through the TIRTOS API in order to include the
gain/offset compensation factors stored in FCFG1.
4.3 (2) (5)
V
Reference voltage
Fixed internal reference (input voltage scaling disabled).
For best accuracy, the ADC conversion should be initiated
through the TIRTOS API in order to include the gain/offset
compensation factors stored in FCFG1. This value is
derived from the scaled value (4.3V) as follows:
Vref=4.3V*1408/4095
1.48
V
Reference voltage
VDDS as reference (Also known as RELATIVE) (input
voltage scaling enabled)
VDDS
V
Reference voltage
VDDS as reference (Also known as RELATIVE) (input
voltage scaling disabled)
VDDS /
2.82 (5)
V
Input Impedance
200 ksps, voltage scaling enabled. Capacitive input, Input
impedance depends on sampling frequency and sampling
time
>1
MΩ
Applied voltage must be within absolute maximum ratings (Section 5.1) at all times.
Specifications
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SWRS178C – FEBRUARY 2015 – REVISED JULY 2016
5.13 Temperature Sensor
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
Resolution
TYP
MAX
4
Range
UNIT
°C
–40
85
°C
Accuracy
±5
°C
Supply voltage coefficient (1)
3.2
°C/V
(1)
Automatically compensated when using supplied driver libraries.
5.14 Battery Monitor
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
Resolution
TYP
MAX
50
Range
1.8
Accuracy
UNIT
mV
3.8
13
V
mV
5.15 Continuous Time Comparator
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Input voltage range
0
VDDS
V
External reference voltage
0
VDDS
V
Internal reference voltage
DCOUPL as reference
Offset
Hysteresis
Decision time
Step from –10 mV to 10 mV
Current consumption when enabled (1)
(1)
1.27
V
3
mV