CC2640R2F
CC2640R2F
SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER
2020
SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020
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CC2640R2F
SimpleLink™ Bluetooth® 5.1 Low Energy Wireless MCU
•
1 Features
•
•
•
•
•
Microcontroller
– Powerful Arm® Cortex®-M3
– EEMBC CoreMark® score: 142
– Up to 48-MHz clock speed
– 275KB of nonvolatile memory including 128KB
of in-system Programmable Flash
– Up to 28KB of system SRAM, of which 20KB is
ultra-low leakage SRAM
– 8KB of SRAM for cache or system RAM use
– 2-Pin cJTAG and JTAG debugging
– Supports over-the-air upgrade (OTA)
Ultra-low power sensor controller
– Can run autonomous from the rest of the
system
– 16-bit architecture
– 2KB of ultra-low leakage SRAM for code and
data
Efficient code size architecture, placing drivers,
TI-RTOS, and Bluetooth® software in ROM to
make more Flash available for the application
RoHS-compliant packages
– 2.7-mm × 2.7-mm YFV DSBGA34 (14 GPIOs)
– 4-mm × 4-mm RSM VQFN32 (10 GPIOs)
– 5-mm × 5-mm RHB VQFN32 (15 GPIOs)
– 7-mm × 7-mm RGZ VQFN48 (31 GPIOs)
Peripherals
– All digital peripheral pins can be routed to any
GPIO
– Four general-purpose timer modules
(eight 16-bit or four 32-bit timers, PWM each)
– 12-bit ADC, 200-ksamples/s, 8-channel analog
MUX
– Continuous time comparator
– Ultra-low power analog comparator
– Programmable current source
– UART, I2C, and I2S
– 2× SSI (SPI, MICROWIRE, TI)
– Real-Time Clock (RTC)
– AES-128 security module
– True Random Number Generator (TRNG)
– Support for eight capacitive-sensing buttons
– Integrated temperature sensor
•
•
External system
– On-chip internal DC/DC converter
– Seamless integration with CC2590 and
CC2592 range extenders
– Very few external components
– Pin compatible with the SimpleLink™ CC2640
and CC2650 devices in all VQFN packages
– Pin compatible with the SimpleLink™ CC2642R
and CC2652R devices in 7-mm x 7-mm VQFN
packages
– Pin compatible with the SimpleLink™ CC1350
device in 4-mm × 4-mm and 5-mm × 5-mm
VQFN packages
Low power
– Wide supply voltage range
• Normal operation: 1.8 to 3.8 V
• External regulator mode: 1.7 to 1.95 V
– Active-Mode RX: 5.9 mA
– Active-Mode TX at 0 dBm: 6.1 mA
– Active-Mode TX at +5 dBm: 9.1 mA
– Active-Mode MCU: 61 µA/MHz
– Active-Mode MCU: 48.5 CoreMark/mA
– Active-Mode sensor controller:
0.4mA + 8.2 µA/MHz
– Standby: 1.1 µA (RTC running and RAM/CPU
retention)
– Shutdown: 100 nA (wake up on external
events)
RF section
– 2.4-GHz RF transceiver compatible with
Bluetooth® Low Energy 5.1 and earlier LE
specifications
– Excellent receiver sensitivity (–97 dBm for
BLE), selectivity, and blocking performance
– Link budget of 102 dB for BLE
– Programmable output power up to +5 dBm
– Single-ended or differential RF interface
– Suitable for systems targeting compliance with
worldwide radio frequency regulations
• ETSI EN 300 328 (Europe)
• EN 300 440 Class 2 (Europe)
• FCC CFR47 Part 15 (US)
• ARIB STD-T66 (Japan)
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
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•
Development Tools and Software
– Full-feature development kits
– Multiple reference designs
– SmartRF™ Studio
– Sensor Controller Studio
– IAR Embedded Workbench® for Arm®
– Code Composer Studio™ Integrated
Development Environment (IDE)
– Code Composer Studio™ Cloud IDE
•
•
2 Applications
•
•
Home and Building Automation
– Connected appliances
– Lighting
– Smart locks
– Gateways
– Security Systems
Industrial
– Factory automation
– Asset tracking and management
•
•
– HMI
– Access control
Electronic Point Of Sale (EPOS)
– Electronic Shelf Label (ESL)
Health and Medical
– Electronic thermometers
– SpO2
– Blood glucose monitors and blood pressure
monitors
– Weigh scales
– Hearing aids
Sports and Fitness
– Wearable fitness and activity monitors
– Smart trackers
– Patient monitors
– Fitness machines
HID
– Gaming
– Pointing devices (wireless keyboard and
mouse)
3 Description
The CC2640R2F device is a 2.4 GHz wireless microcontroller (MCU) supporting Bluetooth® 5.1 Low Energy and
Proprietary 2.4 GHz applications. The device is optimized for low-power wireless communication and advanced
sensing in building security systems, HVAC, asset tracking, and medical markets, and applications where
industrial performance is required. The highlighted features of this device include:
• Support for Bluetooth ® 5.1 features: LE Coded PHYs (Long Range), LE 2-Mbit PHY (High Speed),
Advertising Extensions, Multiple Advertisement Sets, as well as backwards compatibility and support for key
features from the Bluetooth ® 5.0 and earlier Low Energy specifications.
• Fully-qualified Bluetooth ® 5.1 software protocol stack included with the SimpleLink™ CC2640R2F Software
Development Kit (SDK) for developing applications on the powerful Arm® Cortex®-M3 processor.
• Longer battery life wireless applications with low standby current of 1.1 µA with full RAM retention.
• Advanced sensing with a programmable, autonomous ultra-low power Sensor Controller CPU with fast wakeup capability. As an example, the sensor controller is capable of 1-Hz ADC sampling at 1 µA system current.
• Dedicated software controlled radio controller (Arm® Cortex®-M0) providing flexible low-power RF transceiver
capability to support multiple physical layers and RF standards, such as real-time localization (RTLS)
technologies.
• Excellent radio sensitivity and robustness (selectivity and blocking) performance for Bluetooth ® Low Energy
(-103 dBm for 125-kbps LE Coded PHY).
The CC2640R2F device is part of the SimpleLink™ microcontroller (MCU) platform, which consists of
Wi-Fi®, Bluetooth ® Low Energy, Thread, ZigBee®, Sub-1 GHz MCUs, and host MCUs that all share a common,
easy-to-use development environment with a single core software development kit (SDK) and rich tool set. A
one-time integration of the SimpleLink™ platform enables you to add any combination of the portfolio’s devices
into your design, allowing 100 percent code reuse when your design requirements change. For more
information, visit SimpleLink™ MCU platform.
Device Information (1)
2
PART NUMBER
PACKAGE
BODY SIZE (NOM)
CC2640R2FRGZ
VQFN (48)
7.00 mm × 7.00 mm
CC2640R2FRHB
VQFN (32)
5.00 mm × 5.00 mm
CC2640R2FRSM
VQFN (32)
4.00 mm × 4.00 mm
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Device Information (1) (continued)
(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
CC2640R2FYFV
DSBGA (34)
2.70 mm × 2.70 mm
For more information, see Section 12.
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4 Functional Block Diagram
Figure 4-1 shows a block diagram for the CC2640R2F device.
SimpleLink CC26xx Wireless MCU
RF Core
cJTAG
Main CPU:
ROM
ADC
ADC
ARM
Cortex-M3
128-KB
Flash
8-KB
cache
Up to 48 MHz
61 µA/MHz
20-KB
SRAM
Digital PLL
DSP modem
ROM
General Peripherals / Modules
2
4-KB
SRAM
ARM
Cortex-M0
Sensor Controller
4× 32-bit Timers
I C
Sensor Controller Engine
UART
2× SSI (SPI, µW, TI)
12-bit ADC, 200 ks/s
I2S
Watchdog Timer
2× Comparator
10 / 14 / 15 / 31 GPIOs
TRNG
2
SPI-I C Digital Sensor IF
AES
Temp. / Batt. Monitor
Constant Current Source
32 ch. µDMA
RTC
Time-to-digital Converter
2-KB SRAM
DC-DC Converter
Copyright © 2016, Texas Instruments Incorporated
Figure 4-1. Block Diagram
4
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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 2
3 Description.......................................................................2
4 Functional Block Diagram.............................................. 4
5 Revision History.............................................................. 6
6 Device Comparison......................................................... 7
6.1 Related Products........................................................ 7
7 Terminal Configuration and Functions..........................8
7.1 Pin Diagram – RGZ Package......................................8
7.2 Signal Descriptions – RGZ Package...........................9
7.3 Pin Diagram – RHB Package....................................11
7.4 Signal Descriptions – RHB Package.........................12
7.5 Pin Diagram – YFV (Chip Scale, DSBGA)
Package...................................................................... 13
7.6 Signal Descriptions – YFV (Chip Scale, DSBGA)
Package...................................................................... 13
7.7 Pin Diagram – RSM Package................................... 15
7.8 Signal Descriptions – RSM Package........................ 16
8 Specifications................................................................ 17
8.1 Absolute Maximum Ratings...................................... 17
8.2 ESD Ratings............................................................. 17
8.3 Recommended Operating Conditions.......................18
8.4 Power Consumption Summary................................. 18
8.5 General Characteristics............................................ 19
8.6 125-kbps Coded (Bluetooth 5) – RX......................... 19
8.7 125-kbps Coded (Bluetooth 5) – TX......................... 20
8.8 500-kbps Coded (Bluetooth 5) – RX......................... 20
8.9 500-kbps Coded (Bluetooth 5) – TX......................... 21
8.10 1-Mbps GFSK (Bluetooth low energy) – RX........... 22
8.11 1-Mbps GFSK (Bluetooth low energy) – TX............23
8.12 2-Mbps GFSK (Bluetooth 5) – RX...........................23
8.13 2-Mbps GFSK (Bluetooth 5) – TX........................... 24
8.14 24-MHz Crystal Oscillator (XOSC_HF)...................24
8.15 32.768-kHz Crystal Oscillator (XOSC_LF)..............24
8.16 48-MHz RC Oscillator (RCOSC_HF)...................... 25
8.17 32-kHz RC Oscillator (RCOSC_LF)........................25
8.18 ADC Characteristics................................................25
8.19 Temperature Sensor............................................... 26
8.20 Battery Monitor........................................................26
8.21 Continuous Time Comparator................................. 27
8.22 Low-Power Clocked Comparator............................ 27
8.23 Programmable Current Source............................... 27
8.24 Synchronous Serial Interface (SSI).........................28
8.25 DC Characteristics.................................................. 29
8.26 Thermal Resistance Characteristics....................... 30
8.27 Timing Requirements.............................................. 30
8.28 Switching Characteristics........................................31
8.29 Typical Characteristics............................................ 32
9 Detailed Description......................................................36
9.1 Overview................................................................... 36
9.2 Functional Block Diagram......................................... 36
9.3 Main CPU..................................................................37
9.4 RF Core.................................................................... 37
9.5 Sensor Controller...................................................... 38
9.6 Memory..................................................................... 39
9.7 Debug....................................................................... 39
9.8 Power Management..................................................39
9.9 Clock Systems.......................................................... 40
9.10 General Peripherals and Modules.......................... 40
9.11 Voltage Supply Domains......................................... 42
9.12 System Architecture................................................42
10 Application, Implementation, and Layout................. 43
10.1 Application Information........................................... 43
10.2 5 × 5 External Differential (5XD) Application
Circuit.......................................................................... 45
10.3 4 × 4 External Single-ended (4XS) Application
Circuit.......................................................................... 47
11 Device and Documentation Support..........................49
11.1 Device Nomenclature..............................................49
11.2 Tools and Software..................................................50
11.3 Documentation Support.......................................... 51
11.4 Texas Instruments Low-Power RF Website............ 51
11.5 Low-Power RF eNewsletter.................................... 51
11.6 Support Resources................................................. 51
11.7 Trademarks............................................................. 51
11.8 Electrostatic Discharge Caution.............................. 51
11.9 Export Control Notice.............................................. 51
11.10 Glossary................................................................ 52
12 Mechanical, Packaging, and Orderable
Information.................................................................... 53
12.1 Packaging Information............................................ 53
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5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (January 2018) to Revision C (September 2020)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Changed intermodulation interferer frequencies in Section 8.12 .....................................................................23
• Changed Figure 8-20 in Section 8.29 .............................................................................................................. 32
• Changed IDLE value for Current in Section 9.8 ...............................................................................................39
6
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6 Device Comparison
Table 6-1. Device Family Overview
(1)
(2)
(3)
Device
PHY Support
Flash (KB)
RAM (KB)
GPIO
Package(1)
CC2640R2Fxxx(2)
Bluetooth low energy
(Normal, High Speed, Long Range)
128
20
31, 15, 14, 10
RGZ, RHB, YFV, RSM
CC2640F128xxx
Bluetooth low energy (Normal)
128
20
31, 15, 10
RGZ, RHB, RSM
CC2650F128xxx
Multi-Protocol(3)
128
20
31, 15, 10
RGZ, RHB, RSM
CC2630F128xxx
IEEE 802.15.4 (/6LoWPAN)
128
20
31, 15, 10
RGZ, RHB, RSM
CC2620F128xxx
IEEE 802.15.4 (RF4CE)
128
20
31, 10
RGZ, RSM
Package designator replaces the xxx in device name to form a complete device name, RGZ is 7-mm × 7-mm VQFN48,
RHB is 5-mm × 5-mm VQFN32, RSM is 4-mm × 4-mm VQFN32, and YFV is 2.7-mm × 2.7-mm DSBGA.
CC2640R2Fxxx devices contain Bluetooth Low Energy Host & Controller libraries in ROM, leaving more of the 128KB Flash memory
available for the customer application when used with supported BLE-Stack software protocol stack releases. Actual use of ROM and
Flash memory by the protocol stack may vary depending on device software configuration. See www.ti.com for more details.
The CC2650 device supports all PHYs and can be reflashed to run all the supported standards.
6.1 Related Products
TI's Wireless
Connectivity
The wireless connectivity portfolio offers a wide selection of low-power RF solutions
suitable for a broad range of applications. The offerings range from fully customized
solutions to turn key offerings with pre-certified hardware and software (protocol).
TI's SimpleLink™ Sub-1
GHz Wireless MCUs
Long-range, low-power wireless connectivity solutions are offered in a wide range
of
Sub-1 GHz ISM bands.
Companion Products
Companion Products
Review products that are frequently purchased or used in conjunction with this
product.
SimpleLink™ CC2640R2
Wireless MCU
LaunchPad™
Development Kit
The CC2640R2 LaunchPad™ development kit brings easy Bluetooth® low energy
(BLE) connection to the LaunchPad ecosystem with the SimpleLink ultra-low power
CC26xx family of devices. Compared to the CC2650 LaunchPad, the CC2640R2
LaunchPad provides the following:
•
•
•
More free flash memory for the user application in the CC2640R2 wireless MCU
Out-of-the-box support for Bluetooth 4.2 specification
4× faster Over-the-Air download speed compared to Bluetooth 4.1
SimpleLink™ Bluetooth
low energy/Multistandard SensorTag
The new SensorTag IoT kit invites you to realize your cloud-connected product
idea. The new SensorTag now includes 10 low-power MEMS sensors in a tiny red
package. And it is expandable with DevPacks to make it easy to add your own
sensors or actuators.
Reference Designs for
CC2640
TI Designs Reference Design Library is a robust reference design library spanning
analog, embedded processor and connectivity. Created by TI experts to help you
jump-start your system design, all TI Designs include schematic or block diagrams,
BOMs, and design files to speed your time to market. Search and download
designs at ti.com/tidesigns.
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7 Terminal Configuration and Functions
25 JTAG_TCKC
26 DIO_16
27 DIO_17
28 DIO_18
29 DIO_19
30 DIO_20
31 DIO_21
32 DIO_22
33 DCDC_SW
34 VDDS_DCDC
35 RESET_N
36 DIO_23
7.1 Pin Diagram – RGZ Package
DIO_24 37
24 JTAG_TMSC
DIO_25 38
23 DCOUPL
DIO_26 39
22 VDDS3
DIO_27 40
21 DIO_15
DIO_28 41
20 DIO_14
DIO_29 42
19 DIO_13
DIO_30 43
18 DIO_12
VDDS 44
17 DIO_11
VDDR 45
16 DIO_10
X24M_N 46
15 DIO_9
X24M_P 47
14 DIO_8
13 VDDS2
4
5
6
7
8
9
X32K_Q2
DIO_0
DIO_1
DIO_2
DIO_3
DIO_4
DIO_7 12
3
X32K_Q1
DIO_6 11
2
RF_N
DIO_5 10
1
RF_P
VDDR_RF 48
Figure 7-1. RGZ Package 48-Pin VQFN (7-mm × 7-mm) Pinout, 0.5-mm Pitch
I/O pins marked in Figure 7-1 in bold have high-drive capabilities; they are the following:
• Pin 10, DIO_5
• Pin 11, DIO_6
• Pin 12, DIO_7
• Pin 24, JTAG_TMSC
• Pin 26, DIO_16
• Pin 27, DIO_17
I/O pins marked in Figure 7-1 in italics have analog capabilities; they are the following:
• Pin 36, DIO_23
• Pin 37, DIO_24
• Pin 38, DIO_25
• Pin 39, DIO_26
• Pin 40, DIO_27
• Pin 41, DIO_28
• Pin 42, DIO_29
• Pin 43, DIO_30
8
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7.2 Signal Descriptions – RGZ Package
Table 7-1. Signal Descriptions – RGZ Package
NAME
NO.
TYPE
DESCRIPTION
DCDC_SW
33
Power
Output from internal DC/DC(1)
DCOUPL
23
Power
1.27-V regulated digital-supply decoupling capacitor(2)
DIO_0
5
Digital I/O
GPIO, Sensor Controller
DIO_1
6
Digital I/O
GPIO, Sensor Controller
DIO_2
7
Digital I/O
GPIO, Sensor Controller
DIO_3
8
Digital I/O
GPIO, Sensor Controller
DIO_4
9
Digital I/O
GPIO, Sensor Controller
DIO_5
10
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_6
11
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_7
12
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_8
14
Digital I/O
GPIO
DIO_9
15
Digital I/O
GPIO
DIO_10
16
Digital I/O
GPIO
DIO_11
17
Digital I/O
GPIO
DIO_12
18
Digital I/O
GPIO
DIO_13
19
Digital I/O
GPIO
DIO_14
20
Digital I/O
GPIO
DIO_15
21
Digital I/O
GPIO
DIO_16
26
Digital I/O
GPIO, JTAG_TDO, high-drive capability
DIO_17
27
Digital I/O
GPIO, JTAG_TDI, high-drive capability
DIO_18
28
Digital I/O
GPIO
DIO_19
29
Digital I/O
GPIO
DIO_20
30
Digital I/O
GPIO
DIO_21
31
Digital I/O
GPIO
DIO_22
32
Digital I/O
GPIO
DIO_23
36
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_24
37
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_25
38
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_26
39
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_27
40
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_28
41
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_29
42
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_30
43
Digital/Analog I/O GPIO, Sensor Controller, Analog
JTAG_TMSC
24
Digital I/O
JTAG TMSC, high-drive capability
JTAG_TCKC
25
Digital I/O
JTAG TCKC(3)
RESET_N
35
Digital input
RF_P
1
RF I/O
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
RF_N
2
RF I/O
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
VDDR
45
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(2) (4)
VDDR_RF
48
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(2) (5)
Reset, active-low. No internal pullup.
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Table 7-1. Signal Descriptions – RGZ Package (continued)
NAME
NO.
TYPE
DESCRIPTION
VDDS
44
Power
1.8-V to 3.8-V main chip supply(1)
VDDS2
13
Power
1.8-V to 3.8-V DIO supply(1)
VDDS3
22
Power
1.8-V to 3.8-V DIO supply(1)
VDDS_DCDC
34
Power
1.8-V to 3.8-V DC/DC supply
X32K_Q1
3
Analog I/O
32-kHz crystal oscillator pin 1
X32K_Q2
4
Analog I/O
32-kHz crystal oscillator pin 2
X24M_N
46
Analog I/O
24-MHz crystal oscillator pin 1
X24M_P
47
Analog I/O
24-MHz crystal oscillator pin 2
EGP
(1)
(2)
(3)
(4)
(5)
10
Power
Ground – Exposed Ground Pad
For more details, see the technical reference manual (listed in Section 11.3).
Do not supply external circuitry from this pin.
For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™
Wireless MCU Technical Reference Manual
If internal DC/DC is not used, this pin is supplied internally from the main LDO.
If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO.
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17 DCDC_SW
18 VDDS_DCDC
19 RESET_N
20 DIO_7
21 DIO_8
22 DIO_9
23 DIO_10
24 DIO_11
7.3 Pin Diagram – RHB Package
DIO_12 25
16 DIO_6
DIO_13 26
15 DIO_5
DIO_14 27
14 JTAG_TCKC
VDDS 28
13 JTAG_TMSC
VDDR 29
12 DCOUPL
X24M_N 30
11 VDDS2
X24M_P 31
10 DIO_4
1
2
3
4
5
6
7
8
RF_N
RX_TX
X32K_Q1
X32K_Q2
DIO_0
DIO_1
DIO_2
9
RF_P
VDDR_RF 32
DIO_3
Figure 7-2. RHB Package 32-Pin VQFN (5-mm × 5-mm) Pinout, 0.5-mm Pitch
I/O pins marked in Figure 7-2 in bold have high-drive capabilities; they are the following:
• Pin 8, DIO_2
• Pin 9, DIO_3
• Pin 10, DIO_4
• Pin 13, JTAG_TMSC
• Pin 15, DIO_5
• Pin 16, DIO_6
I/O pins marked in Figure 7-2 in italics have analog capabilities; they are the following:
• Pin 20, DIO_7
• Pin 21, DIO_8
• Pin 22, DIO_9
• Pin 23, DIO_10
• Pin 24, DIO_11
• Pin 25, DIO_12
• Pin 26, DIO_13
• Pin 27, DIO_14
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7.4 Signal Descriptions – RHB Package
Table 7-2. Signal Descriptions – RHB Package
NAME
NO.
TYPE
DESCRIPTION
DCDC_SW
17
Power
Output from internal DC/DC(1)
DCOUPL
12
Power
1.27-V regulated digital-supply decoupling(2)
DIO_0
6
Digital I/O
GPIO, Sensor Controller
DIO_1
7
Digital I/O
GPIO, Sensor Controller
DIO_2
8
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_3
9
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_4
10
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_5
15
Digital I/O
GPIO, High drive capability, JTAG_TDO
GPIO, High drive capability, JTAG_TDI
DIO_6
16
Digital I/O
DIO_7
20
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_8
21
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_9
22
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_10
23
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_11
24
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_12
25
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_13
26
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_14
27
Digital/Analog I/O
GPIO, Sensor Controller, Analog
JTAG_TMSC
13
Digital I/O
JTAG TMSC, high-drive capability
JTAG_TCKC
14
Digital I/O
JTAG TCKC(3)
RESET_N
19
Digital input
RF_N
2
RF I/O
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
RF_P
1
RF I/O
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
RX_TX
3
RF I/O
Optional bias pin for the RF LNA
VDDR
29
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(4) (2)
VDDR_RF
32
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(2) (5)
VDDS
28
Power
1.8-V to 3.8-V main chip supply(1)
VDDS2
11
Power
1.8-V to 3.8-V GPIO supply(1)
VDDS_DCDC
18
Power
1.8-V to 3.8-V DC/DC supply
X32K_Q1
4
Analog I/O
32-kHz crystal oscillator pin 1
X32K_Q2
5
Analog I/O
32-kHz crystal oscillator pin 2
X24M_N
30
Analog I/O
24-MHz crystal oscillator pin 1
X24M_P
31
Analog I/O
24-MHz crystal oscillator pin 2
EGP
(1)
(2)
(3)
(4)
(5)
12
Power
Reset, active-low. No internal pullup.
Ground – Exposed Ground Pad
See technical reference manual (listed in Section 11.3) for more details.
Do not supply external circuitry from this pin.
For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™
Wireless MCU Technical Reference Manual
If internal DC/DC is not used, this pin is supplied internally from the main LDO.
If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO.
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SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020
7.5 Pin Diagram – YFV (Chip Scale, DSBGA) Package
A1
A2
A3
A4
B1
B2
B3
B4
B5
B6
C1
C2
C3
C4
C5
C6
D1
D2
D3
D4
D5
D6
E1
E2
E3
E4
E5
E6
F1
F2
F3
F4
F5
F6
Figure 7-3. YFV (2.7-mm × 2.7-mm) Pinout, Top View
7.6 Signal Descriptions – YFV (Chip Scale, DSBGA) Package
Table 7-3. Signal Descriptions – YFV Package
NAME
NO.
TYPE
DESCRIPTION
DCDC_SW
D1
Power
Output from internal DC/DC(1)
DCOUPL
F3
Power
1.27-V regulated digital-supply decoupling(2)
DIO_0
C5
Digital I/O
GPIO, Sensor Controller
DIO_1
F6
Digital I/O
GPIO, Sensor Controller
DIO_2
D5
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_3
E5
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_4
F5
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_5
E3
Digital I/O
GPIO, High-drive capability, JTAG_TDO
GPIO, High-drive capability, JTAG_TDI
DIO_6
F1
Digital I/O
DIO_7
D2
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_8
D3
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_9
A1
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_10
C2
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_11
B2
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_12
D4
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_13
B3
Digital/Analog I/O
GPIO, Sensor Controller, Analog
JTAG_TMSC
E4
Digital I/O
JTAG TMSC, high-drive capability
JTAG_TCKC
F2
Digital I/O
JTAG TCKC(3)
RESET_N
E2
Digital input
Reset, active-low. No internal pullup.
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Table 7-3. Signal Descriptions – YFV Package (continued)
NAME
NO.
TYPE
DESCRIPTION
RF_N
B6
RF I/O
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
RF_P
B5
RF I/O
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
VDDR
A3
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(4) (2)
VDDR_RF
B4
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(5) (2)
VDDS
A2
Power
1.8-V to 3.8-V main chip supply(1)
VDDS2
F4
Power
1.8-V to 3.8-V GPIO supply(1)
VDDS_DCDC
C1
Power
1.8-V to 3.8-V DC/DC supply
X32K_Q1
D6
Analog I/O
32-kHz crystal oscillator pin 1
X32K_Q2
E6
Analog I/O
32-kHz crystal oscillator pin 2
X24M_N
C3
Analog I/O
24-MHz crystal oscillator pin 1
C4
Analog I/O
24-MHz crystal oscillator pin 2
A4, B1, C6,
E1
Power
X24M_P
GND
(1)
(2)
(3)
(4)
(5)
14
Ground
For more details, see the technical reference manual (listed in Section 11.3).
Do not supply external circuitry from this pin.
For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™
Wireless MCU Technical Reference Manual
If internal DC/DC is not used, this pin is supplied internally from the main LDO.
If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO.
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17 VSS
18 DCDC_SW
19 VDDS_DCDC
20 VSS
21 RESET_N
22 DIO_5
23 DIO_6
24 DIO_7
7.7 Pin Diagram – RSM Package
DIO_8 25
16 DIO_4
DIO_9 26
15 DIO_3
VDDS 27
14 JTAG_TCKC
VDDR 28
13 JTAG_TMSC
VSS 29
12 DCOUPL
X24M_N 30
11 VDDS2
X24M_P 31
10 DIO_2
1
2
3
4
5
6
7
8
RF_N
VSS
RX_TX
X32K_Q1
X32K_Q2
VSS
DIO_0
9
RF_P
VDDR_RF 32
DIO_1
Figure 7-4. RSM Package 32-Pin VQFN (4-mm × 4-mm) Pinout, 0.4-mm Pitch
I/O pins marked in Figure 7-4 in bold have high-drive capabilities; they are as follows:
• Pin 8, DIO_0
• Pin 9, DIO_1
• Pin 10, DIO_2
• Pin 13, JTAG_TMSC
• Pin 15, DIO_3
• Pin 16, DIO_4
I/O pins marked in Figure 7-4 in italics have analog capabilities; they are as follows:
• Pin 22, DIO_5
• Pin 23, DIO_6
• Pin 24, DIO_7
• Pin 25, DIO_8
• Pin 26, DIO_9
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7.8 Signal Descriptions – RSM Package
Table 7-4. Signal Descriptions – RSM Package
NAME
NO.
TYPE
DESCRIPTION
DCDC_SW
18
Power
Output from internal DC/DC.(1). Tie to ground for external regulator mode
(1.7-V to 1.95-V operation)
DCOUPL
12
Power
1.27-V regulated digital-supply decoupling capacitor(2)
DIO_0
8
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_1
9
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_2
10
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_3
15
Digital I/O
GPIO, High-drive capability, JTAG_TDO
DIO_4
16
Digital I/O
DIO_5
22
Digital/Analog I/O
GPIO, High-drive capability, JTAG_TDI
GPIO, Sensor Controller, Analog
DIO_6
23
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_7
24
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_8
25
Digital/Analog I/O
GPIO, Sensor Controller, Analog
DIO_9
26
Digital/Analog I/O
GPIO, Sensor Controller, Analog
JTAG_TMSC
13
Digital I/O
JTAG TMSC
JTAG_TCKC
14
Digital I/O
JTAG TCKC(3)
RESET_N
21
Digital Input
RF_N
2
RF I/O
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
RF_P
1
RF I/O
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
RX_TX
4
RF I/O
Optional bias pin for the RF LNA
VDDR
28
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC/DC.(2) (4)
VDDR_RF
32
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(2) (5)
VDDS
27
Power
1.8-V to 3.8-V main chip supply(1)
VDDS2
11
Power
1.8-V to 3.8-V GPIO supply(1)
VDDS_DCDC
19
Power
1.8-V to 3.8-V DC/DC supply. Tie to ground for external regulator mode
(1.7-V to 1.95-V operation).
3, 7, 17, 20,
29
Power
Ground
5
Analog I/O
32-kHz crystal oscillator pin 1
X32K_Q2
6
Analog I/O
32-kHz crystal oscillator pin 2
X24M_N
30
Analog I/O
24-MHz crystal oscillator pin 1
X24M_P
31
Analog I/O
24-MHz crystal oscillator pin 2
VSS
X32K_Q1
EGP
(1)
(2)
(3)
(4)
(5)
16
Power
Reset, active-low. No internal pullup.
Ground – Exposed Ground Pad
See technical reference manual (listed in Section 11.3) for more details.
Do not supply external circuitry from this pin.
For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™
Wireless MCU Technical Reference Manual
If internal DC/DC is not used, this pin is supplied internally from the main LDO.
If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO.
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8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN
MAX UNIT
Supply voltage (VDDS, VDDS2,
and VDDS3)
VDDR supplied by internal DC/DC regulator or
internal GLDO. VDDS_DCDC connected to VDDS
on PCB
–0.3
4.1
V
Supply voltage (VDDS(3) and
VDDR)
External regulator mode (VDDS and VDDR pins
connected on PCB)
–0.3
2.25
V
–0.3
VDDSx + 0.3, max 4.1
V
V
Voltage on any digital pin(4) (5)
Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X24M_N and X24M_P
Voltage on ADC input (Vin)
–0.3
VDDR + 0.3, max 2.25
Voltage scaling enabled
–0.3
VDDS
Voltage scaling disabled, internal reference
–0.3
1.49
Voltage scaling disabled, VDDS as reference
–0.3
VDDS / 2.9
Storage temperature
–40
150
Input RF level
Tstg
(1)
(2)
(3)
(4)
(5)
5
V
dBm
°C
All voltage values are with respect to ground, unless otherwise noted.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
In external regulator mode, VDDS2 and VDDS3 must be at the same potential as VDDS.
Including analog-capable DIO.
Each pin is referenced to a specific VDDSx (VDDS, VDDS2 or VDDS3). For a pin-to-VDDS mapping table, see Table 9-3 .
8.2 ESD Ratings
VALUE
VESD
VESD
(1)
(2)
Electrostatic discharge
...
RSM, RHB, and RGZ packages
Electrostatic discharge
...
YFV package
Human body model (HBM), per ANSI/ESDA/
JEDEC JS001(1)
Charged device model (CDM), per JESD22C101(2)
Human body model (HBM), per ANSI/ESDA/
JEDEC JS001(1)
Charged device model (CDM), per JESD22C101(2)
All pins
±2500
RF pins
±500
Non-RF pins
±500
All pins
±1500
RF pins
±500
Non-RF pins
±500
UNIT
V
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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8.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
–40
85
°C
1.7
1.95
V
1.8
3.8
V
For operation in battery-powered and 3.3-V systems
VDDS < 2.7 V
(internal DC/DC can be used to minimize power consumption)
1.8
3.8
V
VDDS ≥ 2.7 V
1.9
3.8
V
Ambient temperature
Operating supply
voltage (VDDS and
VDDR), external
regulator mode
For operation in 1.8-V systems
(VDDS and VDDR pins connected on PCB, internal DC/DC cannot be used)
Operating supply
voltage VDDS
Operating supply
voltages VDDS2 and
VDDS3
Operating supply
voltages VDDS2 and
VDDS3
UNIT
8.4 Power Consumption Summary
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V with internal DC/DC
converter, unless otherwise noted.
PARAMETER
Icore
Core current consumption
TEST CONDITIONS
MIN
TYP
Reset. RESET_N pin asserted or VDDS below
Power-on-Reset threshold
100
Shutdown. No clocks running, no retention
150
Standby. With RTC, CPU, RAM and (partial)
register retention. RCOSC_LF
1.1
Standby. With RTC, CPU, RAM and (partial)
register retention. XOSC_LF
1.3
Standby. With Cache, RTC, CPU, RAM and
(partial) register retention. RCOSC_LF
2.8
Standby. With Cache, RTC, CPU, RAM and
(partial) register retention. XOSC_LF
3.0
Idle. Supply Systems and RAM powered.
µA
5.9
Radio RX(2)
6.1
Radio TX, 0-dBm output
power(1)
6.1
Radio TX, 5-dBm output power(2)
mA
9.1
Peripheral Current Consumption (Adds to core current Icore for each peripheral unit activated)
18
nA
650
Radio RX (1)
(1)
(2)
UNIT
1.45 mA +
31 µA/MHz
Active. Core running CoreMark
Iperi
MAX
(3)
Peripheral power domain
Delta current with domain enabled
50
µA
Serial power domain
Delta current with domain enabled
13
µA
RF Core
Delta current with power domain enabled, clock
enabled, RF core idle
237
µA
µDMA
Delta current with clock enabled, module idle
130
µA
Timers
Delta current with clock enabled, module idle
113
µA
I2C
Delta current with clock enabled, module idle
12
µA
I2S
Delta current with clock enabled, module idle
36
µA
SSI
Delta current with clock enabled, module idle
93
µA
UART
Delta current with clock enabled, module idle
164
µA
Single-ended RF mode is optimized for size and power consumption. Measured on CC2650EM-4XS.
Differential RF mode is optimized for RF performance. Measured on CC2650EM-5XD.
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(3)
SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020
Iperi is not supported in Standby or Shutdown.
8.5 General Characteristics
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FLASH MEMORY
Supported flash erase cycles before
failure(1)
100
k Cycles
Maximum number of write operations
per row before erase(2)
83
write
operations
Years at
105°C
Flash retention
105°C
11.4
Flash page/sector erase current
Average delta current
12.6
4
KB
Average delta current, 4 bytes at a time
8.15
mA
8
ms
8
µs
Flash page/sector size
Flash write current
Flash page/sector erase time(3)
Flash write time(3)
(1)
(2)
(3)
4 bytes at a time
mA
Aborting flash during erase or program modes is not a safe operation.
Each row is 2048 bits (or 256 Bytes) wide.
This number is dependent on Flash aging and will increase over time and erase cycles.
8.6 125-kbps Coded (Bluetooth 5) – RX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Receiver sensitivity
Differential mode. Measured at the CC2650EM-5XD
SMA connector, BER = 10–3
–103
dBm
Receiver saturation
Differential mode. Measured at the CC2650EM-5XD
SMA connector, BER = 10–3
>5
dBm
Frequency error tolerance
Difference between the incoming carrier frequency
and the internally generated carrier frequency
–260
310
kHz
Data rate error tolerance
Difference between incoming data rate and the
internally generated data rate (37-byte packets)
–260
260
ppm
Data rate error tolerance
Difference between incoming data rate and the
internally generated data rate (255-byte packets)
–140
140
ppm
Co-channel rejection (1)
Wanted signal at –79 dBm, modulated interferer in
channel, BER = 10–3
Selectivity, ±1 MHz (1)
–3
dB
Wanted signal at –79 dBm, modulated interferer at ±1
MHz, BER = 10–3
9 / 5(2)
dB
Selectivity, ±2 MHz (1)
Wanted signal at –79 dBm, modulated interferer at ±2
MHz, Image frequency is at –2 MHz, BER = 10–3
43 / 32(2)
dB
Selectivity, ±3 MHz (1)
Wanted signal at –79 dBm, modulated interferer at ±3
MHz, BER = 10–3
47 / 42(2)
dB
Selectivity, ±4 MHz (1)
Wanted signal at –79 dBm, modulated interferer at ±4
MHz, BER = 10–3
46 / 47(2)
dB
Selectivity, ±6 MHz (1)
Wanted signal at –79 dBm, modulated interferer at ±6
MHz, BER = 10–3
49 / 46(2)
dB
50 / 47(2)
dB
32
dB
Alternate channel rejection, ±7 Wanted signal at –79 dBm, modulated interferer at ≥
MHz(1)
±7 MHz, BER = 10–3
Selectivity, image frequency(1)
Wanted signal at –79 dBm, modulated interferer at
image frequency, BER = 10–3
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Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Selectivity, image frequency
±1 MHz(1)
Note that Image frequency + 1 MHz is the Co-channel
–1 MHz. Wanted signal at –79 dBm, modulated
interferer at ±1 MHz from image frequency, BER =
10–3
5 / 32(2)
dB
Blocker rejection, ±8 MHz and
above(1)
Wanted signal at –79 dBm, modulated interferer at ±8
MHz and above, BER = 10–3
>46
dB
Out-of-band blocking (3)
30 MHz to 2000 MHz
–40
dBm
Out-of-band blocking
2003 MHz to 2399 MHz
–19
dBm
Out-of-band blocking
2484 MHz to 2997 MHz
–22
dBm
Intermodulation
Wanted signal at 2402 MHz, –76 dBm. Two
interferers at 2405 and 2408 MHz respectively, at the
given power level
–42
dBm
(1)
(2)
(3)
Numbers given as I/C dB.
X / Y, where X is +N MHz and Y is –N MHz.
Excluding one exception at Fwanted / 2, per Bluetooth Specification.
8.7 125-kbps Coded (Bluetooth 5) – TX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Output power, highest setting
Differential mode, delivered to a single-ended 50-Ω load
through a balun
5
dBm
Output power, highest setting
Measured on CC2650EM-4XS, delivered to a single-ended
50-Ω load
2
dBm
Output power, lowest setting
Delivered to a single-ended 50-Ω load through a balun
–21
dBm
f < 1 GHz, outside restricted bands
–43
dBm
f < 1 GHz, restricted bands ETSI
–65
dBm
f < 1 GHz, restricted bands FCC
–71
dBm
f > 1 GHz, including harmonics
–46
dBm
Spurious emission conducted
measurement(1)
(1)
Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2
(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).
8.8 500-kbps Coded (Bluetooth 5) – RX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Receiver sensitivity
Differential mode. Measured at the CC2650EM-5XD
SMA connector, BER = 10–3
–101
dBm
Receiver saturation
Differential mode. Measured at the CC2650EM-5XD
SMA connector, BER = 10–3
>5
dBm
Frequency error tolerance
Difference between the incoming carrier frequency
and the internally generated carrier frequency
–240
240
kHz
Data rate error tolerance
Difference between incoming data rate and the
internally generated data rate (37-byte packets)
–500
500
ppm
Data rate error tolerance
Difference between incoming data rate and the
internally generated data rate (255-byte packets)
–310
330
ppm
Co-channel rejection (1)
Wanted signal at –72 dBm, modulated interferer in
channel, BER = 10–3
Selectivity, ±1 MHz (1)
Wanted signal at –72 dBm, modulated interferer at ±1
MHz, BER = 10–3
20
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dB
9 / 5(2)
dB
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Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Selectivity, ±2 MHz (1)
Wanted signal at –72 dBm, modulated interferer at ±2
MHz, Image frequency is at –2 MHz, BER = 10–3
41 / 31(2)
dB
Selectivity, ±3 MHz (1)
Wanted signal at –72 dBm, modulated interferer at ±3
MHz, BER = 10–3
44 / 41(2)
dB
Selectivity, ±4 MHz (1)
Wanted signal at –72 dBm, modulated interferer at ±4
MHz, BER = 10–3
44 / 44(2)
dB
Selectivity, ±6 MHz (1)
Wanted signal at –72 dBm, modulated interferer at ±6
MHz, BER = 10–3
44 / 44(2)
dB
Alternate channel rejection,
±7 MHz(1)
Wanted signal at –72 dBm, modulated interferer at
≥ ±7 MHz, BER = 10–3
44 / 44(2)
dB
Selectivity, image frequency(1)
Wanted signal at –72 dBm, modulated interferer at
image frequency, BER = 10–3
31
dB
Selectivity, image frequency
±1 MHz(1)
Note that Image frequency + 1 MHz is the Co-channel
–1 MHz. Wanted signal at –72 dBm, modulated
interferer at ±1 MHz from image frequency, BER =
10–3
5 / 41(2)
dB
Blocker rejection, ±8 MHz and
above(1)
Wanted signal at –72 dBm, modulated interferer at ±8
MHz and above, BER = 10–3
44
dB
Out-of-band blocking (3)
30 MHz to 2000 MHz
–35
dBm
Out-of-band blocking
2003 MHz to 2399 MHz
–19
dBm
Out-of-band blocking
2484 MHz to 2997 MHz
–19
dBm
Intermodulation
Wanted signal at 2402 MHz, –69 dBm. Two
interferers at 2405 and 2408 MHz respectively, at the
given power level
–37
dBm
(1)
(2)
(3)
Numbers given as I/C dB.
X / Y, where X is +N MHz and Y is –N MHz.
Excluding one exception at Fwanted / 2, per Bluetooth Specification.
8.9 500-kbps Coded (Bluetooth 5) – TX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Output power, highest setting
Differential mode, delivered to a single-ended 50-Ω load
through a balun
5
dBm
Output power, highest setting
Measured on CC2650EM-4XS, delivered to a single-ended
50-Ω load
2
dBm
Output power, lowest setting
Delivered to a single-ended 50-Ω load through a balun
–21
dBm
f < 1 GHz, outside restricted bands
–43
dBm
f < 1 GHz, restricted bands ETSI
–65
dBm
f < 1 GHz, restricted bands FCC
–71
dBm
f > 1 GHz, including harmonics
–46
dBm
Spurious emission conducted
measurement(1)
(1)
Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2
(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).
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8.10 1-Mbps GFSK (Bluetooth low energy) – RX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Receiver sensitivity
Differential mode. Measured at the CC2650EM-5XD
SMA connector, BER = 10–3
–97
dBm
Receiver sensitivity
Single-ended mode. Measured on CC2650EM-4XS,
at the SMA connector, BER = 10–3
–96
dBm
Receiver saturation
Differential mode. Measured at the CC2650EM-5XD
SMA connector, BER = 10–3
4
dBm
Receiver saturation
Single-ended mode. Measured on CC2650EM-4XS,
at the SMA connector, BER = 10–3
0
dBm
Frequency error tolerance
Difference between the incoming carrier frequency
and the internally generated carrier frequency
–350
350
kHz
Data rate error tolerance
Difference between incoming data rate and the
internally generated data rate
–750
750
ppm
Co-channel rejection(1)
Wanted signal at –67 dBm, modulated interferer in
channel, BER = 10–3
Selectivity, ±1 MHz(1)
–6
dB
Wanted signal at –67 dBm, modulated interferer at ±1
MHz, BER = 10–3
7 / 3(2)
dB
Selectivity, ±2 MHz(1)
Wanted signal at –67 dBm, modulated interferer at ±2
MHz, BER = 10–3
34 / 25(2)
dB
Selectivity, ±3 MHz(1)
Wanted signal at –67 dBm, modulated interferer at ±3
MHz, BER = 10–3
38 / 26(2)
dB
Selectivity, ±4 MHz(1)
Wanted signal at –67 dBm, modulated interferer at ±4
MHz, BER = 10–3
42 / 29(2)
dB
Selectivity, ±5 MHz or more(1)
Wanted signal at –67 dBm, modulated interferer at
≥ ±5 MHz, BER = 10–3
32
dB
Selectivity, image frequency(1)
Wanted signal at –67 dBm, modulated interferer at
image frequency, BER = 10–3
25
dB
Selectivity, image frequency
±1 MHz(1)
Wanted signal at –67 dBm, modulated interferer at ±1
MHz from image frequency, BER = 10–3
3 / 26(2)
dB
Out-of-band blocking (3)
30 MHz to 2000 MHz
–20
dBm
Out-of-band blocking
2003 MHz to 2399 MHz
–5
dBm
Out-of-band blocking
2484 MHz to 2997 MHz
–8
dBm
Out-of-band blocking
3000 MHz to 12.75 GHz
–10
dBm
Intermodulation
Wanted signal at 2402 MHz, –64 dBm. Two
interferers at 2405 and 2408 MHz respectively, at the
given power level
–34
dBm
Spurious emissions,
30 to 1000 MHz
Conducted measurement in a 50-Ω single-ended
load. Suitable for systems targeting compliance with
EN 300 328, EN 300 440 class 2, FCC CFR47, Part
15 and ARIB STD-T-66
–71
dBm
Spurious emissions,
1 to 12.75 GHz
Conducted measurement in a 50-Ω single-ended
load. Suitable for systems targeting compliance with
EN 300 328, EN 300 440 class 2, FCC CFR47, Part
15 and ARIB STD-T-66
–62
dBm
RSSI dynamic range
70
dB
RSSI accuracy
±4
dB
(1)
(2)
(3)
22
Numbers given as I/C dB.
X / Y, where X is +N MHz and Y is –N MHz.
Excluding one exception at Fwanted / 2, per Bluetooth Specification.
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8.11 1-Mbps GFSK (Bluetooth low energy) – TX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Output power, highest setting
Differential mode, delivered to a single-ended 50-Ω load
through a balun
5
dBm
Output power, highest setting
Measured on CC2650EM-4XS, delivered to a single-ended
50-Ω load
2
dBm
Output power, lowest setting
Delivered to a single-ended 50-Ω load through a balun
–21
dBm
f < 1 GHz, outside restricted bands
–43
dBm
f < 1 GHz, restricted bands ETSI
–65
dBm
f < 1 GHz, restricted bands FCC
–71
dBm
f > 1 GHz, including harmonics
–46
dBm
Spurious emission conducted
measurement(1)
(1)
Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2
(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).
8.12 2-Mbps GFSK (Bluetooth 5) – RX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Receiver sensitivity
Differential mode. Measured at the CC2650EM-5XD
SMA connector, BER = 10–3
–91
dBm
Receiver saturation
Differential mode. Measured at the CC2650EM-5XD
SMA connector, BER = 10–3
3
dBm
Frequency error tolerance
Difference between the incoming carrier frequency and
the internally generated carrier frequency
Data rate error tolerance
Difference between incoming data rate and the
internally generated data rate
Co-channel rejection(1)
Wanted signal at –67 dBm, modulated interferer in
channel, BER = 10–3
Selectivity, ±2 MHz(1)
Wanted signal at –67 dBm, modulated interferer at
±2 MHz, Image frequency is at –2 MHz BER = 10–3
Selectivity, ±4 MHz(1)
–300
500
kHz
–1000
1000
ppm
–7
dB
8 / 4(2)
dB
Wanted signal at –67 dBm, modulated interferer at
±4 MHz, BER = 10–3
31 / 26(2)
dB
Selectivity, ±6 MHz(1)
Wanted signal at –67 dBm, modulated interferer at
±6 MHz, BER = 10–3
37 / 38(2)
dB
Alternate channel rejection,
±7 MHz(1)
Wanted signal at –67 dBm, modulated interferer at
≥ ±7 MHz, BER = 10–3
37 / 36(2)
dB
Selectivity, image frequency(1)
Wanted signal at –67 dBm, modulated interferer at
image frequency, BER = 10–3
4
dB
Selectivity, image frequency
±2 MHz(1)
Note that Image frequency + 2 MHz is the Co-channel.
Wanted signal at –67 dBm, modulated interferer at
±2 MHz from image frequency, BER = 10–3
–7 / 26(2)
dB
Out-of-band blocking(3)
30 MHz to 2000 MHz
–33
dBm
Out-of-band blocking
2003 MHz to 2399 MHz
–15
dBm
Out-of-band blocking
2484 MHz to 2997 MHz
–12
dBm
Out-of-band blocking
3000 MHz to 12.75 GHz
–10
dBm
Intermodulation
Wanted signal at 2402 MHz, –64 dBm. Two interferers
at 2408 and 2414 MHz respectively, at the given power
level
–45
dBm
(1)
(2)
Numbers given as I/C dB.
X / Y, where X is +N MHz and Y is –N MHz.
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(3)
Excluding one exception at Fwanted / 2, per Bluetooth Specification.
8.13 2-Mbps GFSK (Bluetooth 5) – TX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Output power, highest setting
Differential mode, delivered to a single-ended 50-Ω load
through a balun
5
dBm
Output power, highest setting
Measured on CC2650EM-4XS, delivered to a single-ended
50-Ω load
2
dBm
Output power, lowest setting
Delivered to a single-ended 50-Ω load through a balun
–21
dBm
f < 1 GHz, outside restricted bands
–43
dBm
f < 1 GHz, restricted bands ETSI
–65
dBm
f < 1 GHz, restricted bands FCC
–71
dBm
f > 1 GHz, including harmonics
–46
dBm
Spurious emission conducted
measurement(1)
(1)
Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2
(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).
8.14 24-MHz Crystal Oscillator (XOSC_HF)
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.(1)
PARAMETER
TEST CONDITIONS
ESR Equivalent series resistance(2)
6 pF < CL ≤ 9 pF
resistance(2)
5 pF < CL ≤ 6 pF
ESR Equivalent series
LM Motional inductance(2)
MIN
Relates to load capacitance
(CL in Farads)
CL Crystal load capacitance(2) (3)
Crystal
(6)
UNIT
60
Ω
80
Ω
5
H
9
pF
24
Crystal frequency tolerance(2) (5)
(1)
(2)
(3)
(4)
(5)
MAX
20
< 1.6 × 10–24 / CL 2
frequency(2) (4)
Start-up
TYP
MHz
–40
40
time(4) (6)
ppm
150
µs
Probing or otherwise stopping the crystal while the DC/DC converter is enabled may cause permanent damage to the device.
The crystal manufacturer's specification must satisfy this requirement
Adjustable load capacitance is integrated into the device. External load capacitors are not required
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V
Includes initial tolerance of the crystal, drift over temperature, ageing and frequency pulling due to incorrect load capacitance. As per
specification.
Kick-started based on a temperature and aging compensated RCOSC_HF using precharge injection.
8.15 32.768-kHz Crystal Oscillator (XOSC_LF)
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
Crystal
TEST CONDITIONS
MIN
frequency(1)
–500
ESR Equivalent series resistance(1)
(1)
(2)
24
MAX
32.768
Crystal frequency tolerance, Bluetooth lowenergy applications(1) (2)
CL Crystal load
TYP
30
capacitance(1)
6
UNIT
kHz
500
ppm
100
kΩ
12
pF
The crystal manufacturer's specification must satisfy this requirement
Includes initial tolerance of the crystal, drift over temperature, ageing and frequency pulling due to incorrect load capacitance. As per
Bluetooth specification.
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8.16 48-MHz RC Oscillator (RCOSC_HF)
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
Frequency
48
Uncalibrated frequency accuracy
±1%
Calibrated frequency accuracy(1)
±0.25%
Start-up time
(1)
MAX
UNIT
MHz
5
µs
Accuracy relative to the calibration source (XOSC_HF).
8.17 32-kHz RC Oscillator (RCOSC_LF)
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
Calibrated frequency(1)
32.8
Temperature coefficient
80
(1)
MAX
UNIT
kHz
ppm/°C
The frequency accuracy of the Real Time Clock (RTC) is not directly dependent on the frequency accuracy of the 32-kHz RC
Oscillator. The RTC can be calibrated to an accuracy within ±500 ppm of 32.768 kHz by measuring the frequency error of RCOSC_LF
relative to XOSC_HF and compensating the RTC tick speed. The procedure is explained in Running Bluetooth® Low Energy on
CC2640 Without 32 kHz Crystal.
8.18 ADC Characteristics
Tc = 25°C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1)
PARAMETER
TEST CONDITIONS
Input voltage range
MIN
TYP
0
Resolution
VDDS
12
Sample rate
Offset
Gain error
DNL(3)
Differential nonlinearity
INL(4)
Integral nonlinearity
ENOB
THD
Effective number of bits
Total harmonic distortion
Signal-to-noise
SINAD,
and
SNDR
Distortion ratio
SFDR
Spurious-free dynamic
range
MAX
Internal 4.3-V equivalent
reference(2)
V
Bits
200
Internal 4.3-V equivalent reference(2)
UNIT
ksps
2
LSB
2.4
LSB
>–1
LSB
±3
LSB
Internal 4.3-V equivalent reference(2), 200 ksps,
9.6-kHz input tone
9.8
VDDS as reference, 200 ksps, 9.6-kHz input tone
10
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
11.1
Internal 4.3-V equivalent reference(2), 200 ksps,
9.6-kHz input tone
–65
VDDS as reference, 200 ksps, 9.6-kHz input tone
–69
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
–71
Internal 4.3-V equivalent reference(2), 200 ksps,
9.6-kHz input tone
60
VDDS as reference, 200 ksps, 9.6-kHz input tone
63
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
69
Internal 4.3-V equivalent reference(2), 200 ksps,
9.6-kHz input tone
67
VDDS as reference, 200 ksps, 9.6-kHz input tone
68
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
73
Bits
dB
dB
dB
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Tc = 25°C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1)
PARAMETER
(1)
(2)
(3)
(4)
(5)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
clockcycles
Conversion time
Serial conversion, time-to-output, 24-MHz clock
50
Current consumption
Internal 4.3-V equivalent reference(2)
0.66
mA
Current consumption
VDDS as reference
0.75
mA
Reference voltage
Equivalent fixed internal reference (input voltage scaling
enabled). For best accuracy, the ADC conversion should
be initiated through the TIRTOS API in order to include the
gain/offset compensation factors stored in FCFG1.
4.3(2) (5)
V
Reference voltage
Fixed internal reference (input voltage scaling disabled).
For best accuracy, the ADC conversion should be initiated
through the TIRTOS API in order to include the gain/offset
compensation factors stored in FCFG1. This value is
derived from the scaled value (4.3 V) as follows:
Vref = 4.3 V × 1408 / 4095
1.48
V
Reference voltage
VDDS as reference (Also known as RELATIVE) (input
voltage scaling enabled)
VDDS
V
Reference voltage
VDDS as reference (Also known as RELATIVE) (input
voltage scaling disabled)
VDDS /
2.82(5)
V
Input impedance
200 ksps, voltage scaling enabled. Capacitive input, Input
impedance depends on sampling frequency and sampling
time
>1
MΩ
Using IEEE Std 1241™-2010 for terminology and test methods.
Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V.
No missing codes. Positive DNL typically varies from +0.3 to +3.5, depending on device (see Figure 8-21).
For a typical example, see Figure 8-22.
Applied voltage must be within absolute maximum ratings (Section 8.1) at all times.
8.19 Temperature Sensor
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
Resolution
TYP
MAX
4
Range
–40
UNIT
°C
85
°C
Accuracy
±5
°C
Supply voltage coefficient(1)
3.2
°C/V
(1)
Automatically compensated when using supplied driver libraries.
8.20 Battery Monitor
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
Resolution
MAX
50
Range
1.8
Accuracy
26
TYP
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3.8
13
UNIT
V
mV
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8.21 Continuous Time Comparator
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Input voltage range
0
VDDS
V
External reference voltage
0
VDDS
V
Internal reference voltage
DCOUPL as reference
1.27
Offset
Hysteresis
Decision time
Step from –10 mV to 10 mV
Current consumption when
(1)
enabled(1)
V
3
mV
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