CD74ACT05E

CD54ACT05,, CD74ACT05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCHS311C – JANUARY 2001 – REVISED JANUARY 2007 FEATURES • • • • • CD54ACT05 . . . F PACKAGE CD74ACT05 . . . E OR M PACKAGE (TOP VIEW) Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015 1A 1Y 2A 2Y 3A 3Y GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y DESCRIPTION/ORDERING INFORMATION The 'ACT05 devices contain six independent inverters. These devices perform the Boolean function Y = A. The open-drain outputs require pullup resistors to perform correctly, and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. ORDERING INFORMATION PACKAGE (1) TA PDIP – E –55°C to 125°C SOIC – M CDIP – F (1) ORDERABLE PART NUMBER Tube of 25 CD74ACT05E Tube of 50 CD74ACT05M Reel of 2500 CD74ACT05M96 Reel of 1000 CD54ACT05F3A TOP-SIDE MARKING CD74ACT05E ACT05M CD54ACT05F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (EACH INVERTER) INPUT A A OUTPUT Y H L L Z Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2001–2007, Texas Instruments Incorporated On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. CD54ACT05,, CD74ACT05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCHS311C – JANUARY 2001 – REVISED JANUARY 2007 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX –0.5 6 UNIT VCC Supply voltage range IIK Input clamp current (2) VI < 0 or VI > VCC ±20 mA IOK Output clamp current (2) VO < 0 –50 mA IO Continuous current ±50 mA θJA Package thermal impedance (3) Tstg Storage temperature range (1) (2) (3) E package 80 M package 86 –65 V °C/W 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) TA = 25°C –40°C TO 85°C –55°C TO 125°C MIN MAX MIN MAX MIN MAX 4.5 5.5 4.5 5.5 4.5 5.5 VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage VI Input voltage 0 VCC 0 VCC VO Output voltage 0 5.5 0 5.5 IOL Low-level output current 24 24 ∆t/∆v Input transition rise or fall rate 10 10 (1) 2 2 UNIT V 2 0.8 V 0.8 0.8 V 0 VCC V 0 5.5 V 24 mA 10 ns/V All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOL II ICC ∆ICC TEST CONDITIONS VI = VIH or VIL VCC TA = 25°C –40°C TO 85°C –55°C TO 125°C MIN MIN MIN 2 MAX IOL = 50 mA 4.5 V 0.1 0.1 IOL = 24 mA 4.5 V 0.36 0.44 IOL = 50 mA (1) 5.5 V IOL = 75 mA (1) 5.5 V UNIT MAX 0.1 0.5 1.65 V 1.65 VI = VCC or GND 5.5 V ±0.1 ±1 ±1 VI = VCC or GND, IO = 0 5.5 V 4 40 80 µA 2.4 2.8 3 mA 10 10 10 pF VI = VCC– 2.1 V 4.5 V to 5.5 V Ci (1) MAX µA Test one output at a time, not exceeding 1-second duration. Measurement is made by forcing indicated current and measuring voltage to minimize power dissipation. Test verifies a minimum 50-Ω transmission-line drive capability at 85°C and 75-Ω transmission-line drive capability at 125°C. Submit Documentation Feedback CD54ACT05,, CD74ACT05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCHS311C – JANUARY 2001 – REVISED JANUARY 2007 ACT INPUT LOAD TABLE (1) Input Unit Load A 0.18 (1) Unit load is ∆ICC limit specified in electrical characteristics table (e.g., 2.4 mA at 25°C). Switching Characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) A or B Y tPZL tPLZ –40°C TO 85°C –55°C TO 125°C MIN MAX MIN 2.4 8.5 2.3 9.3 2.8 9.8 2.7 10.8 UNIT MAX ns Operating Characteristics VCC = 5 V, TA = 25°C PARAMETER Cpd Power dissipation capacitance TYP UNIT 105 pF PARAMETER MEASUREMENT INFORMATION 2 × VCC From Output Under Test CL = 50 pF (see Note A) R1 = 500 Ω† S1 VCC 50% VCC Input 50% VCC 0V R2 = 500 Ω† tPZL tPLZ ≈VCC 50% VCC Output † When VCC = 1.5 V, R1 = R2 = 1 kΩ 20% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES LOAD CIRCUIT NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. C. The outputs are measured one at a time, with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms Submit Documentation Feedback 3 PACKAGE OPTION ADDENDUM www.ti.com 14-Aug-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) 5962-9068601QCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9068601QC A CD54ACT05F3A CD54ACT05F3A ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9068601QC A CD54ACT05F3A CD74ACT05E ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -55 to 125 CD74ACT05E CD74ACT05EE4 ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -55 to 125 CD74ACT05E CD74ACT05M ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 ACT05M CD74ACT05M96 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 ACT05M (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of