CDC208DWR


     

        SCAS109F − APRIL 1990 − REVISED OCTOBER 1998 D Low-Skew Propagation Delay D D D D D D DW PACKAGE (TOP VIEW) Specifications for Clock-Driver Applications TTL-Compatible Inputs and CMOS-Compatible Outputs Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) 1Y2 1Y3 1Y4 GND GND GND GND 2Y1 2Y2 2Y3 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 1Y1 1A 1OE1 1OE2 VCC VCC 2A 2OE1 2OE2 2Y4 description The CDC208 contains dual clock-driver circuits that fanout one input signal to four outputs with minimum skew for clock distribution (see Figure 2). The device also offers two output-enable (OE1 and OE2) inputs for each circuit that can force the outputs to be disabled to a high-impedance state or to a high- or low-logic level independent of the signal on the respective A input. Skew parameters are specified for a reduced temperature and voltage range common to many applications. The CDC208 is characterized for operation from − 40°C to 85°C. FUNCTION TABLES INPUTS OUTPUTS 1OE1 1OE2 1A 1Y1 1Y2 1Y3 1Y4 L L L L L L L L L H H H H H L H X L L L L H L X H H H H H H X Z Z Z Z 2A 2Y1 2Y2 INPUTS OUTPUTS 2OE1 2OE2 2Y3 2Y4 L L L L L L L L L H H H H H L H X L L L L H L X H H H H H H X Z Z Z Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. Copyright  1998, Texas Instruments Incorporated 
  !" # $%&" !#  '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&#  &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0  !)) '!!&"&#+ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 

     

        SCAS109F − APRIL 1990 − REVISED OCTOBER 1998 logic symbol† X/Y 1OE1 18 17 1OE2 1 2 1 1 V4 2 G5 3 EN 4, 5 1A 19 4, 5 4, 5 4, 5 2OE1 1 2 3 13 8 12 9 2OE2 2A 20 10 11 14 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) 1OE1 18 20 1OE2 17 1 2 3 1A 2OE1 19 9 11 2 1Y3 1Y4 2Y1 12 10 2A 1Y2 13 8 2OE2 1Y1 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2Y2 2Y3 2Y4 

     

        SCAS109F − APRIL 1990 − REVISED OCTOBER 1998 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 W Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. For more information, refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology Data Book, literature number SCBD002B. recommended operating conditions VCC VIH Supply voltage VIL VI Low-level input voltage IOH IOL High-level output current ∆t / ∆v Input transition rise or fall rate fclock TA Input clock frequency High-level input voltage MIN NOM MAX 4.5 5 5.5 2 0 Low-level output current 0 Operating free-air temperature −40 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V V 0.8 Input voltage UNIT VCC −24 V V mA 24 mA 10 ns / V 60 MHz 85 °C 3 

     

        SCAS109F − APRIL 1990 − REVISED OCTOBER 1998 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN 4.5 V 4.4 4.4 5.5 V 5.4 5.4 4.5 V 3.94 3.8 IOH = − 24 mA 5.5 V 4.94 4.8 IOH = − 75 mA† 5.5 V IOH = − 50 µA A VOH II IOZ ICC IOL = 24 mA IOL = 75 mA† VI = VCC or GND VO = VCC or GND VI = VCC or GND, MIN 0.1 ∆ICC‡ One input at 3.4 V, Other inputs at VCC or GND Ci VI = VCC or GND VO = VCC or GND 0.1 0.1 0.36 0.44 5.5 V 0.36 0.44 V 1.65 5.5 V ± 0.1 ±1 µA 5.5 V ± 0.5 ±5 µA 5.5 V 8 80 µA 5.5 V 0.9 1 mA 5V POST OFFICE BOX 655303 0.1 4.5 V 4 Co 5V 10 † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. ‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC. 4 UNIT V 5.5 V 5.5 V IO = 0 MAX 3.85 4.5 V IOL = 50 µA A VOL TA = 25°C TYP MAX VCC • DALLAS, TEXAS 75265 pF pF 

     

        SCAS109F − APRIL 1990 − REVISED OCTOBER 1998 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL 1A and 2A Any Y tPLH tPHL 1OE1, 1OE2, and 2OE1, 2OE2 Any Y tPZH tPZL 1OE2 or 2OE2 tPHZ tPLZ 1OE2 or 2OE2 MIN Any Y 1OE1 or 2OE1 MIN MAX 5.3 8.5 10.9 5.3 11.7 3.6 7.7 11 3.6 11.5 4.7 8.5 11.7 4.7 12.8 4.4 8.4 11.3 4.4 12.4 4.4 8.1 11.3 4.4 12.4 5 9.6 13.3 5 14.9 4.2 7.4 9.3 4.2 10.2 5.4 7.5 9.2 5.4 9.9 Any Y 1OE1 or 2OE1 TA = 25°C TYP MAX UNIT ns ns ns ns switching characteristics, VCC = 5 V ± 0.25 V, TA = 25°C to 70°C (see Note 3 and Figures 1 and 2) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL 1A and 2A Any Y MIN MAX 6.6 10.2 6.6 9.8 tsk(o) 1A and 2A Any Y NOTE 3: All specifications are valid only for all outputs switching simultaneously and in phase. 1 UNIT ns ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd Power dissipation capacitance per bank TEST CONDITIONS Outputs enabled Outputs disabled POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CL = 50 pF, f = 1 MHz TYP 96 12 UNIT pF 5 

     

        SCAS109F − APRIL 1990 − REVISED OCTOBER 1998 PARAMETER MEASUREMENT INFORMATION 2 × VCC From Output Under Test 500 Ω 3V Output Control (low-level enabling) LOAD CIRCUIT FOR OUTPUTS 1.5 V 3V 1.5 V 1.5 V 0V tPLH Output tPHL VOH 50% VCC VOL 50% VCC tPLZ ≈ VCC Output Waveform 1 S1 at 2 × VCC (see Note C) Output Waveform 2 S1 at 2 × VCC (see Note C) 1.5 V 0V tPZL Input (see Note B) S1 Open 2 × VCC GND TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open GND CL = 50 pF (see Note A) (see Note A) S1 500 Ω 50% VCC tPZH VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 20% VCC VOL tPHZ 50% VCC 80% VCC VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. For testing pulse duration: tr = tf = 1 to 3 ns. Pulse polarity can be either high-to-low-to-high or low-to-high-to-low. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 

     

        SCAS109F − APRIL 1990 − REVISED OCTOBER 1998 PARAMETER MEASUREMENT INFORMATION 1A, 2A 1Y1 tPLH1 tPHL1 tPLH2 tPHL2 tPLH3 tPHL3 tPLH4 tPHL4 tPLH5 tPHL5 tPLH6 tPHL6 tPLH7 tPHL7 tPLH8 tPHL8 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 NOTE A: Output skew, tsk(o), is calculated as the greater of: − The difference between the fastest and slowest of tPLHn (n = 1, 2, . . . , 8) − The difference between the fastest and slowest of tPHLn (n = 1, 2, . . . , 8) Figure 2. Waveforms for Calculation of tsk(o) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) CDC208DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM CDC208 Samples CDC208DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM CDC208 Samples CDC208NS ACTIVE SO NS 20 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CDC208 Samples CDC208NSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CDC208 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of