SN74LVC16T245-EP
www.ti.com
SCES843A – JANUARY 2013 – REVISED FEBRUARY 2013
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
Check for Samples: SN74LVC16T245-EP
FEATURES
1
•
•
•
•
•
•
•
Control Inputs VIH and VIL Levels Are
Referenced to VCCA Voltage
VCC Isolation Feature – If Either VCC Input Is at
GND, Both Ports Are in the High-Impedance
State
Overvoltage-Tolerant Inputs and Outputs
Allow Mixed-Voltage-Mode Data
Communications
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
•
•
•
•
•
•
•
(1)
Controlled Baseline
One Assembly and Test Site
One Fabrication Site
Available in Military (-55°C to 125°C)
Temperature Ranges (1)
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
DGG PACKAGE
(TOP VIEW)
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
2B5
2B6
GND
2B7
2B8
2DIR
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1OE
1A1
1A2
GND
1A3
1A4
VCCA
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCCA
2A5
2A6
GND
2A7
2A8
2OE
Custom temperature ranges available
DESCRIPTION
This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is
designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track
VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional
translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
SN74LVC16T245-EP
SCES843A – JANUARY 2013 – REVISED FEBRUARY 2013
www.ti.com
DESCRIPTION (CONTINUED)
The SN74LVC16T245 is designed for asynchronous communication between two data buses. The logic levels of
the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level
applied to prevent excess ICC and ICCZ.
The SN74LVC16T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance
state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Table 1. ORDERING INFORMATION (1)
TA
–55°C to 125°C
(1)
ORDERABLE PART
NUMBER
PACKAGE
TSSOP-DGG
TOP-SIDE MARKING
Reel of 2000
CLVC16T245MDGGREP
Tube of 40
CLVC16T245MDGGEP
LVC16T245M
VID NUMBER
V62/12667-01XE
V62/12667-01XE-T
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
FUNCTION TABLE (1)
(EACH 8-BIT SECTION)
CONTROL INPUTS
(1)
OUTPUT CIRCUITS
OPERATION
OE
DIR
A PORT
B PORT
L
L
Enabled
Hi-Z
B data to A bus
L
H
Hi-Z
Enabled
A data to B bus
H
X
Hi-Z
Hi-Z
Isolation
Input circuits of the data I/Os always are active.
LOGIC DIAGRAM (POSITIVE LOGIC)
1DIR
1
2DIR
48
1A1
25
1OE
47
2A1
2
24
36
13
1B1
To Seven Other Channels
2
2OE
Submit Documentation Feedback
2B1
To Seven Other Channels
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC16T245-EP
SN74LVC16T245-EP
www.ti.com
SCES843A – JANUARY 2013 – REVISED FEBRUARY 2013
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
–0.5
6.5
I/O ports (A port)
–0.5
6.5
I/O ports (B port)
–0.5
6.5
Control inputs
–0.5
6.5
A port
–0.5
6.5
B port
–0.5
6.5
A port
–0.5 VCCA + 0.5
B port
–0.5 VCCB + 0.5
UNIT
VCCA
VCCB
Supply voltage range
VI
Input voltage range (2)
VO
Voltage range applied to any output
in the high-impedance or power-off state (2)
VO
Voltage range applied to any output in the high or low state (2)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
(3)
Continuous current through each VCCA, VCCB, and GND
TJ
Maximum junction temperature
Tstg
Storage temperature range
(1)
(2)
(3)
–65
V
V
V
V
±50
mA
±100
mA
150
°C
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed.
THERMAL INFORMATION
SN74LVC16T245
THERMAL METRIC (1)
DGG
UNITS
48 PINS
θJA
Junction-to-ambient thermal resistance (2)
59.9
θJCtop
Junction-to-case (top) thermal resistance (3)
13.9
θJB
Junction-to-board thermal resistance (4)
27.1
(5)
ψJT
Junction-to-top characterization parameter
ψJB
Junction-to-board characterization parameter (6)
26.8
θJCbot
Junction-to-case (bottom) thermal resistance (7)
N/A
(1)
(2)
(3)
(4)
(5)
(6)
(7)
0.5
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDECstandard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
Spacer
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC16T245-EP
3
SN74LVC16T245-EP
SCES843A – JANUARY 2013 – REVISED FEBRUARY 2013
www.ti.com
Recommended Operating Conditions (1) (2) (3) (4)
VCCI
VCCA
VCCB
VCCO
Supply voltage
1.65 V to 1.95 V
High-level
input voltage
VIH
MAX
5.5
1.65
5.5
1.7
3 V to 3.6 V
VCCI × 0.7
1.65 V to 1.95 V
VIL
Data inputs (5)
VCCI × 0.35
2.3 V to 2.7 V
0.7
3 V to 3.6 V
0.8
4.5 V to 5.5 V
High-level
input voltage
Control inputs
(referenced to VCCA) (6)
VCCA × 0.65
2.3 V to 2.7 V
1.7
3 V to 3.6 V
V
2
4.5 V to 5.5 V
VCCA × 0.7
1.65 V to 1.95 V
VCCA × 0.35
2.3 V to 2.7 V
0.7
3 V to 3.6 V
0.8
VIL
Low-level
input voltage
Control inputs
(referenced to VCCA) (6)
VI
Input voltage
Control inputs
0
5.5
VI/O
Input/output voltage
Active state
0
VCCO
3-State
0
5.5
4.5 V to 5.5 V
IOH
High-level output current
Low-level output current
Δt/Δv
TA
(1)
(2)
(3)
(4)
(5)
(6)
4
Input transition
rise or fall rate
Data inputs
V
VCCA × 0.3
1.65 V to 1.95 V
–4
2.3 V to 2.7 V
–8
3 V to 3.6 V
–24
4.5 V to 5.5 V
–32
1.65 V to 1.95 V
IOL
V
VCCI × 0.3
1.65 V to 1.95 V
VIH
V
V
2
4.5 V to 5.5 V
Low-level
input voltage
UNIT
VCCI × 0.65
2.3 V to 2.7 V
Data inputs (5)
MIN
1.65
V
mA
4
2.3 V to 2.7 V
8
3 V to 3.6 V
24
4.5 V to 5.5 V
32
1.65 V to 1.95 V
20
2.3 V to 2.7 V
20
3 V to 3.6 V
10
4.5 V to 5.5 V
5
Operating free-air temperature
V
–55
125
mA
ns/V
°C
VCCI is the VCC associated with the input port.
VCCO is the VCC associated with the output port.
All unused or driven (floating) data inputs (I/Os) of the device must be held at logic HIGH or LOW (preferably VCCI or GND) to ensure
proper device operation and minimize power. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature
number SCBA004.
All unused data inputs of the device must be held at VCCA or GND to ensure proper device operation.
For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V.
For VCCA values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC16T245-EP
SN74LVC16T245-EP
www.ti.com
SCES843A – JANUARY 2013 – REVISED FEBRUARY 2013
Electrical Characteristics (1) (2)
TA = −55°C to 125°C, over recommended input voltage range (unless otherwise noted)
PARAMETER
VOH
VOL
TEST CONDITIONS
TYP
MAX
VI = VIH
1.65 V to 4.5 V
1.65 V to 4.5 V
VI = VIH
1.65 V
1.65 V
IOH = –8 mA,
VI = VIH
2.3 V
2.3 V
1.9
IOH = –24 mA,
VI = VIH
3V
3V
2.35
IOH = –32 mA,
VI = VIH
4.5 V
4.5 V
3.75
IOL = 100 μA,
VI = VIL
1.65 V to 4.5 V
1.65 V to 4.5 V
0.1
IOL = 4 mA,
VI = VIL
1.65 V
1.65 V
0.45
IOL = 8 mA,
VI = VIL
2.3 V
2.3 V
0.3
IOL = 24 mA,
VI = VIL
3V
3V
0.65
IOL = 32 mA,
VI = VIL
4.5 V
4.5 V
0.65
1.65 V to 5.5 V
1.65 V to 5.5 V
±2
VI = VCCA or GND
Ioff
A or B
port
VI or VO = 0 to 5.5 V
IOZ
A or B
port
VO = VCCO or GND,
OE = VIH
VI = VCCI or GND,
IO = 0
ICCB
VI = VCCI or GND,
IO = 0
ICCA + ICCB
VI = VCCI or GND,
IO = 0
A port
One A port at VCCA – 0.6 V,
DIR at VCCA, B port = open
DIR
DIR at VCCA – 0.6 V,
B port = open,
A port at VCCA or GND
ΔICCB
B port
One B port at VCCB – 0.6 V,
DIR at GND, A port = open
Ci
Control
inputs
Cio
A or B
port
(1)
(2)
MIN
IOH = –4 mA,
Control
inputs
ΔICCA
VCCB
IOH = –100 μA,
II
ICCA
VCCA
UNIT
VCCO – 0.1
1.2
V
0V
0 to 5.5 V
±10
0 to 5.5 V
0V
±10
1.65 V to 5.5 V
1.65 V to 5.5 V
±10
1.65 V to 5.5 V
1.65 V to 5.5 V
20
5V
0V
20
0V
5V
–2.5
1.65 V to 5.5 V
1.65 V to 5.5 V
5V
0V
–2.5
0V
5V
20
1.65 V to 5.5 V
1.65 V to 5.5 V
30
V
μA
μA
μA
μA
20
μA
μA
50
3 V to 5.5 V
μA
3 V to 5.5 V
50
50
μA
3 V to 5.5 V
3 V to 5.5 V
VI = VCCA or GND
3.3 V
3.3 V
4
pF
VO = VCCA/B or GND
3.3 V
3.3 V
8.5
pF
VCCO is the VCC associated with the output port.
VCCI is the VCC associated with the input port.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC16T245-EP
5
SN74LVC16T245-EP
SCES843A – JANUARY 2013 – REVISED FEBRUARY 2013
www.ti.com
1000000
Estimated Life (Hours)
100000
WB Voiding Fail Mode
10000
1000
100
80
90
100
110
120
130
140
150
160
Junction Temperature, TJ (°C)
(1)
See datasheet for absolute maximum and minimum recommended operating conditions.
Figure 1. SN74LVC16T245-EP Operating Life Derating Chart
6
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC16T245-EP
SN74LVC16T245-EP
www.ti.com
SCES843A – JANUARY 2013 – REVISED FEBRUARY 2013
Switching Characteristics
TA = −40°C to 85°C, VCCA = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 2)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
FROM
(INPUT)
TO
(OUTPUT)
A
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.7
21.9
1.3
9.2
1
7.4
0.8
7.1
ns
B
A
0.9
23.8
0.8
23.6
0.7
23.4
0.7
23.4
ns
OE
A
1.6
29.6
1.5
29.4
1.5
29.3
1.4
29.2
ns
OE
B
2.4
32.2
1.9
13.1
1.7
12
1.3
10.3
ns
OE
A
0.4
24
0.4
23.8
0.4
23.7
0.4
23.7
ns
OE
B
1.8
32
1.6
16
1.2
12.6
0.9
10.8
ns
Switching Characteristics
TA = −55°C to 125°C, VCCA = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 2)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
A
B
25.9
13.2
11.4
11.1
ns
B
A
27.8
27.8
27.4
27.4
ns
OE
A
33.6
33.4
33.3
33.2
ns
OE
B
36.2
17.1
16
14.3
ns
OE
A
28
27.8
27.7
27.7
ns
OE
B
36
22
16.6
14.8
ns
MIN
MAX
MIN
MAX
MIN
MAX
MIN
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC16T245-EP
UNIT
MAX
7
SN74LVC16T245-EP
SCES843A – JANUARY 2013 – REVISED FEBRUARY 2013
www.ti.com
Switching Characteristics
TA = −40°C to 85°C, VCCA = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 2)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
FROM
(INPUT)
TO
(OUTPUT)
A
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.6
21.4
1.2
9
0.8
6.2
0.6
4.8
ns
B
A
1.2
9.3
1
9.1
1
8.9
0.9
8.8
ns
OE
A
1.4
9
1.4
9
1.4
9
1.4
9
ns
OE
B
2.3
29.6
1.8
11
1.7
9.3
0.9
6.9
ns
OE
A
1
10.9
1
10.9
1
10.9
1
10.9
ns
OE
B
1.7
28.2
1.6
12.9
1.2
9.4
1
6.9
ns
Switching Characteristics
TA = −55°C to 125°C, VCCA = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 2)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
8
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
0.5 V
FROM
(INPUT)
TO
(OUTPUT)
A
B
25.4
13
10.2
8.8
ns
B
A
13.3
13.1
12.9
12.8
ns
OE
A
13
13
13
13
ns
OE
B
33.6
14
14.3
10.9
ns
OE
A
14.9
14.9
14.9
14.9
ns
OE
B
32.2
16.9
13.4
10.9
ns
MIN
MAX
MIN
Submit Documentation Feedback
MAX
MIN
MAX
MIN
UNIT
MAX
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC16T245-EP
SN74LVC16T245-EP
www.ti.com
SCES843A – JANUARY 2013 – REVISED FEBRUARY 2013
Switching Characteristics
TA = −40°C to 85°C, VCCA = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 2)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
FROM
(INPUT)
TO
(OUTPUT)
A
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN MAX
B
1.5
21.2
1.1
8.8
0.8
6.1
0.5
4.4
ns
B
A
0.9
7.2
0.8
6.2
0.7
6.1
0.6
6
ns
OE
A
1.6
8.2
1.6
8.2
1.6
6.2
1.6
8.2
ns
OE
B
2.1
29
1.7
10.3
1.5
8.6
0.8
6.3
ns
OE
A
0.8
7.8
0.8
7.8
0.8
7.8
0.8
7.8
ns
OE
B
1.6
27.7
1.4
12.4
1.1
8.5
0.9
8.4
ns
Switching Characteristics
TA = −55°C to 125°C, VCCA = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 2)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
VCCB = 1.8 V
± 0.15 V
FROM
(INPUT)
TO
(OUTPUT)
A
B
25.2
B
A
OE
MIN
MAX
VCCB = 2.5 V
± 0.2 V
MIN
MAX
VCCB = 3.3 V
± 0.3 V
MIN
VCCB = 5 V
± 0.5 V
UNIT
MAX
MIN MAX
12.8
10.2
8.4
ns
11.2
10.2
10.1
10
ns
A
12.2
12.2
12.2
12.2
ns
OE
B
33
14.3
12.8
10.3
ns
OE
A
11.8
12.1
12.1
12.1
ns
OE
B
31.7
16.4
12.9
10.4
ns
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC16T245-EP
9
SN74LVC16T245-EP
SCES843A – JANUARY 2013 – REVISED FEBRUARY 2013
www.ti.com
Switching Characteristics
TA = −40°C to 85°C, VCCA = 5 V ± 0.5 V (unless otherwise noted) (see Figure 2)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
VCC = 1.8 V
± 0.15 V
FROM
(INPUT)
TO
(OUTPUT)
A
B
1.6
B
A
OE
MIN MAX
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
21.4
1
8.8
0.7
6
0.4
4.2
ns
0.7
6.8
0.4
4.8
0.3
4.5
0.3
4.3
ns
A
0.3
5.4
0.3
5.4
0.3
5.4
0.3
6.4
ns
OE
B
2
28.7
1.6
9.7
1.4
8
0.7
5.7
ns
OE
A
0.7
5.5
0.7
5.5
0.7
5.5
0.7
5.5
ns
OE
B
1.6
27.6
1.3
11.4
1
8.1
0.9
6
ns
Switching Characteristics
TA = −55°C to 125°C, VCCA = 5 V ± 0.5 V (unless otherwise noted) (see Figure 2)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
A
B
25.4
14.3
10
8.2
ns
B
A
11
8.8
8.5
8.3
ns
OE
A
9.4
9.4
9.4
9.4
ns
OE
B
32.7
13.7
12
9.7
ns
OE
A
10.4
10.4
10.4
10.4
ns
OE
B
31.6
19.3
12.6
10
ns
MIN MAX
MIN
MAX
MIN
MAX
MIN
UNIT
MAX
Operating Characteristics
TA = 25°C
PARAMETER
CpdA
(1)
CpdB
(1)
(1)
10
TEST
CONDITIONS
A-port input, B-port output
B-port input, A-port output
A-port input, B-port output
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
B-port input, A-port output
VCCA =
VCCB = 1.8 V
VCCA =
VCCB = 2.5 V
VCCA =
VCCB = 3.3 V
VCCA =
VCCB = 5 V
TYP
TYP
TYP
TYP
2
2
2
3
18
19
19
22
18
19
20
22
2
2
2
2
UNIT
pF
Power dissipation capacitance per transceiver
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC16T245-EP
SN74LVC16T245-EP
www.ti.com
SCES843A – JANUARY 2013 – REVISED FEBRUARY 2013
PARAMETER MEASUREMENT INFORMATION
2 × VCCO
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCO
GND
RL
tw
LOAD CIRCUIT
VCCI
VCCI/2
Input
VCCO
CL
RL
VTP
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
15 pF
15 pF
15 pF
15 pF
2 kΩ
2 kΩ
2 kΩ
2 kΩ
0.15 V
0.15 V
0.3 V
0.3 V
VCCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCCA
Output
Control
(low-level
enabling)
VCCA/2
VCCA/2
0V
tPLZ
tPZL
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
Output
tPHL
VOH
VCCO/2
VOL
VCCO/2
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCCO
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
VCCO/2
VOL + VTP
VOL
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
VCCO/2
VOH − VTP
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
J. All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC16T245-EP
11
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
(3)
Device Marking
(4/5)
(6)
CLVC16T245MDGGEP
ACTIVE
TSSOP
DGG
48
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
LVC16T245M
CLVC16T245MDGGREP
ACTIVE
TSSOP
DGG
48
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
LVC16T245M
V62/12667-01XE
ACTIVE
TSSOP
DGG
48
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
LVC16T245M
V62/12667-01XE-T
ACTIVE
TSSOP
DGG
48
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
LVC16T245M
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
