CSD13202Q2

Order Now Product Folder Support & Community Tools & Software Technical Documents CSD13202Q2 SLPS313A – SEPTEMBER 2013 – REVISED JANUARY 2018 CSD13202Q2 12-V N-Channel NexFET™ Power MOSFETs 1 Features • • • • • • • 1 Product Summary Ultra-Low Qg and Qgd Low Thermal Resistance Avalanche Rated Lead-Free Terminal Plating RoHS Compliant Halogen Free SON 2-mm × 2-mm Plastic Package TA = 25°C TYPICAL VAUE Drain-to-Source Voltage 12 V Qg Gate Charge Total (4.5 V) 5.1 nC Qgd Gate Charge Gate-to-Drain RDS(on) Drain-to-Source On-Resistance VGS(th) Threshold Voltage DEVICE Optimized for Load Switch Applications Storage, Tablets, and Handheld Devices Optimized for Control FET Applications Point of Load Synchronous Buck Converters nC 9.1 VGS = 4.5 V 7.5 0.8 MEDIA CSD13202Q2 mΩ V 7-Inch Reel QTY PACKAGE SHIP 3000 SON 2.00-mm × 2.00-mm Plastic Package Tape and Reel Absolute Maximum Ratings TA = 25°C 3 Description This 12-V, 7.5-mΩ NexFET™ power MOSFET has been designed to minimize losses in power conversion and load management applications. The SON 2 × 2 offers excellent thermal performance for the size of the package. Top View D 0.76 VGS = 2.5 V Device Information 2 Applications • • • • UNIT VDS 1 6 D 5 D 4 S D D 2 G 3 S VALUE UNIT VDS Drain-to-Source Voltage 12 V VGS Gate-to-Source Voltage ±8 V Continuous Drain Current (Package Limit) 22 ID Continuous Drain Current(1) A 14.4 IDM Pulsed Drain Current, TA = 25°C(2) 76 A PD Power Dissipation(1) 2.7 W TJ, TSTG Operating Junction, Storage Temperature –55 to 150 °C EAS Avalanche Energy, Single Pulse ID = 20 A, L = 0.1 mH, RG = 25 Ω 20 mJ (1) RθJA = 45°C/W on 1-in2 Cu (2-oz) on 0.06-in thick FR4 PCB. (2) Pulse duration 10 μs, duty cycle ≤ 2%. P0108-01 RDS(on) vs VGS Gate Charge 4.5 TC = 25°C, I D = 5A TC = 125°C, I D = 5A 16 VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (mΩ) 18 14 12 10 8 6 4 2 0 0 1 2 3 4 5 6 VGS - Gate-to- Source Voltage (V) 7 8 G001 ID = 5A VDS =6V 4 3.5 3 2.5 2 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 Qg - Gate Charge (nC) 4.5 5 5.5 G001 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD13202Q2 SLPS313A – SEPTEMBER 2013 – REVISED JANUARY 2018 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 1 1 1 2 3 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Characteristics ............................................ 3 5.3 Typical MOSFET Characteristics.............................. 4 6 Device and Documentation Support.................... 7 6.1 6.2 6.3 6.4 6.5 7 Receiving Notification of Documentation Updates.... Community Resources.............................................. Trademarks ............................................................... Electrostatic Discharge Caution ................................ Glossary .................................................................... 7 7 7 7 7 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 Q2 Package Dimensions .......................................... 8 7.2 Q2 Tape and Reel Information................................ 10 4 Revision History Changes from Original (September 2013) to Revision A Page • Added Device Information table, Specifications section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................................................................................................. 1 • Updated the mechanical drawings ......................................................................................................................................... 8 2 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD13202Q2 CSD13202Q2 www.ti.com SLPS313A – SEPTEMBER 2013 – REVISED JANUARY 2018 5 Specifications 5.1 Electrical Characteristics TA = 25°C, unless otherwise specified PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-source voltage VGS = 0 V, ID = 250 μA IDSS Drain-to-source leakage current VGS = 0 V, VDS = 9.6 V IGSS Gate-to-source leakage current VDS = 0 V, VGS = 8 V VGS(th) Gate-to-source threshold voltage VDS = VGS, IDS = 250 μA RDS(on) Drain-to-source on-resistance gfs Transconductance 12 0.58 V 1 μA 100 nA V 0.80 1.10 VGS = 2.5 V, IDS = 5 A 9.1 11.6 VGS = 3 V, IDS = 5 A 8.4 10.4 VGS = 4.5 V, IDS = 5 A 7.5 9.3 VDS = 6 V, IDS = 5 A 44 mΩ S DYNAMIC CHARACTERISTICS CISS Input capacitance 767 997 pF COSS Output capacitance CRSS Reverse transfer capacitance 506 657 pF 43 56 Rg Series gate resistance pF 0.7 1.4 Ω Qg Qgd Gate charge total (4.5 V) 5.1 6.6 nC Gate charge gate-to-drain 0.76 Qgs Gate charge gate-to-source nC 0.98 nC Qg(th) Gate charge at Vth QOSS Output charge 0.57 nC 5.7 td(on) nC Turnon delay time 4.5 ns tr Rise time 28 ns td(off) Turnoff delay time 11.0 ns tf Fall time 13.6 ns VGS = 0V, VDS = 6 V, f = 1 MHz VDS = 6 V, IDS = 5 A VDS = 6 V, VGS = 0 V VDS = 6 V, VGS = 4.5 V, IDS = 5 A RG = 2 Ω DIODE CHARACTERISTICS VSD Diode forward voltage Qrr Reverse recovery charge trr Reverse recovery time IDS = 5 A, VGS = 0 V 0.75 VDD = 6 V, IF = 5 A, di/dt = 200 A/μs 1 V 13 nC 28 ns 5.2 Thermal Characteristics TA = 25°C unless otherwise stated MAX UNIT RθJC Thermal resistance junction-to-case (1) PARAMETER 6.4 °C/W RθJA Thermal resistance junction-to-ambient (1) (2) 60 °C/W (1) (2) MIN TYP RθJC is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in (3.81-cm × 3.81cm), 0.06-in (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design. Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD13202Q2 3 CSD13202Q2 SLPS313A – SEPTEMBER 2013 – REVISED JANUARY 2018 GATE www.ti.com GATE Source Source N-Chan N-Chan Max RθJA = 60 when mounted on 1 in2 (6.45 cm2) of 2-oz (0.071-mm) thick Cu. Max RθJA = 210 when mounted on minimum pad area of 2-oz (0.071-mm) thick Cu. DRAIN DRAIN M0164-02 M0164-01 5.3 Typical MOSFET Characteristics TA = 25°C unless otherwise stated Figure 1. Transient Thermal Impedance 4 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD13202Q2 CSD13202Q2 www.ti.com SLPS313A – SEPTEMBER 2013 – REVISED JANUARY 2018 Typical MOSFET Characteristics (continued) 50 50 45 45 IDS - Drain-to-Source Current (A) IDS - Drain-to-Source Current (A) TA = 25°C unless otherwise stated 40 35 30 25 20 15 VGS = 4.5V VGS = 3V VGS =2.5V 10 5 0 0 0.1 0.2 0.3 0.4 0.5 VDS - Drain-to-Source Voltage (V) 40 35 30 25 20 15 TC = 125°C TC = 25°C TC = −55°C 10 5 0 0.6 VDS = 5V 0 Figure 2. Saturation Characteristics 2 2.4 G001 10000 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd ID = 5A VDS =6V 4 C − Capacitance (pF) 3.5 3 2.5 2 1.5 1 1000 100 0.5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 Qg - Gate Charge (nC) 4.5 5 10 5.5 0 2 G001 Figure 4. Gate Charge 4 6 8 10 VDS - Drain-to-Source Voltage (V) 12 G001 Figure 5. Capacitance 1.1 18 RDS(on) - On-State Resistance (mΩ) ID = 250uA VGS(th) - Threshold Voltage (V) 0.8 1.2 1.6 VGS - Gate-to-Source Voltage (V) Figure 3. Transfer Characteristics 4.5 VGS - Gate-to-Source Voltage (V) 0.4 G001 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 −75 −25 25 75 125 TC - Case Temperature (ºC) Figure 6. Threshold Voltage vs Temperature 175 TC = 25°C, I D = 5A TC = 125°C, I D = 5A 16 14 12 10 8 6 4 2 0 0 G001 1 2 3 4 5 6 VGS - Gate-to- Source Voltage (V) 7 8 G001 Figure 7. On-State Resistance vs Gate-to-Source Voltage Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD13202Q2 5 CSD13202Q2 SLPS313A – SEPTEMBER 2013 – REVISED JANUARY 2018 www.ti.com Typical MOSFET Characteristics (continued) TA = 25°C unless otherwise stated 10 VGS = 2.5V VGS = 4.5V 1.4 ID =5A ISD − Source-to-Drain Current (A) Normalized On-State Resistance 1.5 1.3 1.2 1.1 1 0.9 0.8 0.7 −75 −25 25 75 125 TC - Case Temperature (ºC) 175 TC = 25°C TC = 125°C 1 0.1 0.01 0.001 0.0001 0 Figure 8. Normalized On-State Resistance vs Temperature 1 G001 Figure 9. Typical Diode Forward Voltage 1000 100 1ms 10ms 100ms 1s DC IAV - Peak Avalanche Current (A) IDS - Drain-to-Source Current (A) 0.2 0.4 0.6 0.8 VSD − Source-to-Drain Voltage (V) G001 100 10 1 0.1 Single Pulse Typical RthetaJA =165ºC/W(min Cu) 0.01 0.01 0.1 1 10 VDS - Drain-to-Source Voltage (V) 50 TC = 25ºC TC = 125ºC 10 1 0.1 0.01 0.1 1 TAV - Time in Avalanche (mS) G001 Figure 10. Maximum Safe Operating Area 10 G001 Figure 11. Single Pulse Unclamped Inductive Switching IDS - Drain- to- Source Current (A) 30.0 27.0 24.0 21.0 18.0 15.0 12.0 9.0 6.0 3.0 0.0 −50 −25 0 25 50 75 100 125 TA - AmbientTemperature (ºC) 150 175 G001 Figure 12. Maximum Drain Current vs Temperature 6 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD13202Q2 CSD13202Q2 www.ti.com SLPS313A – SEPTEMBER 2013 – REVISED JANUARY 2018 6 Device and Documentation Support 6.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 6.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 6.3 Trademarks NexFET, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 6.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD13202Q2 7 CSD13202Q2 SLPS313A – SEPTEMBER 2013 – REVISED JANUARY 2018 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 Q2 Package Dimensions 2.1 1.9 A B PIN 1 INDEX AREA 2.1 1.9 0.8 MAX C SEATING PLANE 0.05 0.00 0.75±0.1 PKG (0.2) (0.2) TYP (0.47) 0.3±0.05 3 4 7 4X 0.65 (0.5) PKG 2X 1.3 8 0.95±0.1 6 1 (0.2) PIN 1 ID (45 X0.3) 6X 1±0.1 6X 0.3 0.2 0.35 0.25 0.1 0.05 C A C B 4222322/A 08/2015 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pads must be soldered to the printed circuit board for thermal and mechanical performance. 8 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD13202Q2 CSD13202Q2 www.ti.com SLPS313A – SEPTEMBER 2013 – REVISED JANUARY 2018 Q2 Package Dimensions (continued) 7.1.1 Recommended PCB Pattern (1) PKG 6X (0.45) 1 6 8 6X (0.3) (0.95) (0.325) PKG 4X (0.65) (0.65) 7 4 3 (0.3) (R0.05) TYP (0.095) (0.75) (1.95) 0.05 MIN ALL AROUND 0.05 MAX ALL AROUND SOLDER MASK OPENING METAL NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED SOLDER MASK DETAILS 1. This package is designed to be soldered to a thermal pad on the board. For more information, see QFN/SON PCB Attachment (SLUA271). Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD13202Q2 9 CSD13202Q2 SLPS313A – SEPTEMBER 2013 – REVISED JANUARY 2018 www.ti.com Q2 Package Dimensions (continued) 7.1.2 Recommended Stencil Pattern (0.9) METAL ALL AROUND, TYP PKG 6X (0.45) 1 6 6X (0.3) 8 (0.86) (0.325) PKG 4X (0.65) (0.65) 7 (0.29) 3 (R0.05) TYP 4 (0.095) (0.7) (1.95) 1. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7.2 Q2 Tape and Reel Information 4.00 ±0.10 Ø 1.50 ±0.10 4.00 ±0.10 Ø 1.00 ±0.25 1.00 ±0.05 2.30 ±0.05 10° Max 3.50 ±0.05 8.00 +0.30 –0.10 1.75 ±0.10 2.00 ±0.05 0.254 ±0.02 2.30 ±0.05 10° Max M0168-01 Notes: 1. Measured from centerline of sprocket hole to centerline of pocket. 2. Cumulative tolerance of 10 sprocket holes is ±0.2. 3. Other material available. 4. Typical SR of form tape max 109 OHM/SQ. 5. All dimensions are in mm, unless otherwise specified. 10 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD13202Q2 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD13202Q2 ACTIVE WSON DQK 6 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -55 to 150 1322 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of