CSD13385F5
SLPS612B – OCTOBER 2016 – REVISED FEBRUARY 2022
CSD13385F5 12-V N-Channel FemtoFET™ MOSFET
.
1 Features
•
•
•
•
•
•
•
Product Summary
Low on resistance
Low Qg and Qgd
Ultra-small footprint
– 1.53 mm × 0.77 mm
Low profile
– 0.36-mm height
Integrated ESD protection diode
– Rated > 4-kV HBM
– Rated > 2-kV CDM
Lead and halogen free
RoHS compliant
TA = 25°C
12
V
Qg
Gate Charge Total (4.5 V)
3.9
nC
Qgd
Gate Charge Gate-to-Drain
0.39
nC
RDS(on)
Drain-to-Source On Resistance
VGS = 1.8 V
26
VGS = 2.5 V
18
VGS = 4.5 V
15
Threshold Voltage
0.8
mΩ
V
Device Information(1)
Optimized for industrial load switch applications
Optimized for general purpose switching
applications
DEVICE
QTY
CSD13385F5
3000
CSD13385F5T
(1)
250
MEDIA
PACKAGE
SHIP
7-Inch Reel
Femto
1.53-mm × 0.77-mm
SMD Lead Less
Tape
and
Reel
For all available packages, see the orderable addendum at
the end of the data sheet.
3 Description
Absolute Maximum Ratings
This 12-V, 15-mΩ, N-Channel FemtoFET™ MOSFET
technology is designed and optimized to minimize the
footprint in many handheld and mobile applications.
This technology is capable of replacing standard
small signal MOSFETs while providing a significant
reduction in footprint size.
TA = 25°C
VALUE
UNIT
VDS
Drain-to-Source Voltage
12
V
VGS
Gate-to-Source Voltage
8
V
ID
IDM
PD
0.36 mm
V(ESD)
TJ,
Tstg
0.77 mm
UNIT
Drain-to-Source Voltage
VGS(th)
2 Applications
•
•
TYPICAL VALUE
VDS
1.53 mm
(1)
(2)
(3)
Current(1)
4.3
Continuous Drain Current(2)
7.1
Continuous Drain
Pulsed Drain Current(1) (3)
41
Power Dissipation(1)
0.5
Power Dissipation(2)
1.4
Human-Body Model (HBM)
4
Charged-Device Model (CDM)
2
Operating Junction,
Storage Temperature
–55 to 150
A
A
W
kV
°C
Min Cu, typical RθJA = 245°C/W.
Max Cu, typical RθJA = 90°C/W.
Pulse duration ≤ 100 μs, duty cycle ≤ 1%.
G
Typical Part Dimensions
.
.
S
.
D
Top View
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CSD13385F5
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SLPS612B – OCTOBER 2016 – REVISED FEBRUARY 2022
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Specifications.................................................................. 3
5.1 Electrical Characteristics.............................................3
5.2 Thermal Information....................................................3
5.3 Typical MOSFET Characteristics................................ 3
6 Device and Documentation Support..............................7
6.1 Receiving Notification of Documentation Updates......7
6.2 Trademarks................................................................. 7
7 Mechanical, Packaging, and Orderable Information.... 8
7.1 Mechanical Dimensions.............................................. 8
7.2 Recommended Minimum PCB Layout........................9
7.3 Recommended Stencil Pattern................................... 9
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (May 2017) to Revision B (February 2022)
Page
• Changed ultra-low profile bullet from 0.35 mm to 0.36 mm in height................................................................. 1
• Updated ultra-low profile image height from 0.35 mm to 0.36 mm..................................................................... 1
• Changed ultra-low profile image height from 0.35 mm to 0.36 mm.................................................................... 8
• Added FemtoFET Surface Mount Guide note.................................................................................................... 9
Changes from Revision * (October 2016) to Revision A (May 2017)
Page
• Changed IDSS andIGSS unit value from µA to nA in the Electrical Characteristics table. ....................................3
2
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SLPS612B – OCTOBER 2016 – REVISED FEBRUARY 2022
5 Specifications
5.1 Electrical Characteristics
TA = 25°C (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
STATIC CHARACTERISTICS
BVDSS
Drain-to-source voltage
VGS = 0 V, IDS = 250 μA
IDSS
Drain-to-source leakage current
VGS = 0 V, VDS = 9.6 V
IGSS
Gate-to-source leakage current
VDS = 0 V, VGS = 8 V
VGS(th)
Gate-to-source threshold voltage
VDS = VGS, IDS = 250 μA
RDS(on)
Drain-to-source on resistance
gfs
Transconductance
12
V
50
nA
25
nA
0.8
1.2
V
VGS = 1.8 V, IDS = 0.1 A
26
50
VGS = 2.5 V, IDS = 0.9 A
18
23
VGS = 4.5 V, IDS = 0.9 A
15
19
VDS = 1.2 V, IDS = 0.9 A
11.3
0.5
mΩ
S
DYNAMIC CHARACTERISTICS
Ciss
Input capacitance
Coss
Output capacitance
519
674
pF
305
396
pF
Crss
RG
Reverse transfer capacitance
29
38
pF
Series gate resistance
20
Qg
Gate charge total (4.5 V)
3.9
Qgd
Gate charge gate-to-drain
0.39
nC
Qgs
Gate charge gate-to-source
0.74
nC
Qg(th)
Gate charge at Vth
0.46
nC
Qoss
Output charge
2.5
nC
td(on)
Turnon delay time
7
ns
tr
Rise time
10
ns
td(off)
Turnoff delay time
33
ns
tf
Fall time
10
ns
VGS = 0 V, VDS = 6 V,
ƒ = 1 MHz
VDS = 6 V, IDS = 0.9 A
VDS = 6 V, VGS = 0 V
VDS = 6 V, VGS = 4.5 V,
IDS = 0.9 A, RG = 2 Ω
Ω
5.0
nC
DIODE CHARACTERISTICS
VSD
Diode forward voltage
ISD = 0.9 A, VGS = 0 V
0.67
1.0
V
5.2 Thermal Information
TA = 25°C (unless otherwise stated)
THERMAL METRIC
RθJA
(1)
(2)
MIN
TYP
Junction-to-ambient thermal resistance(1)
90
Junction-to-ambient thermal resistance(2)
245
MAX
UNIT
°C/W
Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu.
Device mounted on FR4 material with minimum Cu mounting area.
5.3 Typical MOSFET Characteristics
TA = 25°C (unless otherwise stated)
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20
10
18
9
IDS - Drain-to-Source Current (A)
IDS - Drain-to-Source Current (A)
SLPS612B – OCTOBER 2016 – REVISED FEBRUARY 2022
16
14
12
10
8
6
4
VGS = 1.8 V
VGS = 2.5 V
VGS = 4.5 V
2
8
7
6
5
4
3
2
TC = 125°C
TC = 25°C
TC = -55°C
1
0
0
0
0.1
0.2
0.3 0.4 0.5 0.6 0.7 0.8
VDS - Drain-to-Source Voltage (V)
0.9
1
0
0.2
D002
0.4
0.6
0.8
1
1.2
1.4
VGS - Gate-to-Source Voltage (V)
Figure 5-1. Saturation Characteristics
1.6
1.8
D003
VDS = 5 V
Figure 5-2. Transfer Characteristics
Figure 5-3. Transient Thermal Impedance
1000
4
3.5
C - Capacitance (pF)
VGS - Gate-to-Source Voltage (V)
4.5
3
2.5
2
1.5
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
100
1
0.5
10
0
0
0.4
0.8
1.2 1.6
2
2.4 2.8
Qg - Gate Charge (nC)
3.2
3.6
4
0
D004
ID = 0.9 A VDS = 6 V
2
4
6
8
VDS - Drain-to-Source Voltage (V)
10
12
D005
Figure 5-5. Capacitance
Figure 5-4. Gate Charge
4
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SLPS612B – OCTOBER 2016 – REVISED FEBRUARY 2022
1.1
50
1
45
RDS(on) - On-State Resistance (m:)
VGS(th) - Threshold Voltage (V)
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0.9
0.8
0.7
0.6
0.5
0.4
0.3
-75
TC = 25°C, ID = 0.9 A
TC = 125°C, ID = 0.9 A
40
35
30
25
20
15
10
5
0
-50
-25
0
25
50
75 100
TC - Case Temperature (°C)
125
150
175
0
ID = 250 µA
Figure 5-6. Threshold Voltage vs Temperature
7
8
D007
10
VGS = 1.8 V
VGS = 4.5 V
ISD - Source-to-Drain Current (A)
Normalized On-State Resistance
2
3
4
5
6
VGS - Gate-to-Source Voltage (V)
Figure 5-7. On-State Resistance vs Gate-to-Source
Voltage
1.5
1.4
1
D006
1.3
1.2
1.1
1
0.9
TC = -55°C
TC = -40°C
TC = 25°C
TC = 125°C
TC = 150°C
1
0.1
0.01
0.001
0.8
0.7
-75
0.0001
0
-50
-25
0
25
50
75 100
TC - Case Temperature (°C)
125
150
0.1
175
0.2
0.3 0.4 0.5 0.6 0.7 0.8
VSD - Source-to-Drain Voltage (V)
0.9
1
D009
Figure 5-9. Typical Diode Forward Voltage
D008
ID = 0.9 A
Figure 5-8. Normalized On-State Resistance vs
Temperature
100
IAV - Peak Avalanche Current (A)
IDS - Drain-to-Source Current (A)
100
10
1
100 ms
10 ms
0.1
0.1
1 ms
100 µs
1
10
VDS - Drain-to-Source Voltage (V)
100
TC = 25qC
TC = 125qC
10
1
0.01
D010
Single pulse, typical RθJA = 290°C/W
Figure 5-10. Maximum Safe Operating Area (SOA)
0.1
TAV - Time in Avalanche (ms)
1
D010
D011
Figure 5-11. Single Pulse Unclamped Inductive
Switching
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SLPS612B – OCTOBER 2016 – REVISED FEBRUARY 2022
IDS - Drain-to-Source Current (A)
6
5
4
3
2
1
0
-50
-25
0
25
50
75
100 125
TA - Ambient Temperature (°C)
150
175
D012
Typical RθJA = 245°C/W
Figure 5-12. Maximum Drain Current vs Temperature
6
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SLPS612B – OCTOBER 2016 – REVISED FEBRUARY 2022
6 Device and Documentation Support
6.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
6.2 Trademarks
FemtoFET™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
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CSD13385F5
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SLPS612B – OCTOBER 2016 – REVISED FEBRUARY 2022
7 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
7.1 Mechanical Dimensions
0.77
0.69
A
B
PIN 1 INDEX AREA
1.53
1.45
C
0.36 MAX
SEATING PLANE
3
0.5
(R0.05) TYP
1
1
3X
3X
0.40
0.38
0.16
0.14
0.015
TOP B
A
4222132/A 06/2015
A.
B.
C.
All linear dimensions are in millimeters (dimensions and tolerancing per AME T14.5M-1994).
This drawing is subject to change without notice.
This package is a PB-free solder land design.
Table 7-1. Pin
Configuration
8
POSITION
DESIGNATION
Pin 1
Gate
Pin 2
Source
Pin 3
Drain
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YJK0003A
PicoStar TM - 0.35 mm max height
PicoStar TM
CSD13385F5
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SLPS612B – OCTOBER 2016 – REVISED FEBRUARY 2022
7.2 Recommended Minimum PCB Layout
3X (0.39)
(0.05) MIN
ALL AROUND
1
(R0.05) TYP
3X (0.15)
SYMM
SOLDER MASK
OPENING
TYP
(0.5)
3
YJK0003A
EXAMPLE STENCIL DESIGN
TM
METAL UNDER
PicoStar
- 0.35 mm max height
SOLDER MASK
SYMM
TYP
A.
B.
PicoStar TM
All dimensions are in millimeters.
LAND PATTERN EXAMPLE
SOLDER
MASK
DEFINED
For more information, see FemtoFET Surface Mount
Guide
(SLRA003D).
SCALE:50X
7.3 Recommended Stencil Pattern
3X (0.39)
1
3X (0.2)
(R0.05) TYP
2X (0.15)
SYMM
(0.15)
(0.525)
4222132/B 08/2016
NOTES: (continued)
3
4. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
SOLDER MASK EDGE
SYMM
TYP
A.
All dimensions are in millimeters.
SOLDER PASTE EXAMPLE
ON 0.075 - 0.1 mm THICK STENCIL
SCALE:50X
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PACKAGE OPTION ADDENDUM
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11-Jan-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
CSD13385F5
ACTIVE
PICOSTAR
YJK
3
3000
RoHS & Green
NIAU
Level-1-260C-UNLIM
-55 to 150
4V
CSD13385F5T
ACTIVE
PICOSTAR
YJK
3
250
RoHS & Green
NIAU
Level-1-260C-UNLIM
-55 to 150
4V
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of