CSD16404Q5A
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SLPS198B – AUGUST 2009 – REVISED APRIL 2010
N-Channel NexFET™ Power MOSFET
Check for Samples: CSD16404Q5A
FEATURES
1
•
•
•
•
•
•
•
2
PRODUCT SUMMARY
Ultralow Qg and Qgd
Low Thermal Resistance
Avalanche Rated
Pb Free Terminal Plating
RoHS Compliant
Halogen Free
SON 5-mm × 6-mm Plastic Package
VDS
Drain to Source Voltage
25
V
Qg
Gate Charge Total (4.5V)
6.5
nC
Qgd
Gate Charge Gate to Drain
RDS(on)
Drain to Source On Resistance
VGS(th)
Threshold Voltage
•
DESCRIPTION
The NexFET™ power MOSFET has been designed
to minimize losses in power conversion applications.
Top View
1
8
D
S
2
7
D
S
3
6
D
G
4
5
D
mΩ
VGS = 10V
4.1
mΩ
1.8
V
ORDERING INFORMATION
Point-of-Load Synchronous Buck Converter
for Applications in Networking, Telecom and
Computing Systems
Optimized for Control FET Applications
S
nC
5.7
Device
Package
Media
CSD16404Q5A
SON 5-mm × 6-mm
Plastic Package
13-Inch
Reel
APPLICATIONS
•
1.7
VGS = 4.5V
Qty
Ship
2500
Tape and
Reel
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise stated
VALUE
UNIT
VDS
Drain to Source Voltage
25
V
VGS
Gate to Source Voltage
+16 / –12
V
Continuous Drain Current, TC = 25°C
81
A
Continuous Drain Current(1)
21
A
IDM
Pulsed Drain Current, TA = 25°C(2)
135
A
PD
Power Dissipation(1)
3
W
TJ,
TSTG
Operating Junction and Storage
Temperature Range
–55 to 150
°C
EAS
Avalanche Energy, single pulse
ID = 40A, L = 0.1mH, RG = 25Ω
80
mJ
ID
(1) RqJA = 41°C/W on 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick)
Cu pad on a 0.06-inch (1.52-mm) thick FR4 PCB.
(2) Pulse duration ≤300ms, duty cycle ≤2%
D
P0093-01
RDS(on) vs VGS
GATE CHARGE
12
ID = 20A
VDS = 12.5V
ID = 20A
18
10
16
VG − Gate Voltage − V
RDS(on) − On-State Resistance − mΩ
20
14
12
TC = 125°C
10
8
6
4
8
6
4
2
2
TC = 25°C
0
0
0
2
4
6
8
VGS − Gate to Source Voltage − V
10
12
G006
0
3
6
9
Qg − Gate Charge − nC
12
15
G003
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NexFET is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2010, Texas Instruments Incorporated
CSD16404Q5A
SLPS198B – AUGUST 2009 – REVISED APRIL 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ELECTRICAL CHARACTERISTICS
TA = 25°C, unless otherwise specified
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Static Characteristics
BVDSS
Drain to Source Voltage
VGS = 0V, ID = 250mA
IDSS
Drain to Source Leakage Current
VGS = 0V, VDS = 20V
IGSS
Gate to Source Leakage Current
VDS = 0V, VGS = +16/-12V
VGS(th)
Gate to Source Threshold Voltage
VDS = VGS, ID = 250mA
RDS(on)
Drain to Source On Resistance
gfs
Transconductance
25
V
1
mA
100
nA
1.8
2.1
V
VGS = 4.5V, ID = 20A
5.7
7.2
mΩ
VGS = 10V, ID = 20A
4.1
5.1
mΩ
VDS = 15V, ID = 20A
57
1.4
S
Dynamic Characteristics
CISS
Input Capacitance
COSS
Output Capacitance
940
1220
pF
810
1050
CRSS
pF
Reverse Transfer Capacitance
62
80
pF
Rg
Series Gate Resistance
0.9
1.8
Ω
Qg
Gate Charge Total (4.5V)
6.5
8.5
nC
Qgd
Gate Charge Gate to Drain
Qgs
Gate Charge Gate to Source
Qg(th)
Gate Charge at Vth
QOSS
Output Charge
td(on)
Turn On Delay Time
tr
Rise Time
td(off)
Turn Off Delay Time
tf
Fall Time
VGS = 0V, VDS = 12.5V , f = 1MHz
VDS = 12.5V, ID = 20A
VDS = 13V, VGS = 0V
VDS = 12.5V, VGS = 4.5V,
ID = 20A, RG = 2Ω
1.7
nC
3
nC
1.5
nC
16
nC
7.8
ns
13.4
ns
8.4
ns
4.6
ns
Diode Characteristics
VSD
Diode Forward Voltage
IS = 20A, VGS = 0V
Qrr
Reverse Recovery Charge
VDD = 13V, IF = 20A, di/dt = 300A/ms
0.85
20
1
nC
V
trr
Reverse Recovery Time
VDD = 13V, IF = 20A, di/dt = 300A/ms
22
ns
THERMAL CHARACTERISTICS
TA = 25°C, unless otherwise specified
PARAMETER
RqJC
RqJA
(1)
(2)
2
MIN
Thermal Resistance Junction to Case (1)
Thermal Resistance Junction to Ambient
(1) (2)
2
TYP
MAX
UNIT
3.3
°C/W
52
°C/W
2
RqJC is determined with the device mounted on a 1-inch (6.45-cm ), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm ×
3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RqJC is specified by design, whereas RqJA is determined by the user’s board design.
Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
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CSD16404Q5A
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SLPS198B – AUGUST 2009 – REVISED APRIL 2010
GATE
GATE
Source
N-Chan 5x6 QFN TTA MIN Rev3
N-Chan 5x6 QFN TTA MAX Rev3
Max RqJA = 52°C/W
when mounted on
1 inch2 (6.45 cm2) of
2-oz. (0.071-mm thick)
Cu.
Source
Max RqJA = 120°C/W
when mounted on
minimum pad area of
2-oz. (0.071-mm thick)
Cu.
DRAIN
DRAIN
M0137-02
M0137-01
Text
Text
Text
and
and
and
br
br
br
Added
Added
Added
for
for
for
Spacing
Spacing
Spacing
TYPICAL MOSFET CHARACTERISTICS
TA = 25°C, unless otherwise specified
ZqJA – Normalized Thermal Impedance
10
1
0.5
0.3
0.1
0.01
Duty Cycle = t1/t2
0.1
0.05
P
0.02
0.01
t1
t2
Single Pulse
RqJA = 96°C/W (min Cu)
TJ = P ´ ZqJA ´ RqJA
0.001
0.001
0.01
0.1
1
10
100
1k
tp – Pulse Duration – s
G012
Figure 1. Transient Thermal Impedance
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CSD16404Q5A
SLPS198B – AUGUST 2009 – REVISED APRIL 2010
www.ti.com
TYPICAL MOSFET CHARACTERISTICS (continued)
TA = 25°C, unless otherwise specified
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
60
60
VDS = 5V
VGS = 10V
50
ID − Drain Current − A
ID − Drain Current − A
50
VGS = 3.5V
40
30
VGS = 4.5V
VGS = 3V
20
VGS = 2.5V
10
0
0.0
0.5
1.0
1.5
2.0
40
TC = 125°C
30
20
TC = 25°C
2.5
0
1.5
3.0
VDS − Drain to Source Voltage − V
2.0
2.5
G001
TEXT ADDED FOR SPACING
4.0
4.5
G002
TEXT ADDED FOR SPACING
3.0
ID = 20A
VDS = 12.5V
f = 1MHz
VGS = 0V
2.5
C − Capacitance − nF
10
VG − Gate Voltage − V
3.5
Figure 3. Transfer Characteristics
12
8
6
4
2
2.0
COSS = CDS + CGD
1.5
CISS = CGD + CGS
1.0
CRSS = CGD
0.5
0
0.0
0
3
6
9
12
15
Qg − Gate Charge − nC
0
5
15
20
25
G004
Figure 5. Capacitance
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
2.5
RDS(on) − On-State Resistance − mΩ
20
ID = 250µA
2.3
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
−75
10
VDS − Drain to Source Voltage − V
G003
Figure 4. Gate Charge
VGS(th) − Threshold Voltage − V
3.0
VGS − Gate to Source Voltage − V
Figure 2. Saturation Characteristics
ID = 20A
18
16
14
12
TC = 125°C
10
8
6
4
2
TC = 25°C
0
−25
25
75
125
175
TC − Case Temperature − °C
0
2
4
6
8
VGS − Gate to Source Voltage − V
G005
Figure 6. Threshold Voltage vs. Temperature
4
TC = −55°C
10
10
12
G006
Figure 7. On-State Resistance vs. Gate to Source Voltage
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CSD16404Q5A
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SLPS198B – AUGUST 2009 – REVISED APRIL 2010
TYPICAL MOSFET CHARACTERISTICS (continued)
TA = 25°C, unless otherwise specified
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
100
1.4
ID = 20A
VGS = 10V
ISD − Source to Drain Current − A
Normalized On-State Resistance
1.5
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
−75
10
1
TC = 125°C
0.1
TC = 25°C
0.01
0.001
0.0001
−25
25
75
125
175
TC − Case Temperature − °C
0.0
0.2
G007
Figure 8. Normalized On-State Resistance vs. Temperature
1.0
1.2
G008
TEXT ADDED FOR SPACING
I(AV) − Peak Avalanche Current − A
100
ID − Drain Current − A
0.8
1k
1k
100ms
10
1ms
10ms
Area Limited
by RDS(on)
100ms
0.1
0.01
0.01
0.6
Figure 9. Typical Diode Forward Voltage
TEXT ADDED FOR SPACING
1
0.4
VSD − Source to Drain Voltage − V
Single Pulse
RθJA = 96°C/W (min Cu)
0.1
DC
1
10
TC = 125°C
10
1
0.01
100
VDS − Drain To Source Voltage − V
TC = 25°C
100
0.1
1
10
t(AV) − Time in Avalanche − ms
G009
Figure 10. Maximum Safe Operating Area
100
G010
Figure 11. Single Pulse Unclamped Inductive Switching
TEXT ADDED FOR SPACING
120
ID − Drain Current − A
100
80
60
40
20
0
−50
−25
0
25
50
75
100
125
TC − Case Temperature − °C
150
175
G011
Figure 12. Maximum Drain Current vs. Temperature
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CSD16404Q5A
SLPS198B – AUGUST 2009 – REVISED APRIL 2010
www.ti.com
MECHANICAL DATA
Q5A Package Dimensions
L
E2
H
K
7
D2
3
4
b
4
5
5
6
3
6
e
D1
7
2
2
8
8
1
1
q
L1
Top View
Bottom View
Side View
c
A
q
E1
E
Front View
M0135-01
DIM
MILLIMETERS
MIN
NOM
MAX
A
0.90
1.00
1.10
b
0.33
0.41
0.51
c
0.20
0.25
0.30
D1
4.80
4.90
5.00
D2
3.61
3.81
3.96
E
5.90
6.00
6.10
E1
5.70
5.75
5.80
E2
3.38
3.58
3.78
e
6
1.27 BSC
H
0.41
K
1.10
0.51
0.61
L
0.51
0.61
0.71
L1
0.06
0.13
0.20
q
0°
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12°
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): CSD16404Q5A
CSD16404Q5A
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SLPS198B – AUGUST 2009 – REVISED APRIL 2010
Recommended PCB Pattern
DIM
F7
4
5
8
1
F3
F11
F5
F9
F2
MIN
MAX
MIN
MAX
6.205
6.305
0.244
0.248
F2
4.46
4.56
0.176
0.18
F3
4.46
4.56
0.176
0.18
F4
0.65
0.7
0.026
0.028
F5
0.62
0.67
0.024
0.026
F6
0.63
0.68
0.025
0.027
F7
0.7
0.8
0.028
0.031
F8
0.65
0.7
0.026
0.028
F9
0.62
0.67
0.024
0.026
F10
4.9
5
0.193
0.197
F11
4.46
4.56
0.176
0.18
F8
F4
F10
INCHES
F1
F1
F6
MILLIMETERS
M0139-01
For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through
PCB Layout Techniques.
K0
4.00 ±0.10 (See Note 1)
0.30 ±0.05
2.00 ±0.05
+0.10
–0.00
12.00 ±0.30
Ø 1.50
1.75 ±0.10
Q5A Tape and Reel Information
5.50 ±0.05
B0
R 0.30 MAX
A0
8.00 ±0.10
Ø 1.50 MIN
A0 = 6.50 ±0.10
B0 = 5.30 ±0.10
K0 = 1.40 ±0.10
R 0.30 TYP
M0138-01
Notes: 1. 10-sprocket hole-pitch cumulative tolerance ±0.22
2. Camber not to exceed 1mm in 100mm, noncumulative over 250mm
3. Material: black static-dissipative polystyrene
4. All dimensions are in mm, unless otherwise specified.
5. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket
6. MSL1 260°C (IR and convection) PbF reflow compatible
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CSD16404Q5A
SLPS198B – AUGUST 2009 – REVISED APRIL 2010
www.ti.com
REVISION HISTORY
Changes from Original (August 2009) to Revision A
•
Changed Figure 10 - Maximum Safe Operating Area, Drain Current top scale From: 100ms To: 100µs ........................... 5
Changes from Revision A (September 2009) to Revision B
•
8
Page
Page
Deleted the Package Marking Information section ............................................................................................................... 7
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PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
CSD16404Q5A
Package Package Pins
Type Drawing
SPQ
VSONP
2500
DQJ
8
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
330.0
12.4
Pack Materials-Page 1
6.3
B0
(mm)
K0
(mm)
P1
(mm)
5.3
1.2
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2020
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
CSD16404Q5A
VSONP
DQJ
8
2500
340.0
340.0
38.0
Pack Materials-Page 2
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