CSD16408Q5

CSD16408Q5 www.ti.com SLPS228A – OCTOBER 2009 – REVISED SEPTEMBER 2010 N-Channel NexFET™ Power MOSFET FEATURES 1 • • • • 2 PRODUCT SUMMARY Ultralow Qg and Qgd Low Thermal Resistance Avalanche Rated SON 5-mm × 6-mm Plastic Package APPLICATIONS • • VDS Drain-to-source voltage 25 V Qg Gate charge, total (4.5 V) 6.7 nC Qgd Gate charge, gate-to-drain rDS(on) Drain-to-source on-resistance VGS(th) Threshold voltage Point-of-Load Synchronous Buck in Networking, Telecom and Computing Systems Optimized for Control FET Applications DESCRIPTION S 8 1 D 7 2 mΩ Package Media CSD16408Q5 13-inch (33-cm) reel D 6 3 5 4 V Qty Ship 2500 Tape and reel ABSOLUTE MAXIMUM RATINGS VALUE UNIT VDS Drain-to-source voltage 25 V VGS Gate-to-source voltage –12 to 16 V Continuous drain current, TC = 25°C 113 A Continuous drain current (1) 22 A IDM Pulsed drain current, TA = 25°C (2) 141 A PD Power dissipation (1) 3.1 W TJ, TSTG Operating junction and storage temperature range –55 to 150 °C EAS Avalanche energy, single-pulse ID = 23 A, L = 0.1 mH, RG = 25 Ω 126 mJ D P0094-01 (1) (2) Typical RqJA = 41°C/W on 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 0.06-inch (1.52-mm) thick FR4 PCB. Pulse duration ≤300 ms, duty cycle ≤2% put a break here is force notes closer to the table put a break here is force notes closer to the table rDS(on) vs VGS GATE CHARGE 12 16 ID = 25A 14 VGS − Gate to Source Voltage − V RDS(on) − On-State Resistance − mΩ 3.6 1.8 SON 5-mm × 6-mm plastic package D D G VGS = 10 V ORDERING INFORMATION ID S mΩ TA = 25°C unless otherwise stated Top View nC 5.4 Device The NexFET™ power MOSFET has been designed to minimize losses in power conversion applications. S 1.9 VGS = 4.5 V 12 10 TC = 125°C 8 6 4 2 TC = 25°C 0 ID = 25A VDS = 12.5V 10 8 6 4 2 0 0 2 4 6 8 VGS − Gate to Source Voltage − V 10 12 G006 0 5 10 Qg − Gate Charge − nC 15 20 G003 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NexFET is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2010, Texas Instruments Incorporated CSD16408Q5 SLPS228A – OCTOBER 2009 – REVISED SEPTEMBER 2010 www.ti.com ELECTRICAL CHARACTERISTICS TA = 25°C unless otherwise stated PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain-to-source voltage VGS = 0 V, ID = 250 mA IDSS Drain-to-source leakage VGS = 0 V, VDS = 20 V IGSS Gate-to-source leakage VDS = 0 V, VGS = –12 V to 16 V VGS(th) Gate-to-source threshold voltage VDS = VGS, ID = 250 mA rDS(on) Drain-to-source on-resistance gfs Transconductance 25 V 1 mA 100 nA 1.8 2.1 V VGS = 4.5 V, ID = 25 A 5.4 6.8 mΩ VGS = 10 V, ID = 25 A 3.6 4.5 mΩ VDS = 15 V, ID = 25 A 60 1.4 S Dynamic Characteristics CISS Input capacitance COSS Output capacitance 990 1300 pF 760 1000 pF CRSS Rg Reverse transfer capacitance 75 100 pF Series gate resistance 0.8 1.6 Ω Qg Gate charge total (4.5 V) 6.7 8.9 nC Qgd Gate charge, gate-to-drain Qgs Gate charge, gate-to-source Qg(th) Gate charge at Vth QOSS Output charge td(on) Turnon delay time tr Rise time td(off) Turnoff delay time tf Fall time VGS = 0 V, VDS = 12.5 V , f = 1 MHz VDS = 12.5 V, ID = 25 A VDS = 13 V, VGS = 0 V VDS = 12.5 V, VGS = 4.5 V, ID = 20 A, RG = 2 Ω 1.9 nC 3.1 nC 1.8 nC 15.7 nC 11.3 ns 25 ns 11 ns 10.8 ns Diode Characteristics VSD Diode forward voltage IS = 25 A, VGS = 0 V 0.8 Qrr Reverse recovery charge VDD = 13 V, IF = 2 5A, di/dt = 300 A/ms 17 1 nC V trr Reverse recovery time VDD = 13 V, IF = 25 A, di/dt = 300 A/ms 21 ns THERMAL CHARACTERISTICS TA = 25°C unless otherwise stated PARAMETER RqJC Thermal Resistance Junction to Case (1) RqJA Thermal Resistance Junction to Ambient (1) (1) (2) 2 MIN (2) 2 TYP MAX UNIT 1.9 °C/W 51 °C/W 2 RqJC is determined with the device mounted on a 1-inch (6.45-cm ), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RqJC is specified by design, whereas RqJA is determined by the user’s board design. Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu. Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated CSD16408Q5 www.ti.com SLPS228A – OCTOBER 2009 – REVISED SEPTEMBER 2010 GATE GATE Source N-Chan 5x6 QFN TTA MIN Rev3 N-Chan 5x6 QFN TTA MAX Rev3 Max RqJA = 51ºC/W when mounted on 1 inch2 (6.45 cm2) of 2-oz. (0.071-mm thick) Cu. Source Max RqJA = 125ºC/W when mounted on minimum pad area of 2-oz. (0.071-mm thick) Cu. DRAIN DRAIN M0137-02 M0137-01 break break break break TYPICAL MOSFET CHARACTERISTICS TA = 25°C unless otherwise stated ZθJA − Normalized Thermal Impedance 10 1 0.5 0.3 0.1 Duty Cycle = t1/t2 0.1 0.05 P 0.02 0.01 t1 0.01 t2 o Typical RqJA = 100 C/W (min Cu) TJ = P x ZqJA x RqJA Single Pulse 0.001 0.001 0.01 0.1 1 10 100 t P − Pulse Duration − s 1k G012 Figure 1. Transient Thermal Impedance Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 3 CSD16408Q5 SLPS228A – OCTOBER 2009 – REVISED SEPTEMBER 2010 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) TA = 25°C unless otherwise stated break 60 IDS − Drain to Source Current − A IDS − Drain to Source Current − A 60 50 VGS = 3.5V VGS = 10V 40 VGS = 4.5V 30 VGS = 3V VGS = 4V 20 10 0 0.0 0.5 1.0 1.5 2.0 2.5 TC = 125°C 40 30 TC = 25°C 20 10 TC = −55°C 0 1.5 3.0 VDS − Drain to Source Voltage − V VDS = 5V 50 G001 3.5 4.0 G002 3.0 ID = 25A VDS = 12.5V f = 1MHz VGS = 0V 2.5 C − Capacitance − nF 10 8 6 4 2 2.0 COSS = CDS + CGD CISS = CGD + CGS 1.5 1.0 CRSS = CGD 0.5 0 0.0 0 5 10 15 20 Qg − Gate Charge − nC 0 5 G003 15 20 25 G004 Figure 5. Capacitance 2.25 RDS(on) − On-State Resistance − mΩ 16 ID = 250µA 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.00 −75 10 VDS − Drain to Source Voltage − V Figure 4. Gate Charge VGS(th) − Threshold Voltage − V 3.0 Figure 3. Transfer Characteristics 12 ID = 25A 14 12 10 TC = 125°C 8 6 4 2 TC = 25°C 0 −25 25 75 125 175 TC − Case Temperature − °C Figure 6. Threshold Voltage vs. Temperature 4 2.5 VGS − Gate to Source Voltage − V Figure 2. Saturation Characteristics VGS − Gate to Source Voltage − V 2.0 Submit Documentation Feedback G005 0 2 4 6 8 VGS − Gate to Source Voltage − V 10 12 G006 Figure 7. On-State Resistance vs. Gate-to-Source Voltage Copyright © 2009–2010, Texas Instruments Incorporated CSD16408Q5 www.ti.com SLPS228A – OCTOBER 2009 – REVISED SEPTEMBER 2010 TYPICAL MOSFET CHARACTERISTICS (continued) TA = 25°C unless otherwise stated 100 ID = 20A VGS = 10V 1.6 ISD − Source to Drain Current − A Normalized On-State Resistance 1.8 1.4 1.2 1.0 0.8 0.6 0.4 −75 10 1 TC = 125°C 0.1 0.01 TC = 25°C 0.001 0.0001 −25 25 75 125 175 TC − Case Temperature − °C 0.0 0.4 0.6 0.8 1.0 VSD − Source to Drain Voltage − V G007 Figure 8. Normalized On-State Resistance vs. Temperature G008 Figure 9. Typical Diode Forward Voltage 1k I(AV) − Peak Avalanche Current − A 1k IDS − Drain to Source Current − A 0.2 100 1ms 10 10ms 1 100ms Area Limited by RDS(on) 1s 0.1 Single Pulse o Typical RqJA = 100 C/W (min Cu) 0.01 0.01 0.1 DC 1 10 TC = 25°C 10 TC = 125°C 1 0.001 100 VDS - Drain to Source Voltage - V 100 0.01 0.1 1 10 100 t(AV) − Time in Avalanche − ms G009 Figure 10. Maximum Safe Operating Area G010 Figure 11. Single-Pulse Unclamped Inductive Switching IDS − Drain to Source Current − A 120 100 80 60 40 20 0 −50 −25 0 25 50 75 100 TC − Case Temperature − °C 125 150 175 G011 Figure 12. Maximum Drain Current vs. Temperature Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 5 CSD16408Q5 SLPS228A – OCTOBER 2009 – REVISED SEPTEMBER 2010 www.ti.com MECHANICAL DATA Q5 Package Dimensions K L L c1 E1 E2 b D2 4 4 5 5 e 3 6 3 6 E D1 7 7 2 2 8 8 1 1 q Top View Bottom View Side View c E1 A q Front View M0140-01 DIM MILLIMETERS MAX MIN MAX A 0.950 1.050 0.037 0.039 b 0.360 0.460 0.014 0.018 c 0.150 0.250 0.006 0.010 c1 0.150 0.250 0.006 0.010 D1 4.900 5.100 0.193 0.201 D2 4.320 4.520 0.170 0.178 E 4.900 5.100 0.193 0.201 E1 5.900 6.100 0.232 0.240 E2 3.920 4.12 0.154 e 6 INCHES MIN 1.27 typ 0.162 0.050 L 0.510 0.710 0.020 0.028 q 0.00 – – – Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated CSD16408Q5 www.ti.com SLPS228A – OCTOBER 2009 – REVISED SEPTEMBER 2010 DIM Recommended PCB Pattern F1 F7 F3 8 1 F2 F11 F5 F9 5 4 F6 INCHES MAX MIN MAX F1 6.205 6.305 0.244 0.248 F2 4.46 4.56 0.176 0.18 F3 4.46 4.56 0.176 0.18 F4 0.65 0.7 0.026 0.028 F5 0.62 0.67 0.024 0.026 F6 0.63 0.68 0.025 0.027 F7 0.7 0.8 0.028 0.031 F8 0.65 0.7 0.026 0.028 F9 0.62 0.67 0.024 0.026 F10 4.9 5 0.193 0.197 F11 4.46 4.56 0.176 0.18 F4 F8 F10 MILLIMETERS MIN M0139-01 For recommended circuit layout for PCB designs, see application note Reducing Ringing Through PCB Layout Techniques (SLPA005). K0 4.00 ±0.10 (See Note 1) 0.30 ±0.05 2.00 ±0.05 +0.10 –0.00 12.00 ±0.30 Ø 1.50 1.75 ±0.10 Q5 Tape and Reel Information 5.50 ±0.05 B0 R 0.30 MAX A0 8.00 ±0.10 Ø 1.50 MIN A0 = 6.50 ±0.10 B0 = 5.30 ±0.10 K0 = 1.40 ±0.10 R 0.30 TYP M0138-01 Notes: 1. 10-sprocket hole-pitch cumulative tolerance ±0.2 2. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm 3. Material: black static-dissipative polystyrene 4. All dimensions are in mm, unless otherwise specified. 5. A0 and B0 measured on a plane 0.3 mm above the bottom of the pocket 6. MSL1 260°C (IR and convection) PbF reflow compatible Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 7 CSD16408Q5 SLPS228A – OCTOBER 2009 – REVISED SEPTEMBER 2010 www.ti.com REVISION HISTORY Changes from Revision Original (October 2009) to Revision A Page • Deleted environmental bullets from features list ................................................................................................................... 1 • Deleted package marking section from end of data sheet ................................................................................................... 7 8 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD16408Q5 ACTIVE VSON-CLIP DQH 8 2500 RoHS-Exempt & Green SN Level-1-260C-UNLIM -55 to 150 CSD16408 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of