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CSD17308Q3
SLPS262C – FEBRUARY 2010 – REVISED DECEMBER 2019
CSD17308Q3 30-V N-Channel NexFET™ Power MOSFETs
1 Features
•
•
•
•
•
•
•
•
1
Product Summary
Optimized for 5-V gate drive
Ultra-low Qg and Qgd
Low thermal resistance
Avalanche rated
Lead-free terminal plating
RoHS compliant
Halogen free
VSON 3.3 mm × 3.3 mm plastic package
TA = 25°C
VALUE
UNIT
VDS
Drain-to-source voltage
30
V
Qg
Gate charge total (4.5 V)
3.9
nC
Qgd
Gate charge gate-to-drain
0.8
RDS(on)
VGS(th)
VGS = 4.5 V
9.4
VGS = 8 V
8.2
Threshold voltage
DEVICE
Notebook point of load
Point-of-load synchronous buck in networking,
telecom, and computing systems
CSD17308Q3
This 30-V, 8.2-mΩ, 3.3 mm × 3.3 mm VSON
NexFET™ power MOSFET is designed to minimize
losses in power conversion applications and
optimized for 5-V gate drive applications.
Top View
1.3
V
QTY
MEDIA
PACKAGE
SHIP
2500
13-Inch
Reel
SON 3.30 mm × 3.30 mm
Plastic Package
Tape and
Reel
Absolute Maximum Ratings
TA = 25°C unless otherwise stated
VALUE
UNIT
VDS
Drain-to-source voltage
30
V
VGS
Gate-to-source voltage
+10 / –8
V
ID
8
S
D
IDM
Continuous drain current (package limited)
50
Continuous drain current, TC = 25°C
44
Continuous drain current(1)
14
Pulsed drain current, TA = 25°C(2)
167
Power dissipation(1)
2.7
Power dissipation, TC = 25°C
28
S
7
D
PD
S
6
D
TJ,
Tstg
Operating junction and storage temperature
5
D
EAS
Avalanche energy, single pulse
ID = 36 A, L = 0.1 mH, RG = 25 Ω
D
G
mΩ
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
3 Description
A
A
W
–55 to 150
°C
65
mJ
(1) Typical RθJA = 46°C/W when mounted on a 1-in2 (6.45-cm2),
2-oz (0.071-mm) thick Cu pad on a 0.06-in (1.52-mm) thick
FR4 PCB.
(2) Max RθJC = 4.5°C/W, pulse duration ≤ 100 μs, duty cycle ≤
1%.
P0095-01
RDS(on) vs VGS
Gate Charge
30
8
VGS - Gate-to-Source Voltage (V)
RDS(on) - On-State Resistance (m:)
12.5
Device Information(1)
2 Applications
•
•
Drain-to-source on-resistance
nC
VGS = 3 V
25
20
15
10
5
ID = 10 A
7 VDS = 15 V
6
5
4
3
2
1
0
0
0
1
2
3
4
5
6
7
8
VGS - Gate-to-Source Voltage (V)
9
10
D007
0
1
2
3
4
5
Qg - Gate Charge (nC)
6
7
D004
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CSD17308Q3
SLPS262C – FEBRUARY 2010 – REVISED DECEMBER 2019
www.ti.com
Table of Contents
1
2
3
4
5
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Specifications.........................................................
1
1
1
2
3
5.1 Electrical Characteristics........................................... 3
5.2 Thermal Information .................................................. 3
5.3 Typical MOSFET Characteristics.............................. 5
6
Device and Documentation Support.................... 8
6.1
6.2
6.3
6.4
7
Support Resources ...................................................
Trademarks ...............................................................
Electrostatic Discharge Caution ................................
Glossary ....................................................................
8
8
8
8
Mechanical, Packaging, and Orderable
Information ............................................................. 9
7.1
7.2
7.3
7.4
Q3 Package Dimensions .......................................... 9
Recommended PCB Pattern................................... 10
Recommended Stencil Opening ............................. 10
Q3 Tape and Reel Information................................ 11
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (October 2015) to Revision C
•
Page
Changed VGS(th) MAX specification in the Electrical Characteristics table, From 1.8 V : To 1.6 V ........................................ 3
Changes from Revision A (February 2010) to Revision B
Page
•
Added part number to title ..................................................................................................................................................... 1
•
Added Package Limited Continuous Drain Current ............................................................................................................... 1
•
Added line for Power Dissipation, TC = 25°C in Absolute Maximum Ratings table ............................................................... 1
•
Updated pulsed current conditions ........................................................................................................................................ 1
•
Updated Figure 1 to show RθJC curves................................................................................................................................... 5
•
Added 4.5 V curve in Figure 8................................................................................................................................................ 6
•
Updated Figure 10.................................................................................................................................................................. 7
•
Added the Device and Documentation Support section ........................................................................................................ 8
•
Updated the Mechanical, Packaging, and Orderable Information section ............................................................................. 9
Changes from Original (February 2010) to Revision A
•
2
Page
Deleted the Package Marking Information section............................................................................................................... 11
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SLPS262C – FEBRUARY 2010 – REVISED DECEMBER 2019
5 Specifications
5.1 Electrical Characteristics
TA = 25°C unless otherwise stated
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
STATIC CHARACTERISTICS
BVDSS
Drain-to-source voltage
VGS = 0 V, ID = 250 μA
IDSS
Drain-to-source leakage current
VGS = 0 V, VDS = 24 V
IGSS
Gate-to-source leakage current
VDS = 0 V, VGS = +10 / –8 V
VGS(th)
Gate-to-source threshold voltage
VDS = VGS, ID = 250 μA
30
0.9
Drain-to-source on-resistance
gfs
Transconductance
μA
100
nA
V
1.3
1.6
12.5
16.5
VGS = 4.5 V, ID = 10 A
9.4
11.8
VGS = 8 V, ID = 10 A
8.2
10.3
VDS = 15 V, ID = 10 A
37
VGS = 3 V, ID = 10 A
RDS(on)
V
1
mΩ
S
DYNAMIC CHARACTERISTICS
CISS
Input capacitance
540
700
pF
COSS
Output capacitance
CRSS
Reverse transfer capacitance
280
365
pF
27
35
Rg
pF
Series gate resistance
0.9
1.8
Ω
Qg
Gate charge total (4.5 V)
3.9
5.1
nC
Qgd
Gate charge gate-to-drain
0.8
nC
Qgs
Gate charge gate-to-source
1.3
nC
Qg(th)
Gate charge at Vth
0.7
nC
QOSS
Output charge
7.4
nC
td(on)
Turnon delay time
4.5
ns
tr
Rise time
5.7
ns
td(off)
Turnoff delay time
9.9
ns
tf
Fall time
2.3
ns
VGS = 0 V, VDS = 15 V, ƒ = 1 MHz
VDS = 15 V, ID = 10 A
VDS = 13 V, VGS = 0 V
VDS = 15 V, VGS = 4.5 V, ID = 10 A,
RG = 2 Ω
DIODE CHARACTERISTICS
VSD
Diode forward voltage
Qrr
Reverse recovery charge
trr
Reverse recovery time
IDS = 10 A, VGS = 0 V
0.85
VDD = 13 V, IF = 10 A, di/dt = 300 A/μs
1
V
9.3
nC
14.3
ns
5.2 Thermal Information
TA = 25°C unless otherwise stated
MAX
UNIT
RθJC
Junction-to-case thermal resistance (1)
THERMAL METRIC
4.5
°C/W
RθJA
Junction-to-ambient thermal resistance (1) (2)
58
°C/W
(1)
(2)
MIN
TYP
RθJC is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in (3.81-cm × 3.81cm), 0.06-in (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu.
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CSD17308Q3
SLPS262C – FEBRUARY 2010 – REVISED DECEMBER 2019
GATE
www.ti.com
GATE
Source
Source
Max RθJA = 58°C/W
when mounted on 1 in2
(6.45 cm2) of
2-oz (0.071-mm) thick
Cu.
DRAIN
DRAIN
M0161-02
M0161-01
4
Max RθJA = 165°C/W
when mounted on a
minimum pad area of
2-oz (0.071-mm) thick)
Cu.
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SLPS262C – FEBRUARY 2010 – REVISED DECEMBER 2019
5.3 Typical MOSFET Characteristics
TA = 25°C unless otherwise stated
Figure 1. Transient Thermal Impedance
30
IDS - Drain-to-Source Current (A)
IDS - Drain-to-Source Current (A)
50
40
30
20
10
VGS = 3.5 V
VGS = 4.5 V
VGS = 8.0 V
0
TC = 125° C
TC = 25° C
TC = -55° C
25
20
15
10
5
0
0
0.2
0.4
0.6
0.8
VDS - Drain-to-Source Voltage (V)
1
1
1.2
D002
1.4
1.6 1.8
2
2.2 2.4 2.6
VGS - Gate-to-Source Voltage (V)
2.8
3
D003
VDS = 5 V
Figure 2. Saturation Characteristics
Figure 3. Transfer Characteristics
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CSD17308Q3
SLPS262C – FEBRUARY 2010 – REVISED DECEMBER 2019
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Typical MOSFET Characteristics (continued)
TA = 25°C unless otherwise stated
10000
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
7
6
C - Capacitance (pF)
VGS - Gate-to-Source Voltage (V)
8
5
4
3
2
1000
100
1
10
0
0
1
2
3
4
5
Qg - Gate Charge (nC)
ID = 10 A
6
0
7
5
D004
10
15
20
25
VDS - Drain-to-Source Voltage (V)
Figure 4. Gate Charge
Figure 5. Capacitance
30
RDS(on) - On-State Resistance (m:)
VGS(th) - Threshold Voltage (V)
1.5
1.3
1.1
0.9
25
20
15
10
5
0
-50
-25
0
25
50
75 100
TC - Case Temperature (°C)
125
150
0
175
1
2
D006
3
4
5
6
7
8
VGS - Gate-to-Source Voltage (V)
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
ISD - Source-to-Drain Current (A)
Normalized On-State Resistance
D007
100
VGS = 4.5 V
VGS = 8.0 V
1.2
1
0.8
0.6
TC = 25°C
TC = 125°C
10
1
0.1
0.01
0.001
0.0001
-50
-25
0
25
50
75 100
TC - Case Temperature (°C)
ID = 10 A
125
150
175
0
0.2
D008
0.4
0.6
0.8
VSD - Source-to-Drain Voltage (V)
1
D009
VGS = 8 V
Figure 8. Normalized On-State Resistance vs Temperature
6
10
Figure 7. On-State Resistance vs Gate-to-Source Voltage
1.4
0.4
-75
9
ID = 10 A
1.8
1.6
D005
VDS = 15 V
1.7
0.7
-75
30
Figure 9. Typical Diode Forward Voltage
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SLPS262C – FEBRUARY 2010 – REVISED DECEMBER 2019
Typical MOSFET Characteristics (continued)
TA = 25°C unless otherwise stated
100
IAV - Peak Avalanche Current (A)
IDS - Drain-to-Source Current (A)
1000
100
10
1
100 ms
10 ms
0.11
0.1
1 ms
100 µs
10 µs
1
10
VDS - Drain-to-Source Voltage (V)
100
TC = 25q C
TC = 125q C
10
1
0.01
0.1
TAV - Time in Avalanche (ms)
D010
1
D011
Single pulse, max RθJC = 4.5°C/W
Figure 10. Maximum Safe Operating Area
Figure 11. Single Pulse Unclamped Inductive Switching
IDS - Drain-to-Source Current (A)
60
50
40
30
20
10
0
-50
-25
0
25
50
75
100 125
TC - Case Temperature (°C)
150
175
D012
Figure 12. Maximum Drain Current vs Temperature
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CSD17308Q3
SLPS262C – FEBRUARY 2010 – REVISED DECEMBER 2019
www.ti.com
6 Device and Documentation Support
6.1 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
6.2 Trademarks
NexFET, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
6.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
6.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
8
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SLPS262C – FEBRUARY 2010 – REVISED DECEMBER 2019
7 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
7.1 Q3 Package Dimensions
DIM
MILLIMETERS
INCHES
MIN
NOM
MAX
MIN
NOM
MAX
A
0.950
1.000
1.100
0.037
0.039
0.043
A1
0.000
0.000
0.050
0.000
0.000
0.002
b
0.280
0.340
0.400
0.011
0.013
0.016
b1
0.310 NOM
0.012 NOM
c
0.150
0.200
0.250
0.006
0.008
0.010
D
3.200
3.300
3.400
0.126
0.130
0.134
D2
1.650
1.750
1.800
0.065
0.069
0.071
d
0.150
0.200
0.250
0.006
0.008
0.010
d1
0.300
0.350
0.400
0.012
0.014
0.016
E
3.200
3.300
3.400
0.126
0.130
0.134
E2
2.350
2.450
2.550
0.093
0.096
0.100
0.550
0.014
e
H
0.650 TYP
0.35
K
0.450
0.026 TYP
0.650 TYP
0.018
0.022
0.026 TYP
L
0.35
0.450
0.550
0.014
0.018
0.022
L1
0
—
0
0
—
0
θ
0
—
0
0
—
0
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CSD17308Q3
SLPS262C – FEBRUARY 2010 – REVISED DECEMBER 2019
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7.2 Recommended PCB Pattern
For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through
PCB Layout Techniques.
7.3 Recommended Stencil Opening
All dimensions are in mm, unless otherwise specified.
10
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SLPS262C – FEBRUARY 2010 – REVISED DECEMBER 2019
1.75 ±0.10
7.4 Q3 Tape and Reel Information
4.00 ±0.10 (See Note 1)
Ø 1.50
+0.10
–0.00
3.60
1.30
3.60
5.50 ±0.05
12.00
+0.30
–0.10
8.00 ±0.10
2.00 ±0.05
M0144-01
Notes:
1. 10 sprocket hole pitch cumulative tolerance ±0.2
2. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm
3. Material: black static dissipative polystyrene
4. All dimensions are in mm (unless otherwise specified).
5. Thickness: 0.30 ±0.05 mm
6. MSL1 260°C (IR and Convection) PbF-Reflow Compatible
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PACKAGE OPTION ADDENDUM
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6-Feb-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
CSD17308Q3
ACTIVE
VSON-CLIP
DQG
8
2500
Pb-Free (RoHS
Exempt)
SN
Level-1-260C-UNLIM
-55 to 150
CSD17308
CSD17308Q3T
ACTIVE
VSON-CLIP
DQG
8
250
Pb-Free (RoHS
Exempt)
SN
Level-1-260C-UNLIM
-55 to 150
CSD17308
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of