CSD17552Q5A

CSD17552Q5A www.ti.com SLPS428 – NOVEMBER 2012 30-V, N-Channel NexFET™ Power MOSFETs Check for Samples: CSD17552Q5A FEATURES 1 • • • • • • • PRODUCT SUMMARY Ultra Low Qg and Qgd Low Thermal Resistance Avalanche Rated Pb Free Terminal Plating RoHS Compliant Halogen Free SON 5-mm × 6-mm Plastic Package VDS Drain to Source Voltage 30 V Qg Gate Charge Total (4.5V) 9.0 nC Qgd Gate Charge Gate to Drain RDS(on) Drain to Source On Resistance VGS(th) Threshold Voltage • nC 6.1 mΩ VGS = 10V 5.1 mΩ 1.5 V ORDERING INFORMATION Device Package Media CSD17552Q5A SON 5-mm × 6-mm Plastic Package 13-Inch Reel APPLICATIONS • 2.0 VGS = 4.5V Point of load Synchronous Buck in Networking, Telecom and Computing Systems Optimized for Control FET Applications Qty Ship 2500 Tape and Reel ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise stated VALUE UNIT DESCRIPTION VDS Drain to Source Voltage 30 V The NexFET power MOSFET has been designed to minimize losses in power conversion applications. VGS Gate to Source Voltage ±20 V Continuous Drain Current, TC = 25°C 60 A Continuous Drain Current, Silicon Limitted 88 A Continuous Drain Current, TA = 25°C(1) 17 A IDM Pulsed Drain Current, TA = 25°C(2) 106 A PD Power Dissipation(1) 3.0 W TJ, TSTG Operating Junction and Storage Temperature Range –55 to 150 °C EAS Avalanche Energy, single pulse ID = 30A, L = 0.1mH, RG = 25Ω 45 mJ ID Figure 1. Top View S 1 8 D S 2 7 D S 3 6 D (1) Typical RθJA = 40°C/W on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 0.06-inch (1.52-mm) thick FR4 PCB. (2) Pulse duration ≤300μs, duty cycle ≤2% D G 5 4 D P0093-01 RDS(on) vs VGS GATE CHARGE 10 TC = 25°C Id = 15A TC = 125ºC Id = 15A 16 VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (mΩ) 18 14 12 10 8 6 4 2 0 0 2 4 6 8 10 12 14 16 VGS - Gate-to- Source Voltage (V) 18 20 G001 ID = 15A VDS =15V 8 6 4 2 0 0 4 8 12 Qg - Gate Charge (nC) 16 20 G001 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated CSD17552Q5A SLPS428 – NOVEMBER 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain to Source Voltage VGS = 0V, ID = 250μA IDSS Drain to Source Leakage Current VGS = 0V, VDS = 24V IGSS Gate to Source Leakage Current VDS = 0V, VGS = 20V VGS(th) Gate to Source Threshold Voltage VDS = VGS, ID = 250μA RDS(on) Drain to Source On Resistance gfs Transconductance 30 1.1 V 1 μA 100 nA 1.5 1.9 V VGS = 4.5V, ID = 15A 6.1 7.5 mΩ VGS = 10V, ID = 15A 5.1 6.2 mΩ VDS = 15V, ID = 15A 77 S Dynamic Characteristics Ciss Input Capacitance 1580 2050 pF Coss Output Capacitance Crss Reverse Transfer Capacitance 385 500 pF 28 36 RG pF Series Gate Resistance 0.9 1.8 Ω Qg Gate Charge Total (4.5V) 9.0 12 nC Qgd Gate Charge Gate to Drain 2.0 nC Qgs Gate Charge Gate to Source 3.6 nC Qg(th) Gate Charge at Vth 2.1 nC Qoss Output Charge 11 nC td(on) Turn On Delay Time 7.6 ns tr Rise Time 11.4 ns td(off) Turn Off Delay Time 12.2 ns tf Fall Time 3.6 ns VGS = 0V, VDS = 15V, f = 1MHz VDS = 15V, ID = 15A VDS = 15V, VGS = 0V VDS = 15V, VGS = 4.5V, IDS = 15A, RG = 2Ω Diode Characteristics VSD Diode Forward Voltage ISD = 11A, VGS = 0V 0.8 Qrr Reverse Recovery Charge 20 nC trr Reverse Recovery Time VDS= 13V, IF = 15A, di/dt = 300A/μs 1 V 18 ns THERMAL CHARACTERISTICS (TA = 25°C unless otherwise stated) MAX UNIT RθJC Thermal Resistance Junction to Case (1) PARAMETER 1.8 °C/W RθJA Thermal Resistance Junction to Ambient (1) (2) 50 °C/W (1) (2) 2 MIN TYP RθJC is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design. Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: CSD17552Q5A CSD17552Q5A www.ti.com SLPS428 – NOVEMBER 2012 GATE GATE Source Source Max RθJA = 50°C/W when mounted on 1 inch2 (6.45 cm2) of 2oz. (0.071-mm thick) Cu. Max RθJA = 125°C/W when mounted on a minimum pad area of 2-oz. (0.071-mm thick) Cu. DRAIN DRAIN M0161-02 M0161-01 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) Figure 2. Transient Thermal Impedance TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 100 IDS - Drain-to-Source Current (A) IDS - Drain-to-Source Current (A) 100 80 60 40 VGS =10V VGS =6V VGS =4.5V 20 0 0 0.5 1 VDS - Drain-to-Source Voltage (V) 1.5 VDS = 5V 80 60 40 TC = 125°C TC = 25°C TC = −55°C 20 0 0 G001 Figure 3. Saturation Characteristics 1 2 3 4 VGS - Gate-to-Source Voltage (V) Product Folder Links: CSD17552Q5A G001 Figure 4. Transfer Characteristics Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated 5 3 CSD17552Q5A SLPS428 – NOVEMBER 2012 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 100000 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd ID = 15A VDS =15V 8 C − Capacitance (pF) VGS - Gate-to-Source Voltage (V) 10 6 4 10000 1000 100 2 0 0 4 8 12 Qg - Gate Charge (nC) 16 10 20 0 10 20 VDS - Drain-to-Source Voltage (V) G001 Figure 5. Gate Charge TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 18 RDS(on) - On-State Resistance (mΩ) VGS(th) - Threshold Voltage (V) ID = 250uA 1.9 1.7 1.5 1.3 1.1 0.9 0.7 −75 −25 25 75 125 TC - Case Temperature (ºC) TC = 25°C Id = 15A TC = 125ºC Id = 15A 16 14 12 10 8 6 4 2 0 175 0 2 G001 Figure 7. Threshold Voltage vs. Temperature TEXT ADDED FOR SPACING 18 20 G001 TEXT ADDED FOR SPACING VGS = 4.5V VGS = 10V ID =15A 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 −75 6 8 10 12 14 16 VGS - Gate-to- Source Voltage (V) 100 ISD − Source-to-Drain Current (A) 2 4 Figure 8. On-State Resistance vs. Gate-to-Source Voltage 2.2 Normalized On-State Resistance G001 Figure 6. Capacitance 2.1 −25 25 75 125 TC - Case Temperature (ºC) 175 TC = 25°C TC = 125°C 10 1 0.1 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 VSD − Source-to-Drain Voltage (V) G001 Figure 9. Normalized On-State Resistance vs. Temperature 4 30 1 G001 Figure 10. Typical Diode Forward Voltage Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: CSD17552Q5A CSD17552Q5A www.ti.com SLPS428 – NOVEMBER 2012 TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 100 1ms 10ms 100ms 1s DC IAV - Peak Avalanche Current (A) IDS - Drain-to-Source Current (A) 1000 100 10 1 0.1 Single Pulse Typical RthetaJA =100ºC/W(min Cu) 0.01 0.01 0.1 1 10 VDS - Drain-to-Source Voltage (V) 50 TC = 25ºC TC = 125ºC 10 1 0.01 0.1 TAV - Time in Avalanche (mS) G001 Figure 11. Maximum Safe Operating Area 1 G001 Figure 12. Single Pulse Unclamped Inductive Switching TEXT ADDED FOR SPACING IDS - Drain- to- Source Current (A) 140.0 Package limited Silicon limited 120.0 100.0 80.0 60.0 40.0 20.0 0.0 −50 −25 0 25 50 75 100 125 TC - Case Temperature (ºC) 150 175 G001 Figure 13. Maximum Drain Current vs. Temperature Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: CSD17552Q5A 5 CSD17552Q5A SLPS428 – NOVEMBER 2012 www.ti.com MECHANICAL DATA Q5A Package Dimensions L E2 H K 7 D2 3 4 b 4 5 5 6 3 6 e D1 7 2 2 8 8 1 1 q L1 Top View Bottom View Side View c A q E1 E Front View M0135-01 DIM 6 MILLIMETERS MIN NOM MAX A 0.90 1.00 1.10 b 0.33 0.41 0.51 c 0.20 0.25 0.34 D1 4.80 4.90 5.00 D2 3.61 3.81 4.02 E 5.90 6.00 6.10 E1 5.70 5.75 5.80 E2 3.38 3.58 3.78 e 1.17 1.27 1.37 H 0.41 0.56 0.71 K 1.10 L 0.51 0.61 0.71 L1 0.06 0.13 0.20 θ 0° Submit Documentation Feedback 12° Copyright © 2012, Texas Instruments Incorporated Product Folder Links: CSD17552Q5A CSD17552Q5A www.ti.com SLPS428 – NOVEMBER 2012 Figure 14. Recommended PCB Pattern DIM F1 F7 F3 8 1 F2 F11 F5 F9 5 4 F6 MILLIMETERS INCHES MIN MAX MIN MAX F1 6.205 6.305 0.244 0.248 F2 4.46 4.56 0.176 0.18 F3 4.46 4.56 0.176 0.18 F4 0.65 0.7 0.026 0.028 F5 0.62 0.67 0.024 0.026 F6 0.63 0.68 0.025 0.027 F7 0.7 0.8 0.028 0.031 F8 0.65 0.7 0.026 0.028 F9 0.62 0.67 0.024 0.026 F10 4.9 5 0.193 0.197 F11 4.46 4.56 0.176 0.18 F8 F4 F10 M0139-01 For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. K0 4.00 ±0.10 (See Note 1) 0.30 ±0.05 2.00 ±0.05 +0.10 –0.00 12.00 ±0.30 Ø 1.50 1.75 ±0.10 Q5A Tape and Reel Information 5.50 ±0.05 B0 R 0.30 MAX A0 8.00 ±0.10 Ø 1.50 MIN A0 = 6.50 ±0.10 B0 = 5.30 ±0.10 K0 = 1.40 ±0.10 R 0.30 TYP M0138-01 Notes: 1. 10-sprocket hole-pitch cumulative tolerance ±0.2 2. Camber not to exceed 1mm in 100mm, noncumulative over 250mm 3. Material: black static-dissipative polystyrene 4. All dimensions are in mm (unless otherwise specified) 5. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: CSD17552Q5A 7 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD17552Q5A ACTIVE VSONP DQJ 8 2500 RoHS-Exempt & Green SN Level-1-260C-UNLIM -55 to 150 CSD17552 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of