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CSD17571Q2
SLPS393A – OCTOBER 2013 – REVISED JANUARY 2015
CSD17571Q2 30V N-Channel NexFET™ Power MOSFETs
1 Features
•
•
•
•
•
•
•
1
Product Summary
Low Qg and Qgd
Low Thermal Resistance
Avalanche Rated
Pb-Free Terminal Plating
RoHS Compliant
Halogen Free
SON 2 mm × 2 mm Plastic Package
TA = 25°C
TYPICAL VALUE
Drain-to-Source Voltage
30
V
Qg
Gate Charge Total (4.5 V)
2.4
nC
Qgd
Gate Charge Gate-to-Drain
Drain-to-Source On-Resistance
VGS(th)
Threshold Voltage
Device
CSD17571Q2
Top View
1
3
VGS = 10 V
20
mΩ
V
S
7-Inch Reel
Qty
Package
Ship
3000
SON 2 x 2 mm
Plastic Package
Tape and
Reel
Absolute Maximum Ratings
TA = 25°C
VALUE
UNIT
VDS
Drain-to-Source Voltage
30
V
VGS
Gate-to-Source Voltage
±20
V
Continuous Drain Current (Package Limit)
22
A
Continuous Drain Current(1)
7.6
A
IDM
Pulsed Drain Current, TA = 25°C(2)
39
A
PD
Power Dissipation(1)
2.5
W
–55 to 150
°C
7.2
mJ
ID
6
D
TJ,
Tstg
Operating Junction and
Storage Temperature Range
5
D
EAS
Avalanche Energy, single pulse
ID = 12 A, L = 0.1 mH, RG = 25 Ω
4
S
(1) RθJA = 50 on 1 in² Cu (2 oz.) on 0.060" thick FR4 PCB
(2) Pulse duration 10 μs, duty cycle ≤2%
D
G
mΩ
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
This 30 V, 20 mΩ, SON 2×2 NexFET™ power
MOSFET is designed to minimize losses in power
conversion and load management applications, while
offering excellent thermal performance for the size of
the package.
2
24
1.6
Media
3 Description
D
nC
VGS = 4.5 V
Ordering Information(1)
Optimized for Load Switch Applications
Storage, Tablets, and Handheld Devices
Optimized for Control FET Applications
D
0.6
RDS(on)
2 Applications
•
•
•
UNIT
VDS
P0108-01
RDS(on) vs VGS
Gate Charge
10
TC = 25°C, I D = 5A
TC = 125°C, I D = 5A
46
VGS - Gate-to-Source Voltage (V)
RDS(on) - On-State Resistance (mΩ)
50
42
38
34
30
26
22
18
14
10
0
2
4
6
8
10
12
14
16
VGS - Gate-to- Source Voltage (V)
18
20
G001
ID = 5A
VDS =15V
9
8
7
6
5
4
3
2
1
0
0
0.5
1
1.5
2 2.5 3 3.5 4
Qg - Gate Charge (nC)
4.5
5
5.5
G001
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CSD17571Q2
SLPS393A – OCTOBER 2013 – REVISED JANUARY 2015
www.ti.com
Table of Contents
1
2
3
4
5
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Specifications.........................................................
1
1
1
2
3
5.1 Electrical Characteristics........................................... 3
5.2 Thermal Information .................................................. 3
5.3 Typical MOSFET Characteristics.............................. 4
6
Device and Documentation Support.................... 7
6.1 Trademarks ............................................................... 7
6.2 Electrostatic Discharge Caution ................................ 7
6.3 Glossary .................................................................... 7
7
Mechanical, Packaging, and Orderable
Information ............................................................. 8
7.1 Q2 Package Dimensions .......................................... 8
7.2 Q2 Tape and Reel Information................................ 10
4 Revision History
Changes from Original (October 2013) to Revision A
•
2
Page
Updated Figure #8 .................................................................................................................................................................. 6
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5
SLPS393A – OCTOBER 2013 – REVISED JANUARY 2015
Specifications
5.1 Electrical Characteristics
TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
STATIC CHARACTERISTICS
BVDSS
Drain-to-Source Voltage
VGS = 0 V, ID = 250 μA
IDSS
Drain-to-Source Leakage Current
VGS = 0 V, VDS = 24 V
1
μA
IGSS
Gate-to-Source Leakage Current
VDS = 0 V, VGS = 20 V
100
nA
VGS(th)
Gate-to-Source Threshold Voltage
VDS = VGS, IDS = 250 μA
RDS(on)
Drain-to-Source On-Resistance
gƒs
Transconductance
30
1.3
V
1.6
2
V
VGS = 4.5 V, IDS = 5 A
24
29
mΩ
VGS = 10 V, IDS = 5 A
20
24
mΩ
VDS = 15 V, IDS = 5 A
43
S
DYNAMIC CHARACTERISTICS
CISS
Input Capacitance
COSS
Output Capacitance
CRSS
Reverse Transfer Capacitance
Rg
Series Gate Resistance
Qg
Gate Charge Total (4.5 V)
2.4
Qgd
Gate Charge – Gate-to-Drain
Qgs
Gate Charge Gate-to-Source
Qg(th)
Gate Charge at Vth
QOSS
Output Charge
td(on)
Turn On Delay Time
tr
Rise Time
td(off)
Turn Off Delay Time
tƒ
Fall Time
VGS = 0 V, VDS = 15 V, ƒ = 1 MHz
VDS = 15 V, IDS = 5 A
VDS = 15 V, VGS = 0 V
VDS = 15 V, VGS = 4.5 V, IDS = 5 A
RG = 2 Ω
360
468
pF
101
131
pF
9
12
pF
3.8
7.6
Ω
3.1
nC
0.6
nC
0.9
nC
0.6
nC
3.4
nC
5.3
ns
19
ns
8
ns
2.6
ns
DIODE CHARACTERISTICS
VSD
Diode Forward Voltage
IDS = 5 A, VGS = 0 V
Qrr
Reverse Recovery Charge
trr
Reverse Recovery Time
0.8
VDD = 15 V, IF = 5 A, di/dt = 300 A/μs
1
V
2.3
nC
11
ns
5.2 Thermal Information
TA = 25°C unless otherwise specified
THERMAL METRIC
MIN
TYP
MAX
RθJC
Junction-to-Case Thermal Resistance (1)
6.2
RθJA
Junction-to-Ambient Thermal Resistance (1) (2)
65
(1)
(2)
UNIT
°C/W
RθJC is determined with the device mounted on a 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu pad on a 1.5 inches × 1.5 inches
(3.81 cm × 3.81 cm), 0.06 inch (1.52 mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board
design.
Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu.
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CSD17571Q2
SLPS393A – OCTOBER 2013 – REVISED JANUARY 2015
GATE
www.ti.com
GATE
Source
Source
N-Chan
N-Chan
Max RθJA = 65 when
mounted on 1 inch2
(6.45 cm2) of 2 oz.
(0.071 mm thick) Cu.
Max RθJA = 235 when
mounted on minimum
pad area of 2 oz.
(0.071 mm thick) Cu.
DRAIN
DRAIN
M0164-02
M0164-01
5.3 Typical MOSFET Characteristics
TA = 25°C unless otherwise specified
Figure 1. Transient Thermal Impedance
4
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SLPS393A – OCTOBER 2013 – REVISED JANUARY 2015
Typical MOSFET Characteristics (continued)
50
30
45
27
IDS - Drain-to-Source Current (A)
IDS - Drain-to-Source Current (A)
TA = 25°C unless otherwise specified
40
35
30
25
20
15
VGS = 10V
VGS = 6V
VGS = 4.5V
10
5
0
0
0.2
0.4 0.6 0.8
1
1.2 1.4 1.6
VDS - Drain-to-Source Voltage (V)
1.8
24
21
18
15
12
9
TC = 125°C
TC = 25°C
TC = −55°C
6
3
0
2
VDS = 5V
0
0.5
Figure 2. Saturation Characteristics
G001
ID = 5A
VDS =15V
9
8
C − Capacitance (pF)
VGS - Gate-to-Source Voltage (V)
4
1000
7
6
5
4
3
100
10
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
2
1
0
0.5
1
1.5
2 2.5 3 3.5 4
Qg - Gate Charge (nC)
4.5
5
1
5.5
0
3
6
G001
Figure 4. Gate Charge
9
12
15
18
21
24
VDS - Drain-to-Source Voltage (V)
27
30
G001
Figure 5. Capacitance
2
50
ID = 250uA
1.9
RDS(on) - On-State Resistance (mΩ)
VGS(th) - Threshold Voltage (V)
3.5
Figure 3. Transfer Characteristics
10
0
1
1.5
2
2.5
3
VGS - Gate-to-Source Voltage (V)
G001
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
−75
−25
25
75
125
TC - Case Temperature (ºC)
Figure 6. Threshold Voltage vs Temperature
175
TC = 25°C, I D = 5A
TC = 125°C, I D = 5A
46
42
38
34
30
26
22
18
14
10
0
G001
2
4
6
8
10
12
14
16
VGS - Gate-to- Source Voltage (V)
18
20
G001
Figure 7. On-State Resistance vs Gate-to-Source Voltage
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CSD17571Q2
SLPS393A – OCTOBER 2013 – REVISED JANUARY 2015
www.ti.com
Typical MOSFET Characteristics (continued)
TA = 25°C unless otherwise specified
100
ID = 5A
ISD − Source-to-Drain Current (A)
Normalized On-State Resistance
1.9
1.7
1.5
1.3
1.1
0.9
0.7
VGS = 4.5V
VGS = 10V
0.5
−75
−25
25
75
125
TC - Case Temperature (ºC)
175
TC = 25°C
TC = 125°C
10
1
0.1
0.01
0.001
0.0001
0
Figure 8. Normalized On-State Resistance vs Temperature
1
G001
Figure 9. Typical Diode Forward Voltage
1000
100
1ms
10ms
100ms
1s
DC
IAV - Peak Avalanche Current (A)
IDS - Drain-to-Source Current (A)
0.2
0.4
0.6
0.8
VSD − Source-to-Drain Voltage (V)
G001
100
10
1
0.1
Single Pulse
Typical RthetaJA =190ºC/W(min Cu)
0.01
0.01
0.1
1
10
VDS - Drain-to-Source Voltage (V)
50
TC = 25ºC
TC = 125ºC
10
1
0.1
0.01
0.1
TAV - Time in Avalanche (mS)
G001
Figure 10. Maximum Safe Operating Area
1
G001
Figure 11. Single Pulse Unclamped Inductive Switching
IDS - Drain- to- Source Current (A)
30.0
27.0
24.0
21.0
18.0
15.0
12.0
9.0
6.0
3.0
0.0
−50
−25
0
25
50
75
100 125
TA - AmbientTemperature (ºC)
150
175
G001
Figure 12. Maximum Drain Current vs Temperature
6
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SLPS393A – OCTOBER 2013 – REVISED JANUARY 2015
6 Device and Documentation Support
6.1 Trademarks
NexFET is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
6.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
6.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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CSD17571Q2
SLPS393A – OCTOBER 2013 – REVISED JANUARY 2015
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7 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
7.1 Q2 Package Dimensions
D2
D
K3
K1
K
K2
4
1
2
3
4
5
6
3
2
1
K4
E
E1
E2
5
E3
6
L
Pin 1 Dot
Top View
Pin 1 ID
e
b
D1
A
A1
C
Bottom View
Front View
M0165-01
DIM
MILLIMETERS
NOM
MAX
MIN
NOM
MAX
0.750
0.800
0.028
0.030
0.032
0.050
0.000
0.350
0.010
A
0.700
A1
0.000
b
0.250
C
0.036
E2
1.000
0.038
0.080 TYP
1.100
0.036
0.040
0.280 TYP
0.0112 TYP
E3
0.470 TYP
0.0188 TYP
e
0.650 BSC
0.026 TYP
K
0.280 TYP
0.0112 TYP
K1
0.350 TYP
0.014 TYP
K2
0.200 TYP
0.008 TYP
K3
0.200 TYP
0.008 TYP
K4
0.470 TYP
0.0188 TYP
L
0.200
0.25
0.040
0.012 TYP
2.000 TYP
0.900
0.014
0.080 TYP
1.000
0.300 TYP
E
8
0.950
0.002
0.012
0.008 TYP
2.000 TYP
0.900
D2
E1
0.300
0.203 TYP
D
D1
INCHES
MIN
0.300
0.008
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0.010
0.044
0.012
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SLPS393A – OCTOBER 2013 – REVISED JANUARY 2015
7.1.1 Recommended PCB Pattern
For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through
PCB Layout Techniques.
7.1.2 Recommended Stencil Pattern
Note:
All dimensions are in mm, unless otherwise specified.
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CSD17571Q2
SLPS393A – OCTOBER 2013 – REVISED JANUARY 2015
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7.2 Q2 Tape and Reel Information
4.00 ±0.10
Ø 1.50 ±0.10
4.00 ±0.10
Ø 1.00 ±0.25
1.00 ±0.05
2.30 ±0.05
10° Max
3.50 ±0.05
8.00
+0.30
–0.10
1.75 ±0.10
2.00 ±0.05
0.254 ±0.02
2.30 ±0.05
10° Max
M0168-01
Notes: 1. Measured from centerline of sprocket hole to centerline of pocket
2. Cumulative tolerance of 10 sprocket holes is ±0.20
3. Other material available
4. Typical SR of form tape Max 109 OHM/SQ
5. All dimensions are in mm, unless otherwise specified.
10
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
CSD17571Q2
ACTIVE
WSON
DQK
6
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-55 to 150
1751
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
