CSD17585F5

CSD17585F5 SLPS610C – OCTOBER 2016 – REVISED JUNE 2022 CSD17585F5 30-V N-Channel FemtoFET™ MOSFET Product Summary 1 Features • • • • • • • TA = 25°C Low-on resistance Ultra-low Qg and Qgd Ultra-small footprint – 1.53 mm × 0.77 mm Low profile – 0.36-mm height Integrated ESD protection diode – Rated > 4-kV HBM – Rated > 2-kV CDM Lead and halogen free RoHS compliant UNIT VDS Drain-to-Source Voltage 30 V Qg Gate Charge Total (4.5 V) 1.9 nC Qgd Gate Charge Gate-to-Drain RDS(on) Drain-to-Source On Resistance VGS(th) Threshold Voltage 0.39 nC VGS = 4.5 V 26 VGS = 10 V 22 1.3 mΩ V Device Information 2 Applications • • TYPICAL VALUE DEVICE(1) QTY CSD17585F5 3000 CSD17585F5T 250 (1) Optimized for industrial load switch applications Optimized for general purpose switching applications 3 Description This 30-V, 22-mΩ, N-Channel FemtoFET™ MOSFET technology is designed and optimized to minimize the footprint in many handheld and mobile applications. This technology is capable of replacing standard small signal MOSFETs while providing a significant reduction in footprint size. SHIP 7-Inch Reel Femto 1.53-mm × 0.77-mm SMD Lead Less Tape and Reel For all available packages, see the orderable addendum at the end of the data sheet. Absolute Maximum Ratings VALUE UNIT VDS Drain-to-Source Voltage 30 V VGS Gate-to-Source Voltage +20 V Continuous Drain Current(1) 3.6 Continuous Drain Current(2) 5.9 Pulsed Drain Current(1) (3) 34 Dissipation(1) 0.5 Power Dissipation(2) 1.4 ID IDM PD TJ, Tstg 0.36 mm PACKAGE TA = 25°C V(ESD) . MEDIA (1) (2) (3) Power Human-Body Model (HBM) 4 Charged-Device Model (CDM) 2 Operating Junction, Storage Temperature –55 to 150 A A W kV °C Min Cu, typical RθJA = 245°C/W. Max Cu, typical RθJA = 90°C/W. Pulse duration ≤ 100 μs, duty cycle ≤ 1%. G 0.77 mm 1.53 mm Figure 3-1. Typical Part Dimensions S . . . . D . Figure 3-2. Top View An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD17585F5 www.ti.com SLPS610C – OCTOBER 2016 – REVISED JUNE 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Specifications.................................................................. 3 5.1 Electrical Characteristics.............................................3 5.2 Thermal Information....................................................3 5.3 Typical MOSFET Characteristics................................ 4 6 Device and Documentation Support..............................7 6.1 Receiving Notification of Documentation Updates......7 6.2 Trademarks................................................................. 7 7 Mechanical, Packaging, and Orderable Information.... 8 7.1 Mechanical Dimensions.............................................. 8 7.2 Recommended Minimum PCB Layout........................9 7.3 Recommended Stencil Pattern................................... 9 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (February 2022) to Revision C (June 2022) Page • Restored front page key graphic to match SLPS610A....................................................................................... 1 • Restored layout of images to match SLPS610A.................................................................................................4 Changes from Revision A (December 2016) to Revision B (February 2022) Page • Changed ultra-low profile bullet from 0.35 mm to 0.36 mm in height................................................................. 1 • Updated ultra-low profile image height from 0.35 mm to 0.36 mm..................................................................... 1 • Changed ultra-low profile image height from 0.35 mm to 0.36 mm.................................................................... 8 • Added FemtoFET Surface Mount Guide note.................................................................................................... 9 Changes from Revision * (October 2016) to Revision A (December 2016) Page • Changed Figure 5-2 in the Typical MOSFET Characteristics section.................................................................4 • Added Table 7-1 in the Mechanical Dimensions section.................................................................................... 8 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD17585F5 CSD17585F5 www.ti.com SLPS610C – OCTOBER 2016 – REVISED JUNE 2022 5 Specifications 5.1 Electrical Characteristics TA = 25°C (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 100 nA STATIC CHARACTERISTICS BVDSS Drain-to-source voltage VGS = 0 V, IDS = 250 μA IDSS Drain-to-source leakage current VGS = 0 V, VDS = 24 V IGSS Gate-to-source leakage current VDS = 0 V, VGS = 20 V VGS(th) Gate-to-source threshold voltage VDS = VGS, IDS = 250 μA RDS(on) Drain-to-source on resistance gfs Transconductance 30 V 50 nA 1.3 1.7 V VGS = 4.5 V, IDS = 0.9 A 26 33 VGS = 10 V, IDS = 0.9 A 22 27 VDS = 3 V, IDS = 0.9 A 7 0.9 mΩ S DYNAMIC CHARACTERISTICS Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance RG Series gate resistance 34 Qg Gate charge total (4.5 V) Qg Gate charge total (10 V) Qgd Gate charge gate-to-drain Qgs Qg(th) Qoss Output charge td(on) Turnon delay time tr Rise time td(off) Turnoff delay time tf Fall time VGS = 0 V, VDS = 15 V, ƒ = 1 MHz VDS = 15 V, IDS = 0.9 A 292 380 pF 166 215 pF 5.7 7.4 pF 1.9 2.4 nC 3.9 5.1 nC Ω 0.39 nC Gate charge gate-to-source 0.53 nC Gate charge at Vth 0.42 nC 4.1 nC 4 ns VDS = 15 V, VGS = 0 V VDS = 15 V, VGS = 4.5 V, IDS = 0.9 A, RG = 2 Ω 4 ns 31 ns 11 ns DIODE CHARACTERISTICS VSD Diode forward voltage ISD = 0.9 A, VGS = 0 V 0.74 1.0 V 5.2 Thermal Information TA = 25°C (unless otherwise stated) THERMAL METRIC RθJA (1) (2) MIN TYP Junction-to-ambient thermal resistance(1) 90 Junction-to-ambient thermal resistance(2) 245 MAX UNIT °C/W Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu. Device mounted on FR4 material with minimum Cu mounting area. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD17585F5 3 CSD17585F5 www.ti.com SLPS610C – OCTOBER 2016 – REVISED JUNE 2022 5.3 Typical MOSFET Characteristics TA = 25°C (unless otherwise stated) 10 10 9 9 IDS - Drain-to-Source Current (A) IDS - Drain-to-Source Current (A) Figure 5-1. Transient Thermal Impedance 8 7 6 5 4 3 2 VGS = 4.5 V VGS = 6 V VGS = 10 V 1 TC = 125° C TC = 25° C TC = -55° C 8 7 6 5 4 3 2 1 0 0 0 0.03 0.06 0.09 0.12 0.15 0.18 0.21 0.24 0.27 VDS - Drain-to-Source Voltage (V) 0.3 1 1.25 D002 1.5 1.75 2 2.25 VGS - Gate-to-Source Voltage (V) 2.5 D003 VDS = 5 V Figure 5-2. Saturation Characteristics 4 Figure 5-3. Transfer Characteristics Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD17585F5 CSD17585F5 www.ti.com SLPS610C – OCTOBER 2016 – REVISED JUNE 2022 5.3 Typical MOSFET Characteristics (continued) TA = 25°C (unless otherwise stated) 1000 9 8 C - Capacitance (pF) VGS - Gate-to-Source Voltage (V) 10 7 6 5 4 3 100 10 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 2 1 1 0 0 0.5 1 1.5 2 2.5 3 3.5 Qg - Gate Charge (nC) ID = 0.9 A 4 4.5 0 5 5 25 30 D005 D004 VDS = 15 V Figure 5-5. Capacitance Figure 5-4. Gate Charge 1.7 80 RDS(on) - On-State Resistance (m:) 1.6 VGS(th) - Threshold Voltage (V) 10 15 20 VDS - Drain-to-Source Voltage (V) 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 -75 TC = 25° C, ID = 0.9 A TC = 125° C, ID = 0.9 A 70 60 50 40 30 20 10 0 -50 -25 0 25 50 75 100 125 TC - Case Temperature (° C) 150 0 175 2 D006 4 6 8 10 12 14 16 VGS - Gate-to-Source Voltage (V) 18 20 D007 ID = 250 µA Figure 5-7. On-State Resistance vs Gate-to-Source Voltage Figure 5-6. Threshold Voltage vs Temperature 10 1.5 VGS = 4.5 V VGS = 10 V ISD - Source-to-Drain Current (A) Normalized On-State Resistance 1.6 1.4 1.3 1.2 1.1 1 0.9 0.8 TC = -55° C TC = -40° C TC = 25° C TC = 125° C TC = 150° C 1 0.1 0.01 0.001 0.7 0.6 -75 0.0001 -50 -25 0 25 50 75 100 125 TC - Case Temperature (° C) 150 175 0 0.2 0.4 0.6 0.8 VSD - Source-to-Drain Voltage (V) 1 D009 D008 ID = 0.9 A Figure 5-8. Normalized On-State Resistance vs Temperature Figure 5-9. Typical Diode Forward Voltage Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD17585F5 5 CSD17585F5 www.ti.com SLPS610C – OCTOBER 2016 – REVISED JUNE 2022 5.3 Typical MOSFET Characteristics (continued) TA = 25°C (unless otherwise stated) 100 IAV - Peak Avalanche Current (A) IDS - Drain-to-Source Current (A) 100 10 1 100 ms 10 ms 1 ms 0.1 0.1 100 µs 10 µs 1 10 VDS - Drain-to-Source Voltage (V) 100 TC = 25q C TC = 125q C 10 1 0.01 0.1 TAV - Time in Avalanche (ms) D010 1 D011 Single pulse, typ RθJA = 245°C/W Figure 5-10. Maximum Safe Operating Area (SOA) Figure 5-11. Single Pulse Unclamped Inductive Switching IDS - Drain-to-Source Current (A) 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 TA - Case Temperature (° C) 150 175 D012 Typ RθJA = 245°C/W Figure 5-12. Maximum Drain Current vs Temperature 6 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD17585F5 CSD17585F5 www.ti.com SLPS610C – OCTOBER 2016 – REVISED JUNE 2022 6 Device and Documentation Support 6.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 6.2 Trademarks FemtoFET™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD17585F5 7 CSD17585F5 www.ti.com SLPS610C – OCTOBER 2016 – REVISED JUNE 2022 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 Mechanical Dimensions 0.77 0.69 A B PIN 1 INDEX AREA 1.53 1.45 C 0.36 MAX SEATING PLANE 3 0.5 (R0.05) TYP 1 1 3X 3X 0.40 0.38 0.16 0.14 0.015 TOP B A 4222132/A 06/2015 A. B. C. All linear dimensions are in millimeters (dimensions and tolerancing per AME T14.5M-1994). This drawing is subject to change without notice. This package is a PB-free solder land design. Table 7-1. Pin Configuration 8 POSITION DESIGNATION Pin 1 Gate Pin 2 Source Pin 3 Drain Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD17585F5 YJK0003A PicoStar TM - 0.35 mm max height PicoStar TM CSD17585F5 www.ti.com SLPS610C – OCTOBER 2016 – REVISED JUNE 2022 7.2 Recommended Minimum PCB Layout 3X (0.39) (0.05) MIN ALL AROUND 1 (R0.05) TYP 3X (0.15) SYMM SOLDER MASK OPENING TYP (0.5) 3 YJK0003A EXAMPLE STENCIL DESIGN TM METAL UNDER PicoStar - 0.35 mm max height SOLDER MASK SYMM TYP A. B. PicoStar TM All dimensions are in millimeters. LAND PATTERN EXAMPLE SOLDER MASK DEFINED For more information, see FemtoFET Surface Mount Guide (SLRA003D). SCALE:50X 7.3 Recommended Stencil Pattern 3X (0.39) 1 3X (0.2) (R0.05) TYP 2X (0.15) SYMM (0.15) (0.525) 4222132/B 08/2016 NOTES: (continued) 3 4. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). SOLDER MASK EDGE SYMM TYP A. All dimensions are in millimeters. SOLDER PASTE EXAMPLE ON 0.075 - 0.1 mm THICK STENCIL SCALE:50X www.ti.com Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD17585F5 9 PACKAGE OPTION ADDENDUM www.ti.com 26-Apr-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD17585F5 ACTIVE PICOSTAR YJK 3 3000 RoHS & Green NIAU Level-1-260C-UNLIM -55 to 150 4U CSD17585F5T ACTIVE PICOSTAR YJK 3 250 RoHS & Green NIAU Level-1-260C-UNLIM -55 to 150 4U (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of