CSD18532NQ5BT

Order Now Product Folder Support & Community Tools & Software Technical Documents CSD18532NQ5B SLPS440C – JUNE 2013 – REVISED FEBRUARY 2018 CSD18532NQ5B 60-V N-Channel NexFET™ Power MOSFET 1 Features • • • • • • • 1 Product Summary Ultra-Low Qg and Qgd Low-Thermal Resistance Avalanche Rated Lead-Free Terminal Plating RoHS Compliant Halogen Free SON 5-mm × 6-mm Plastic Package TA = 25°C TYPICAL VALUE Drain-to-Source Voltage 60 V Qg Gate Charge Total (10 V) 49 nC Qgd Gate Charge Gate-to-Drain RDS(on) Drain-to-Source On-Resistance VGS(th) Threshold Voltage DC-DC Conversion Secondary Side Synchronous Rectifier Isolated Converter Primary Side Switch Motor Control MEDIA PACKAGE SHIP 2500 13-Inch Reel CSD18532NQ5BT 250 7-Inch Reel SON 5.00-mm × 6.00-mm Plastic Package Tape and Reel VALUE UNIT VDS Drain-to-Source Voltage 60 V VGS Gate-to-Source Voltage ±20 V Continuous Drain Current (Package Limited) 100 Continuous Drain Current (Silicon Limited), TC = 25°C 151 D PD 7 2 D 6 D 5 D D Continuous Drain Current 21 Pulsed Drain Current(2) 400 Power Dissipation(1) 3.1 Power Dissipation, TC = 25°C 156 A A W TJ, Tstg Operating Junction Temperature, Storage Temperature –55 to 150 °C EAS Avalanche Energy, Single Pulse ID = 85 A, L = 0.1 mH, RG = 25 Ω 360 mJ (1) Typical RθJA = 40°C/W on a 1-in2, 2-oz Cu pad on a 0.06-in thick FR4 PCB. (2) Max RθJC = 0.8°C/W, pulse duration ≤ 100 μs, duty cycle ≤ 1%. P0093-01 RDS(on) vs VGS Gate Charge 14 10 TC = 25°C, I D = 25 A TC = 125°C, I D = 25 A 12 VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (m:) V (1) 8 1 4 2.8 CSD18532NQ5B IDM G mΩ QTY Top View 3 2.7 DEVICE ID S VGS = 10 V Absolute Maximum Ratings This 60-V, 2.7-mΩ, 5-mm × 6-mm SON NexFET™ power MOSFET has been designed to minimize losses in power conversion applications. S nC 3.5 TA = 25°C 3 Description S 7.9 VGS = 6 V Device Information 2 Applications • • • • UNIT VDS 10 8 6 4 2 ID = 25 A 9 VDS = 30 V 8 7 6 5 4 3 2 1 0 0 0 2 4 6 8 10 12 14 16 VGS - Gate-to-Source Voltage (V) 18 20 D007 0 5 10 15 20 25 30 35 Qg - Gate Charge (nC) 40 45 50 D004 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD18532NQ5B SLPS440C – JUNE 2013 – REVISED FEBRUARY 2018 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 1 1 1 2 3 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4 6 Device and Documentation Support.................... 7 6.1 Receiving Notification of Documentation Updates.... 7 6.2 6.3 6.4 6.5 7 Community Resources.............................................. Trademarks ............................................................... Electrostatic Discharge Caution ................................ Glossary .................................................................... 7 7 7 7 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 7.2 7.3 7.4 Q5B Package Dimensions ........................................ 8 Recommended PCB Pattern..................................... 9 Recommended Stencil Pattern ................................. 9 Q5B Tape and Reel Information ............................. 10 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (May 2017) to Revision C • Page Extended the VDS on Figure 5 to 60 V.................................................................................................................................... 4 Changes from Revision A (December 2015) to Revision B Page • Added Receiving Notification of Documentation Updates section. ....................................................................................... 7 • Changed the dimension between pads 3 and 4 from 0.028 inches: to 0.050 inches in the Recommended PCB Pattern section diagram. ........................................................................................................................................................ 9 Changes from Original (June 2014) to Revision A Page • Added part number to title. .................................................................................................................................................... 1 • Added 7" reel to Ordering Information. .................................................................................................................................. 1 • Updated pulsed current conditions. ....................................................................................................................................... 1 • Added line for Power Dissipation, TC = 25°C in Absolute Maximum Ratings table. ............................................................. 1 • Updated Figure 1 to show RθJC curves. ................................................................................................................................. 4 • Updated SOA in Figure 10 ..................................................................................................................................................... 6 • Added Device and Documentation Support section. ............................................................................................................. 7 • Updated Mechanical, Packaging, and Orderable Information and mechanical drawings. .................................................... 8 2 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD18532NQ5B CSD18532NQ5B www.ti.com SLPS440C – JUNE 2013 – REVISED FEBRUARY 2018 5 Specifications 5.1 Electrical Characteristics TA = 25°C unless otherwise stated PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-source voltage VGS = 0 V, ID = 250 μA IDSS Drain-to-source leakage current VGS = 0 V, VDS = 48 V 1 μA IGSS Gate-to-source leakage current VDS = 0 V, VGS = 20 V 100 nA VGS(th) Gate-to-source threshold voltage VDS = VGS, ID = 250 μA V RDS(on) Drain-to-source on-resistance gfs Transconductance 60 2.4 V 2.8 3.4 VGS = 6 V, ID = 25 A 3.5 4.4 VGS = 10 V, ID = 25 A 2.7 3.4 VDS = 30 V, ID = 25 A 140 mΩ S DYNAMIC CHARACTERISTICS Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance RG Series gate resistance Qg Gate charge total (10 V) 49 Qgd Gate charge gate-to-drain 7.9 nC Qgs Gate charge gate-to-source 16 nC Qg(th) Gate charge at Vth 11 nC Qoss Output charge 69 nC td(on) Turnon delay time 8.2 ns tr Rise time 8.7 ns td(off) Turnoff delay time 20 ns tf Fall time 2.7 ns VGS = 0 V, VDS = 30 V, ƒ = 1 MHz VDS = 30 V, ID = 25 A VDS = 30 V, VGS = 0 V VDS = 30 V, VGS = 10 V, IDS = 25 A, RG = 0 Ω 4100 5340 pF 495 644 pF 16 21 pF 1.2 2.4 Ω 64 nC DIODE CHARACTERISTICS VSD Diode forward voltage ISD = 25 A, VGS = 0 V 0.8 1 V Qrr Reverse recovery charge nC Reverse recovery time VDS = 30 V, IF = 25 A, di/dt = 300 A/μs 139 trr 64 ns 5.2 Thermal Information TA = 25°C unless otherwise stated MAX UNIT RθJC Junction-to-case thermal resistance (1) THERMAL METRIC 0.8 °C/W RθJA Junction-to-ambient thermal resistance (1) (2) 50 °C/W (1) (2) MIN TYP RθJC is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in (3.81-cm × 3.81cm), 0.06-in (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design. Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD18532NQ5B 3 CSD18532NQ5B SLPS440C – JUNE 2013 – REVISED FEBRUARY 2018 GATE www.ti.com GATE Source N-Chan 5x6 QFN TTA MIN Rev3 N-Chan 5x6 QFN TTA MAX Rev3 Max RθJA = 50°C/W when mounted on 1 in2 (6.45 cm2) of 2-oz (0.071-mm) thick Cu. Source Max RθJA = 125°C/W when mounted on a minimum pad area of 2-oz. (0.071-mm) thick Cu. DRAIN DRAIN M0137-02 M0137-01 5.3 Typical MOSFET Characteristics TA = 25°C unless otherwise stated Figure 1. Transient Thermal Impedance 4 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD18532NQ5B CSD18532NQ5B www.ti.com SLPS440C – JUNE 2013 – REVISED FEBRUARY 2018 Typical MOSFET Characteristics (continued) 200 200 180 180 IDS - Drain-to-Source Current (A) IDS - Drain-to-Source Current (A) TA = 25°C unless otherwise stated 160 140 120 100 80 60 40 VGS = 6 V VGS = 8 V VGS = 10 V 20 TC = 125° C TC = 25° C TC = -55° C 160 140 120 100 80 60 40 20 0 0 0 0.1 0.2 0.3 0.4 0.5 0.6 VDS - Drain-to-Source Voltage (V) 0.7 0.8 1 2 3 4 5 6 VGS - Gate-to-Source Voltage (V) D002 7 8 D003 VDS = 5 V Figure 2. Saturation Characteristics Figure 3. Transfer Characteristics 100000 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 9 8 10000 C - Capacitance (pF) VGS - Gate-to-Source Voltage (V) 10 7 6 5 4 3 1000 100 2 1 0 10 0 5 10 15 20 25 30 35 Qg - Gate Charge (nC) ID = 25 A 40 45 50 0 6 12 D004 Figure 4. Gate Charge 60 D005 Figure 5. Capacitance 14 RDS(on) - On-State Resistance (m:) VGS(th) - Threshold Voltage (V) 54 VDS = 30 V 3.4 3.2 3 2.8 2.6 2.4 2.2 2 1.8 -75 18 24 30 36 42 48 VDS - Drain-to-Source Voltage (V) TC = 25°C, I D = 25 A TC = 125°C, I D = 25 A 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100 TC - Case Temperature (°C) 125 150 175 0 2 D006 4 6 8 10 12 14 16 VGS - Gate-to-Source Voltage (V) 18 20 D007 ID = 250 µA Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD18532NQ5B 5 CSD18532NQ5B SLPS440C – JUNE 2013 – REVISED FEBRUARY 2018 www.ti.com Typical MOSFET Characteristics (continued) TA = 25°C unless otherwise stated 100 2 VGS = 6 V VGS = 10 V ISD - Source-to-Drain Current (A) Normalized On-State Resistance 2.2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 -75 TC = 25°C TC = 125°C 10 1 0.1 0.01 0.001 0.0001 -50 -25 0 25 50 75 100 TC - Case Temperature (°C) 125 150 0 175 0.2 D008 0.4 0.6 0.8 VSD - Source-to-Drain Voltage (V) 1 D009 ID = 25 A Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage 300 IAV - Peak Avalanche Current (A) IDS - Drain-to-Source Current (A) 1000 100 10 1 DC 10 ms 1 ms 0.1 0.1 100 µs 10 µs 1 10 VDS - Drain-to-Source Voltage (V) 100 TC = 25q C TC = 125q C 100 10 0.01 0.1 TAV - Time in Avalanche (ms) D010 1 D011 Single pulse, max RθJC = 0.8°C/W Figure 10. Maximum Safe Operating Area Figure 11. Single Pulse Unclamped Inductive Switching IDS - Drain-to-Source Current (A) 120 100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 TC - Case Temperature (°C) 150 175 D012 Figure 12. Maximum Drain Current vs Temperature 6 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD18532NQ5B CSD18532NQ5B www.ti.com SLPS440C – JUNE 2013 – REVISED FEBRUARY 2018 6 Device and Documentation Support 6.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 6.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 6.3 Trademarks NexFET, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 6.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD18532NQ5B 7 CSD18532NQ5B SLPS440C – JUNE 2013 – REVISED FEBRUARY 2018 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 Q5B Package Dimensions K H D3 6 D1 4 5 e 6 4 3 3 5 D2 7 2 E 2 7 • 1 8 1 8 L b (8x) c1 E1 d1 Top View d2 Bottom View Side View • Front View DIM MILLIMETERS MIN NOM MAX A 0.80 1.00 1.05 b 0.36 0.41 0.46 c 0.15 0.20 0.25 c1 0.15 0.20 0.25 c2 0.20 0.25 0.30 D1 4.90 5.00 5.10 D2 4.12 4.22 4.32 d 0.20 0.25 0.30 E 4.90 5.00 5.10 E1 5.90 6.00 6.10 E2 3.48 3.58 3.68 e 0.46 0.56 0.66 θ 0° — — K 8 1.27 TYP L 1.40 TYP Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD18532NQ5B CSD18532NQ5B www.ti.com SLPS440C – JUNE 2013 – REVISED FEBRUARY 2018 7.2 Recommended PCB Pattern For recommended circuit layout for PCB designs, see Reducing Ringing Through PCB Layout Techniques (SLPA005). 7.3 Recommended Stencil Pattern (0.020) 0.508 x4 (0.011) 0.286 (0.014) 0.350 (0.022) 0.562 x 4 (0.029) 0.746 x 8 2.186 (0.086) 4.318 (0.170) 0.300 (0.012) 1.270 (0.050) (0.030) 0.766 (0.051) 1.294 x8 (0.060) 1.525 1.270 (0.050) (0.042) 1.072 (0.259) 6.586 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD18532NQ5B 9 CSD18532NQ5B SLPS440C – JUNE 2013 – REVISED FEBRUARY 2018 www.ti.com K0 4.00 ±0.10 (See Note 1) 0.30 ±0.05 2.00 ±0.05 +0.10 –0.00 12.00 ±0.30 Ø 1.50 1.75 ±0.10 7.4 Q5B Tape and Reel Information 5.50 ±0.05 B0 R 0.30 MAX A0 8.00 ±0.10 Ø 1.50 MIN R 0.30 TYP A0 = 6.50 ±0.10 B0 = 5.30 ±0.10 K0 = 1.40 ±0.10 M0138-01 Notes: 1. 10-sprocket hole-pitch cumulative tolerance ±0.2. 2. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm. 3. Material: black static-dissipative polystyrene. 4. All dimensions are in mm (unless otherwise specified). 5. A0 and B0 measured on a plane 0.3 mm above the bottom of the pocket. 10 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: CSD18532NQ5B PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD18532NQ5B ACTIVE VSON-CLIP DNK 8 2500 RoHS-Exempt & Green SN Level-1-260C-UNLIM -55 to 150 18532N CSD18532NQ5BT ACTIVE VSON-CLIP DNK 8 250 RoHS-Exempt & Green SN Level-1-260C-UNLIM -55 to 150 18532N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of