CSD19537Q3

Sample & Buy Product Folder Support & Community Tools & Software Technical Documents CSD19537Q3 SLPS549A – AUGUST 2015 – REVISED MAY 2016 CSD19537Q3 100-V N-Channel NexFET™ Power MOSFET 1 Features • • • • • • • Product Summary Ultra-Low Qg and Qgd Low Thermal Resistance Avalanche Rated Lead Free Terminal Plating RoHS Compliant Halogen Free SON 3.3-mm × 3.3-mm Plastic Package 1 TA = 25°C TYPICAL VALUE Drain-to-Source Voltage 100 V Qg Gate Charge Total (10 V) 16 nC Qgd Gate Charge Gate-to-Drain 2.9 RDS(on) Drain-to-Source On-Resistance VGS(th) Threshold Voltage Primary Side Isolated Converters Motor Control 3 Description This 100-V, 12.1-mΩ, SON 3.3-mm × 3.3-mm NexFET™ power MOSFET is designed to minimize losses in power conversion applications. VGS = 10 V Top View S DEVICE MEDIA CSD19537Q3 13-Inch Reel CSD19537Q3T 13-Inch Reel 8 1 7 2 D 12.1 mΩ V QTY PACKAGE 6 3 5 4 SHIP 2500 SON 3.3- x 3.3-mm Tape and Plastic Package Reel 250 Absolute Maximum Ratings VALUE UNIT VDS Drain-to-Source Voltage 100 V VGS Gate-to-Source Voltage ±20 V Continuous Drain Current (Package Limited) 50 A Continuous Drain Current (Silicon Limited), TC = 25°C 53 A Continuous Drain Current 9.7 A Pulsed Drain Current(2) 219 A Power Dissipation(1) 2.8 W Power Dissipation, TC = 25°C D D (1) D G mΩ (1) For all available packages, see the orderable addendum at the end of the data sheet. ID S 13.8 3 TA = 25°C S nC VGS = 6 V . Ordering Information(1) 2 Applications • • UNIT VDS IDM D PD P0095-01 . . . 83 W TJ, Tstg Operating Junction Temperature, Storage Temperature –55 to 150 °C EAS Avalanche Energy, Single Pulse ID = 33 A, L = 0.1 mH, RG = 25 Ω 55 mJ (1) Typical RθJA = 45°C/W on a 1-in2, 2-oz Cu pad on a 0.06-in thick FR4 PCB. (2) Max RθJC = 1.5°C/W, pulse duration ≤ 100 μs, duty cycle ≤ 1%. RDS(on) vs VGS Gate Charge 10 TC = 25° C, I D = 10 A TC = 125° C, I D = 10 A 35 VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (m:) 40 30 25 20 15 10 5 0 ID = 10 A 9 VDS = 50 V 8 7 6 5 4 3 2 1 0 0 2 4 6 8 10 12 14 16 VGS - Gate-To-Source Voltage (V) 18 20 D007 0 2 4 6 8 10 Qg - Gate Charge (nC) 12 14 16 D004 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD19537Q3 SLPS549A – AUGUST 2015 – REVISED MAY 2016 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 1 1 1 2 3 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4 6 Device and Documentation Support.................... 7 6.1 6.2 6.3 6.4 7 Community Resources.............................................. Trademarks ............................................................... Electrostatic Discharge Caution ................................ Glossary .................................................................... 7 7 7 7 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 7.2 7.3 7.4 Q3 Package Dimensions .......................................... 8 Recommended PCB Pattern..................................... 9 Recommended Stencil Opening ............................... 9 Q3 Tape and Reel Information................................ 10 4 Revision History Changes from Original (August 2015) to Revision A • 2 Page Corrected typo in X axis legend on Figure 11. ....................................................................................................................... 6 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: CSD19537Q3 CSD19537Q3 www.ti.com SLPS549A – AUGUST 2015 – REVISED MAY 2016 5 Specifications 5.1 Electrical Characteristics TA = 25°C (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-source voltage VGS = 0 V, ID = 250 μA IDSS Drain-to-source leakage current VGS = 0 V, VDS = 80 V 1 μA IGSS Gate-to-source leakage current VDS = 0 V, VGS = 20 V 100 nA VGS(th) Gate-to-source threshold voltage VDS = VGS, ID = 250 μA RDS(on) Drain-to-source on-resistance gfs Transconductance 100 2.6 V 3 3.6 V VGS = 6 V, ID = 10 A 13.8 16.6 mΩ VGS = 10 V, ID = 10 A 12.1 14.5 mΩ VDS = 10 V, ID = 10 A 45 S DYNAMIC CHARACTERISTICS Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance RG Series gate resistance Qg Gate charge total (10 V) Qgd Gate charge gate-to-drain Qgs Gate charge gate-to-source Qg(th) Gate charge at Vth Qoss Output charge td(on) Turn on delay time tr Rise time td(off) Turn off delay time tf Fall time VGS = 0 V, VDS = 50 V, ƒ = 1 MHz VDS = 50 V, ID = 10 A VDS = 50 V, VGS = 0 V VDS = 50 V, VGS = 10 V, IDS = 10 A, RG = 0 Ω 1290 1680 pF 251 326 pF 13.3 17.3 pF 1.2 2.4 Ω 16 21 nC 2.9 nC 5.5 nC 3.8 nC 44 nC 5 ns 3 ns 10 ns 3 ns DIODE CHARACTERISTICS VSD Diode forward voltage ISD = 10 A, VGS = 0 V 0.8 1 V Qrr Reverse recovery charge nC Reverse recovery time VDS= 50 V, IF = 10 A, di/dt = 300 A/μs 134 trr 36 ns 5.2 Thermal Information TA = 25°C (unless otherwise stated) MAX UNIT RθJC Junction-to-case thermal resistance (1) THERMAL METRIC 1.5 °C/W RθJA Junction-to-ambient thermal resistance (1) (2) 55 °C/W (1) (2) MIN TYP RθJC is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in (3.81-cm × 3.81cm), 0.06-in (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design. Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu. Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: CSD19537Q3 3 CSD19537Q3 SLPS549A – AUGUST 2015 – REVISED MAY 2016 GATE www.ti.com GATE Source Source Max RθJA = 160°C/W when mounted on a minimum pad area of 2-oz (0.071-mm) thick Cu. Max RθJA = 55°C/W when mounted on 1 in2 (6.45 cm2) of 2-oz (0.071-mm) thick Cu. DRAIN DRAIN M0161-02 M0161-01 5.3 Typical MOSFET Characteristics TA = 25°C (unless otherwise stated) Figure 1. Transient Thermal Impedance 4 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: CSD19537Q3 CSD19537Q3 www.ti.com SLPS549A – AUGUST 2015 – REVISED MAY 2016 Typical MOSFET Characteristics (continued) TA = 25°C (unless otherwise stated) 80 90 IDS - Drain-to-Source Current (A) IDS - Drain-to-Source Current (A) 100 80 70 60 50 40 30 20 VGS = 6 V VGS = 8 V VGS = 10 V 10 0 TC = 125° C TC = 25° C TC = -55° C 70 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 VDS - Drain-to-Source Voltage (V) 1.8 2 2 3 D002 4 5 6 VGS - Gate-to-Source Voltage (V) 7 D003 VDS = 5 V Figure 3. Transfer Characteristics Figure 2. Saturation Characteristics 10000 9 8 C - Capacitance (pF) VGS - Gate-to-Source Voltage (V) 10 7 6 5 4 3 1000 100 10 2 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 1 1 0 0 2 4 6 8 10 Qg - Gate Charge (nC) ID = 10 A 12 14 0 16 10 20 D004 Figure 4. Gate Charge 100 D005 Figure 5. Capacitance 40 RDS(on) - On-State Resistance (m:) 3.4 VGS(th) - Threshold Voltage (V) 90 VDS = 50 V 3.6 3.2 3 2.8 2.6 2.4 2.2 2 1.8 -75 30 40 50 60 70 80 VDS - Drain-to-Source Voltage (V) TC = 25° C, I D = 10 A TC = 125° C, I D = 10 A 35 30 25 20 15 10 5 0 -50 -25 0 25 50 75 100 TC - Case Temperature (° C) 125 150 175 0 2 D006 4 6 8 10 12 14 16 VGS - Gate-To-Source Voltage (V) 18 20 D007 ID = 250 µA Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: CSD19537Q3 5 CSD19537Q3 SLPS549A – AUGUST 2015 – REVISED MAY 2016 www.ti.com Typical MOSFET Characteristics (continued) TA = 25°C (unless otherwise stated) 100 2 VGS = 6 V VGS = 10 V ISD - Source-to-Drain Current (A) Normalized On-State Resistance 2.2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 -75 TC = 25° C TC = 125° C 10 1 0.1 0.01 0.001 0.0001 -50 -25 0 25 50 75 100 TC - Case Temperature (° C) 125 150 175 0 0.2 D008 0.4 0.6 0.8 VSD - Source-to-Drain Voltage (V) 1 D009 ID = 10 A Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage 100 IDS - Drain-to-Source Current (A) IDS - Drain-to-Source Current (A) 1000 100 10 1 DC 10 ms 1 ms 0.1 0.1 100 µs 10 µs 1 10 100 VDS - Drain-to-Source Voltage (V) 1000 TC = 125° C TC = 25° C 10 1 0.01 0.1 TAV - Time in Avalanche (ms) D010 1 D011 Single Pulse, Max RθJC = 1.5°C/W Figure 10. Maximum Safe Operating Area Figure 11. Single Pulse Unclamped Inductive Switching IDS - Drain-to-Source Current (A) 60 50 40 30 20 10 0 -50 -25 0 25 50 75 100 125 TC - Case Temperature (° C) 150 175 D012 Figure 12. Maximum Drain Current vs Temperature 6 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: CSD19537Q3 CSD19537Q3 www.ti.com SLPS549A – AUGUST 2015 – REVISED MAY 2016 6 Device and Documentation Support 6.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 6.2 Trademarks NexFET, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 6.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: CSD19537Q3 7 CSD19537Q3 SLPS549A – AUGUST 2015 – REVISED MAY 2016 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 Q3 Package Dimensions DIM MILLIMETERS NOM MAX MIN NOM MAX A 0.950 1.000 1.100 0.037 0.039 0.043 A1 0.000 0.000 0.050 0.000 0.000 0.002 b 0.280 0.340 0.400 0.011 0.013 0.016 b1 0.310 NOM 0.012 NOM c 0.150 0.200 0.250 0.006 0.008 0.010 D 3.200 3.300 3.400 0.126 0.130 0.134 D2 1.650 1.750 1.800 0.065 0.069 0.071 d 0.150 0.200 0.250 0.006 0.008 0.010 d1 0.300 0.350 0.400 0.012 0.014 0.016 E 3.200 3.300 3.400 0.126 0.130 0.134 E2 2.350 2.450 2.550 0.093 0.096 0.100 0.550 0.014 e H 0.650 TYP 0.35 K 8 INCHES MIN 0.450 0.026 TYP 0.650 TYP 0.018 0.022 0.026 TYP L 0.35 0.450 0.550 0.014 0.018 0.022 L1 0 — 0 0 — 0 θ 0 — 0 0 — 0 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: CSD19537Q3 CSD19537Q3 www.ti.com SLPS549A – AUGUST 2015 – REVISED MAY 2016 7.2 Recommended PCB Pattern For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. 7.3 Recommended Stencil Opening All dimensions are in mm, unless otherwise specified. Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: CSD19537Q3 9 CSD19537Q3 SLPS549A – AUGUST 2015 – REVISED MAY 2016 www.ti.com 1.75 ±0.10 7.4 Q3 Tape and Reel Information 2.00 ±0.05 4.00 ±0.10 (See Note 1) 8.00 ±0.10 +0.10 –0.00 3.60 1.30 3.60 5.50 ±0.05 12.00 +0.30 –0.10 Ø 1.50 M0144-01 Notes: 1. 10 sprocket hole pitch cumulative tolerance ±0.2 2. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm 3. Material: black static dissipative polystyrene 4. All dimensions are in mm (unless otherwise specified). 5. Thickness: 0.30 ±0.05 mm 6. MSL1 260°C (IR and Convection) PbF-Reflow Compatible 10 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: CSD19537Q3 PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) CSD19537Q3 ACTIVE VSON-CLIP DQG 8 2500 Pb-Free (RoHS Exempt) SN Level-1-260C-UNLIM -55 to 150 CSD19537 CSD19537Q3T ACTIVE VSON-CLIP DQG 8 250 Pb-Free (RoHS Exempt) SN Level-1-260C-UNLIM -55 to 150 CSD19537 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of