CSD22205L

Order Now Product Folder Support & Community Tools & Software Technical Documents CSD22205L SLPS690A – MAY 2017 – REVISED AUGUST 2017 CSD22205L –8-V P-Channel NexFET™ Power MOSFET 1 Features • • • • • • • • 1 Product Summary Low Resistance Small Footprint 1.2 mm × 1.2 mm Low Profile 0.35-mm Height Lead Free Gate-Source Voltage Clamp Gate ESD Protection RoHS Compliant Halogen Free TA = 25°C VALUE Drain-to-Source Voltage –8 V Qg Gate Charge Total (–4.5 V) 6.5 nC Qgd Gate Charge Gate-to-Drain 1.0 nC VGS = –1.5 V RDS(on) Drain-to-Source On-Resistance VGS(th) Threshold Voltage 2 Applications • • • UNIT VDS 30 VGS = –1.8 V 20 VGS = –2.5 V 11.5 VGS = –4.5 V 8.2 mΩ –0.7 V Device Information(1) Battery Management Load Switch Battery Protection DEVICE QTY CSD22205L 3000 CSD22205LT 250 MEDIA PACKAGE SHIP 7-Inch Reel 1.20-mm × 1.20-mm Land Grid Array Package Tape and Reel (1) For all available packages, see the orderable addendum at the end of the data sheet. 3 Description This –8-V, 8.2-mΩ, 1.2-mm × 1.2-mm Land Grid Array (LGA) NexFET™ device has been designed to deliver the lowest on-resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile. The Land Grid Array (LGA) package is a silicon chip scale package with metal pads instead of solder balls. Top View and Circuit Configuration Source Absolute Maximum Ratings TA = 25°C VALUE UNIT VDS Drain-to-Source Voltage –8 V VGS Gate-to-Source Voltage –6 V ID Continuous Drain Current(1) –7.4 A IDM Pulsed Drain Current(2) –71 A PD Power Dissipation(1) 0.6 W TJ, Tstg Operating Junction Temperature, Storage Temperature –55 to 150 °C (1) Min Cu RθJA = 225°C/W. (2) Pulse width ≤ 100 μs, duty cycle ≤ 1%. G S D 1.2 mm Gate D Drain 1.2 mm. RDS(on) vs VGS RDS(on) vs VGS 4.5 TC = 25°C, I D = -1 A TC = 125°C, I D = -1 A 35 -VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (m:) 40 30 25 20 15 10 5 0 ID = -1 A 4 VDS = -4 V 3.5 3 2.5 2 1.5 1 0.5 0 0 1 2 3 4 -VGS - Gate-to-Source Voltage (V) 5 6 D007 0 1 2 3 4 5 Qg - Gate Charge (nC) 6 7 D004 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD22205L SLPS690A – MAY 2017 – REVISED AUGUST 2017 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 1 1 1 2 3 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4 6 Device and Documentation Support.................... 7 6.1 6.2 6.3 6.4 6.5 7 Receiving Notification of Documentation Updates.... Community Resources.............................................. Trademarks ............................................................... Electrostatic Discharge Caution ................................ Glossary .................................................................... 7 7 7 7 7 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 CSD22205L Package Dimensions............................ 8 7.2 Land Pattern Recommendation ................................ 9 7.3 Stencil Recommendation .......................................... 9 4 Revision History Changes from Original (May 2017) to Revision A • 2 Page Changed the units for timing parameters from µs : to ns (nanoseconds) in the Electrical Characteristics table................... 3 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CSD22205L CSD22205L www.ti.com SLPS690A – MAY 2017 – REVISED AUGUST 2017 5 Specifications 5.1 Electrical Characteristics TA = 25°C (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-source voltage VGS = 0 V, ID = –250 μA IDSS Drain-to-source leakage current VGS = 0 V, VDS = –6.4 V –100 nA IGSS Gate-to-source leakage current VDS = 0 V, VGS = –6 V –100 nA VGS(th) Gate-to-source threshold voltage VDS = VGS, ID = –250 μA –1.05 V RDS(on) Drain-to-source on-resistance gfs Transconductance –8 –0.4 V –0.7 VGS = –1.5 V, ID = –0.2 A 30 VGS = –1.8 V, ID = –1 A 20 40 VGS = –2.5 V, ID = –1 A 11.5 15.0 VGS = –4.5 V, ID = –1 A 8.2 9.9 VDS = –0.8 V, ID = –1 A 10.4 mΩ S DYNAMIC CHARACTERISTICS CISS Input capacitance COSS Output capacitance CRSS Reverse transfer capacitance RG Series gate resistance 30 Qg Gate charge total (–4.5 V) 6.5 Qgd Gate charge gate-to-drain Qgs Gate charge gate-to-source Qg(th) Gate charge at Vth QOSS Output charge td(on) Turnon delay time tr Rise time td(off) Turnoff delay time tf Fall time VGS = 0 V, VDS = –4 V, ƒ = 1 MHz VDS = –4 V, ID = –1 A VDS = –4 V, VGS = 0 V VDS = –4 V, VGS = –4.5 V, ID = –1 A , RG = 0 Ω 1070 1390 pF 560 730 pF 190 250 pF 8.5 nC Ω 1.0 nC 1.2 nC 0.7 nC 4.1 nC 30 ns 14 ns 70 ns 32 ns DIODE CHARACTERISTICS VSD Diode forward voltage Qrr Reverse recovery charge trr Reverse recovery time IS = –1 A, VGS = 0 V VDS= –4 V, IF = –1 A, di/dt = 200 A/μs –0.68 –1.0 V 16 nC 38 ns 5.2 Thermal Information TA = 25°C (unless otherwise stated) THERMAL METRIC RθJA (1) (2) MIN TYP Junction-to-ambient thermal resistance (1) 75 Junction-to-ambient thermal resistance (2) 225 MAX UNIT °C/W Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu. Device mounted on FR4 material with minimum Cu mounting area. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CSD22205L 3 CSD22205L SLPS690A – MAY 2017 – REVISED AUGUST 2017 www.ti.com Typ RθJA =75°C/W when mounted on 1 in2 of 2-oz Cu. Typ RθJA = 225°C/W when mounted on minimum pad area of 2-oz Cu. 5.3 Typical MOSFET Characteristics TA = 25°C (unless otherwise stated) Figure 1. Transient Thermal Impedance 4 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CSD22205L CSD22205L www.ti.com SLPS690A – MAY 2017 – REVISED AUGUST 2017 Typical MOSFET Characteristics (continued) TA = 25°C (unless otherwise stated) 50 VGS = -1.5 V VGS = -1.8 V VGS = -2.5 V VGS = -4.5 V 45 40 -IDS - Drain-to-Source Current (A) -IDS - Drain-to-Source Current (A) 50 35 30 25 20 15 10 5 0 TC = 125°C TC = 25°C TC = -55°C 45 40 35 30 25 20 15 10 5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 -VDS - Drain-to-Source Voltage (V) 4.5 0 5 0.5 D002 1 1.5 2 2.5 -VGS - Gate-to-Source Voltage (V) 3 D003 VDS = –5 V Figure 2. Saturation Characteristics Figure 3. Transfer Characteristics 10000 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 4 3.5 C - Capacitance (pF) -VGS - Gate-to-Source Voltage (V) 4.5 3 2.5 2 1.5 1000 100 1 0.5 10 0 0 1 2 3 4 5 Qg - Gate Charge (nC) ID = –1 A 6 0 7 1 D004 Figure 4. Gate Charge 8 D005 Figure 5. Capacitance 40 RDS(on) - On-State Resistance (m:) -VGS(th) - Threshold Voltage (V) 7 VDS = –4 V 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 -75 2 3 4 5 6 -VDS -Drain-to-Source Voltage (V) TC = 25°C, I D = -1 A TC = 125°C, I D = -1 A 35 30 25 20 15 10 5 0 -50 -25 0 25 50 75 100 TC - Case Temperature (°C) 125 150 175 0 D006 1 2 3 4 -VGS - Gate-to-Source Voltage (V) 5 6 D007 ID = –250 µA Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CSD22205L 5 CSD22205L SLPS690A – MAY 2017 – REVISED AUGUST 2017 www.ti.com Typical MOSFET Characteristics (continued) TA = 25°C (unless otherwise stated) 10 1.3 VGS = -1.8 V VGS = -2.5 V VGS = -4.5 V -ISD - Source-to-Drain Current (A) Normalized On-State Resistance 1.4 1.2 1.1 1 0.9 0.8 0.7 -75 TC = -55qC TC = -40qC TC = 25qC TC = 125qC TC = 150qC 1 0.1 0.01 0.001 0.0001 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) 125 150 0 175 0.2 0.4 0.6 0.8 -VSD - Source-to-Drain Voltage (V) D008 1 D009 ID = –1 A Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage 12 100 -IDS - Drain-to-Source Current (A) -IDS - Drain-to-Source Current (A) 200 10 1 100 ms 10 ms 0.1 0.1 1 ms 100 µs 1 -VDS - Drain-to-Source Voltage (V) 10 20 10 8 6 4 2 0 -50 -25 D010 0 25 50 75 100 125 TA - Ambient Temperature (° C) 150 175 D011 Single pulse, typical RθJA = 225°C/W Figure 10. Maximum Safe Operating Area 6 Figure 11. Maximum Drain Current vs Temperature Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CSD22205L CSD22205L www.ti.com SLPS690A – MAY 2017 – REVISED AUGUST 2017 6 Device and Documentation Support 6.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 6.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 6.3 Trademarks NexFET, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 6.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CSD22205L 7 CSD22205L SLPS690A – MAY 2017 – REVISED AUGUST 2017 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 CSD22205L Package Dimensions 1.20 1.12 B A PIN 1 INDEX AREA 1.20 1.12 C 0.35 MAX SEATING PLANE 0.7 3X 0.35 (R0.05) TYP 3 4 2 0.015 C B A 0.41 0.39 0.225 2X 0.86 0.84 0.015 C B A 0.3 1 0.015 0.26 0.24 C B A 4X 0.16 0.14 0.015 C B A 4222872/A 04/2016 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This package is a lead-free bump design. Bump finish may vary. To determine the exact finish, refer to the device data sheet or contact a local TI representative. Table 1. Pin Configuration Table 8 POSITION DESIGNATION 1 Gate 2 Drain 3 Source 4 Drain Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CSD22205L CSD22205L www.ti.com SLPS690A – MAY 2017 – REVISED AUGUST 2017 7.2 Land Pattern Recommendation 3X (0.35) 4X (0.15) (0.25) 0.05 MIN ALL AROUND TYP (R0.05) 1 (0.3) PKG 2X (0.85) (0.225) (0.4) 2 3 SOLDER MASK OPENING TYP 4 METAL UNDER SOLDER MASK TYP PKG NOTE: For more information, see QFN/SON PCB Attachment (SLUA271). 7.3 Stencil Recommendation 3X (0.35) 4X (0.15) (0.25) (R0.05) TYP 1 0.3 PKG 2X (0.85) 0.225 (0.4) 2 3 4 PKG NOTE: Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. For recommended circuit layout for PCB designs, see Reducing Ringing Through PCB Layout Techniques (SLPA005). Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CSD22205L 9 PACKAGE OPTION ADDENDUM www.ti.com 7-Oct-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD22205L ACTIVE PICOSTAR YMG 4 3000 RoHS & Green Call TI Level-1-260C-UNLIM -55 to 150 205 CSD22205LT ACTIVE PICOSTAR YMG 4 250 RoHS & Green Call TI Level-1-260C-UNLIM -55 to 150 205 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of