CSD23280F3

CSD23280F3 SLPS601B – APRIL 2016 – REVISED FEBRUARY 2022 CSD23280F3 –12-V P-Channel FemtoFET™ MOSFET Product Summary 1 Features • • • • • • • • TA = 25°C Low On-Resistance Ultra-Low Qg and Qgd High-operating drain current Ultra-small footprint – 0.73 mm × 0.64 mm Ultra-low profile – 0.36-mm max height Integrated ESD protection diode – Rated > 4-kV HBM – Rated > 2-kV CDM Lead and halogen free RoHS compliant • • UNIT VDS Drain-to-Source Voltage –12 V Qg Gate Charge Total (4.5 V) 0.95 nC Qgd Gate Charge Gate-to-Drain RDS(on) Drain-to-Source On-Resistance VGS(th) Threshold Voltage 0.068 nC VGS = –1.5 V 230 VGS = –1.8 V 180 VGS = –2.5 V 129 VGS = –4.5 V 97 –0.65 mΩ V Device Information(1) DEVICE QTY CSD23280F3 3000 CSD23280F3T 2 Applications • • TYPICAL VALUE Optimized for load switch applications Optimized for general purpose switching applications Battery applications Handheld and mobile applications (1) 250 MEDIA PACKAGE SHIP 7-Inch Reel Femto 0.73-mm × 0.64-mm Land Grid Array (LGA) Tape and Reel For all available packages, see the orderable addendum at the end of the data sheet. Absolute Maximum Ratings TA = 25°C VALUE UNIT VDS Drain-to-Source Voltage –12 V 3 Description VGS Gate-to-Source Voltage –6 V This –12-V, 97-mΩ, P-Channel FemtoFET™ MOSFET is designed and optimized to minimize the footprint in many handheld and mobile applications. This technology is capable of replacing standard small signal MOSFETs while providing a substantial reduction in footprint size. ID Continuous Drain Current(1) 2.9 Continuous Drain Current(2) 1.8 Pulsed Drain Current(1) (3) 11.4 Power Dissipation(1) 1.4 Power Dissipation(2) 0.5 IDM PD V(ESD) TJ, Tstg (1) 0.36 mm (2) (3) 0.64 mm 0.73 mm Human-Body Model (HBM) 4000 Charged-Device Model (CDM) 2000 Operating Junction, Storage Temperature –55 to 150 A A W V °C Typical RθJA = 90°C/W on 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 0.06-in (1.52-mm) thick FR4 PCB Typical RθJA = 255°C/W on min Cu board Pulse duration ≤ 100 μs, duty cycle ≤ 1%. G D Typical Part Dimensions S Top View An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD23280F3 www.ti.com SLPS601B – APRIL 2016 – REVISED FEBRUARY 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Specifications.................................................................. 3 5.1 Electrical Characteristics.............................................3 5.2 Thermal Information....................................................3 5.3 Typical MOSFET Characteristics................................ 4 6 Device and Documentation Support..............................7 6.1 Receiving Notification of Documentation Updates......7 6.2 Trademarks................................................................. 7 7 Mechanical, Packaging, and Orderable Information.... 8 7.1 Mechanical Dimensions.............................................. 8 7.2 Recommended Minimum PCB Layout........................9 7.3 Recommended Stencil Pattern................................... 9 4 Revision History Changes from Revision A (August 2017) to Revision B (February 2022) Page • Changed ultra-low profile bullet from 0.35 mm to 0.36 mm in height................................................................. 1 • Added max Cu currents and power dissipation limits ........................................................................................ 1 • Added min Cu footnote ...................................................................................................................................... 1 • Updated ultra-low profile image height from 0.35 mm to 0.36 mm..................................................................... 1 • Changed ultra-low profile image height from 0.35 mm to 0.36 mm.................................................................... 8 • Added FemtoFET Surface Mount Guide note.................................................................................................... 9 Changes from Revision * (April 2016) to Revision A (August 2017) Page • Added the Section 6.1 section in Section 6 ....................................................................................................... 7 • Updated the Section 7.3 .................................................................................................................................... 9 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated CSD23280F3 www.ti.com SLPS601B – APRIL 2016 – REVISED FEBRUARY 2022 5 Specifications 5.1 Electrical Characteristics TA = 25°C (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT –50 nA STATIC CHARACTERISTICS BVDSS Drain-to-source voltage VGS = 0 V, IDS = –250 μA IDSS Drain-to-source leakage current VGS = 0 V, VDS = –9.6 V IGSS Gate-to-source leakage current VDS = 0 V, VGS = –5 V VGS(th) Gate-to-source threshold voltage VDS = VGS, IDS = –250 μA RDS(on) Drain-to-source on-resistance gfs Transconductance –12 V –25 nA –0.65 –0.95 V VGS = –1.5 V, IDS = –0.1 A 230 399 VGS = –1.8 V, IDS = –0.4 A 180 250 VGS = –2.5 V, IDS = –0.4 A 129 165 VGS = –4.5 V, IDS = –0.4 A 97 116 VDS = –1.2 V, IDS = –0.4 A 3 –0.40 mΩ S DYNAMIC CHARACTERISTICS Ciss Input capacitance 180 Coss Output capacitance Crss Reverse transfer Capacitance RG Series gate resistance Qg Gate charge total (4.5 V) Qgd Gate charge gate-to-drain Qgs Gate charge gate-to-source Qg(th) Gate charge at Vth Qoss Output charge td(on) tr td(off) Turnoff delay time tf Fall time VGS = 0 V, VDS = –6 V, ƒ = 1 MHz 234 pF 73 95 pF 8.5 11.1 pF 1.23 nC 9 0.95 Ω 0.068 nC 0.30 nC 0.15 nC 1.07 nC Turnon delay time 8 ns Rise time 4 ns 21 ns 8 ns VDS = –6 V, IDS = –0.4 A VDS = –6 V, VGS = 0 V VDS = –6 V, VGS = –4.5 V, IDS = –0.4 A, RG = 0 Ω DIODE CHARACTERISTICS VSD Diode forward voltage ISD = –0.4 A, VGS = 0 V –0.73 –1.0 V 5.2 Thermal Information TA = 25°C (unless otherwise stated) THERMAL METRIC RθJA (1) (2) TYPICAL VALUES resistance(1) 90 Junction-to-ambient thermal resistance(2) 255 Junction-to-ambient thermal UNIT °C/W Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz. (0.071-mm) thick Cu. Device mounted on FR4 material with minimum Cu mounting area. Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3 CSD23280F3 www.ti.com SLPS601B – APRIL 2016 – REVISED FEBRUARY 2022 5.3 Typical MOSFET Characteristics TA = 25°C (unless otherwise stated) 5 VGS = -1.5 V VGS = -1.8 V VGS = -2.5 V VGS = -4.5 V 9 8 -IDS - Drain-To-Source Current (A) -IDS - Drain-to-Source Current (A) 10 7 6 5 4 3 2 1 TC = 125° C TC = 25° C TC = -55° C 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 0 0.2 0.4 0.6 0.8 1 -VDS - Drain-to-Source Voltage (V) 1.2 1.4 D002 0 0.4 0.8 1.2 1.6 2 -VGS - Gate-To-Source Voltage (V) Figure 5-1. Saturation Characteristics 2.4 2.8 D003 VDS = –5 V Figure 5-2. Transfer Characteristics Figure 5-3. Transient Thermal Impedance 4 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated CSD23280F3 www.ti.com SLPS601B – APRIL 2016 – REVISED FEBRUARY 2022 1000 4 C - Capacitance (pF) -VGS - Gate-to-Source Voltage (V) 5 4.5 3.5 3 2.5 2 1.5 100 10 1 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 0.5 1 0 0 0.2 0.4 0.6 0.8 Qg - Gate Charge (nC) VDS = –6 V 1 0 1.2 2 D004 4 6 8 10 -VDS - Drain-to-Source Voltage (V) 12 D005 Figure 5-5. Capacitance ID = –0.4 A Figure 5-4. Gate Charge 350 RDS(on) - On-State Resistance (m:) -VGS(th) - Threshold Voltage (V) 0.95 0.85 0.75 0.65 0.55 0.45 0.35 0.25 -75 -25 0 25 50 75 100 TC - Case Temperature (qC) 125 150 175 150 100 50 0 1 2 3 4 5 6 -VGS - Gate-To-Source Voltage (V) 7 8 D007 Figure 5-7. On-State Resistance vs Gate-to-Source Voltage 1.4 10 VGS = -1.8 V VGS = -2.5 V VGS = -4.5 V -ISD - Source-To-Drain Current (A) Normalized On-State Resistance 200 D006 Figure 5-6. Threshold Voltage vs Temperature 1.2 1.1 1 0.9 0.8 0.7 -75 250 0 -50 ID = –250 µA 1.3 TC = 25° C, ID = -0.4 A TC = 125° C, ID = -0.4 A 300 TC = 25qC TC = 125qC 1 0.1 0.01 0.001 0.0001 0 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) VGS = –4.5 V 125 150 175 D008 ID = –0.4 A 0.2 0.4 0.6 0.8 -VSD - Source-To-Drain Voltage (V) 1 D009 Figure 5-9. Typical Diode Forward Voltage Figure 5-8. Normalized On-State Resistance vs Temperature Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 5 CSD23280F3 www.ti.com SLPS601B – APRIL 2016 – REVISED FEBRUARY 2022 3 -IDS - Drain-to-Source Current (A) -IDS - Drain-To-Source Current (A) 100 10 1 0.1 100 ms 10 ms 0.01 0.1 1 ms 100 µs 1 10 -VDS - Drain-To-Source Voltage (V) 100 D010 Single pulse, max RθJA = 255°C/W Figure 5-10. Maximum Safe Operating Area 6 Submit Document Feedback 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 TA - Ambient Temperature (qC) 150 175 D011 Figure 5-11. Maximum Drain Current vs Temperature Copyright © 2022 Texas Instruments Incorporated www.ti.com CSD23280F3 SLPS601B – APRIL 2016 – REVISED FEBRUARY 2022 6 Device and Documentation Support 6.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 6.2 Trademarks FemtoFET™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 7 CSD23280F3 www.ti.com SLPS601B – APRIL 2016 – REVISED FEBRUARY 2022 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 Mechanical Dimensions 0.73 0.65 A B PIN 1 INDEX AREA 0.64 0.56 0.36 MAX C SEATING PLANE 0.4 0.225 2 3 0.175 0.51 0.49 0.35 1 0.015 0.16 2X 0.14 C B A 2X A. B. C. 0.16 0.14 0.015 C A B 0.26 0.24 All linear dimensions are in millimeters (dimensions and tolerancing per AME T14.5M-1994). This drawing is subject to change without notice. This package is a lead-free solder land design. Table 7-1. Pin Configuration 8 Submit Document Feedback POSITION DESIGNATION Pin 1 Gate Pin 2 Source Pin 3 Drain Copyright © 2022 Texas Instruments Incorporated CSD23280F3 www.ti.com SLPS601B – APRIL 2016 – REVISED FEBRUARY 2022 7.2 Recommended Minimum PCB Layout (0.15) 2X (0.25) 2X (0.15) 0.05 MIN ALL AROUND TYP 1 3 SYMM (0.35) (0.5) EXAMPLE STENCIL DESIGN 2 YJM0003A (R0.05) TYP SOLDER MASK TM PicoStar OPENING TYP PKG METAL UNDER SOLDER MASK TYP (0.175) - 0.35 mm max height PicoStar TM (0.4) A. B. All dimensions are in millimeters. LAND PATTERN EXAMPLE SOLDER MASK DEFINED For more information, see FemtoFET Surface Mount Guide (SLRA003D). SCALE:50X 7.3 Recommended Stencil Pattern 2X (0.25) 2X (0.2) (0.15) 1 3 SYMM (0.4) 2X (0.15) (0.5) 2 PKG (R0.05) TYP 2X SOLDER MASK EDGE (0.175) (0.4) A. 4222304/A 09/2015 All dimensions are in millimeters. NOTES: (continued) SOLDER PASTE EXAMPLE ON 0.075 - 0.1 mm THICK STENCIL 4. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). SCALE:50X www.ti.com Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 9 PACKAGE OPTION ADDENDUM www.ti.com 11-Jan-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD23280F3 ACTIVE PICOSTAR YJM 3 3000 RoHS & Green NIAU Level-1-260C-UNLIM -55 to 150 5 CSD23280F3T ACTIVE PICOSTAR YJM 3 250 RoHS & Green NIAU Level-1-260C-UNLIM -55 to 150 5 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of