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CSD25213W10

CSD25213W10

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    DSBGA4

  • 描述:

    表面贴装型 P 通道 20 V 1.6A(Ta) 1W(Ta) 4-DSBGA(1x1)

  • 数据手册
  • 价格&库存
CSD25213W10 数据手册
CSD25213W10 www.ti.com SLPS443 – JUNE 2013 P-Channel NexFET™ Power MOSFET Check for Samples: CSD25213W10 FEATURES 1 • • • • • • • • PRODUCT SUMMARY Ultra Low Qg and Qgd Small Footprint 1mm × 1mm Low Profile 0.62mm Height Pb Free Gate-Source Voltage Clamp Gate ESD Protection RoHS Compliant Halogen Free Drain to Source Voltage –20 V Qg Gate Charge Total (4.5V) 2.2 nC Qgd Gate Charge Gate to Drain RDS(on) Drain to Source On Resistance VGS(th) Threshold Voltage 0.14 nC VGS = –2.5V 54 mΩ VGS = –4.5V 39 mΩ –0.85 V ORDERING INFORMATION APPLICATIONS • • • VDS Battery Management Load Switch Battery Protection Device Package CSD25213W10 1 × 1 Wafer Level Package Media 7-inch reel Qty Ship 3000 Tape and Reel ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise stated VALUE UNIT VDS Drain to Source Voltage –20 V DESCRIPTION VGS Gate to Source Voltage –6.0 V The device has been designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra low profile. ID Continuous Drain Current, TA = 25°C(1) -1.6 A Top View G (2) IDM Pulsed Drain Current, TA = 25°C -16 A IG Continuous Gate Clamp Current(3) -5 mA PD Power Dissipation(1) 1 W TJ, TSTG Operating Junction and Storage Temperature Range –55 to 150 °C (1) RθJA = 75°C/W on 1in2 Cu (2 oz.) on 0.060" thick FR4 PCB. (2) Pulse width ≤300μs, duty cycle ≤2% (3) Limited by gate resistance. S RC RG D RDS(on) vs VGS 100 GATE CHARGE 4.5 TC = 25°C Id = −1A TC = 125ºC Id = −1A 90 − VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (mΩ) S 80 70 60 50 40 30 20 0 1 2 3 4 5 − VGS - Gate-to- Source Voltage (V) 6 G001 ID = −1A VDS =−10V 4 3.5 3 2.5 2 1.5 1 0.5 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 Qg - Gate Charge (nC) 1.8 2 2.2 G001 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated CSD25213W10 SLPS443 – JUNE 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain to Source Voltage VGS = 0V, ID = –250μA –20 V BVGSS Gate to Source Voltage; VDS = 0V, IG = –250μA –6.0 V IDSS Drain to Source Leakage Current VGS = 0V, VDS = –10V IGSS Gate to Source Leakage Current VDS = 0V, VGS = –6V VGS(th) Gate to Source Threshold Voltage VDS = VGS, ID = –250μA RDS(on) Drain to Source On Resistance gfs Transconductance –1 μA –100 nA –0.85 –1.10 V VGS = –2.5V, ID = –1A 54 67 mΩ VGS = –4.5V, ID = –1A 39 47 mΩ VDS = –10V, ID = –1A 6.2 –0.60 S Dynamic Characteristics CISS Input Capacitance COSS Output Capacitance CRSS Reverse Transfer Capacitance RG Series Gate Resistance RC Series Clamp Resistance Qg Gate Charge Total (–4.5V) Qgd Gate Charge Gate to Drain Qgs Gate Charge Gate to Source Qg(th) Gate Charge at Vth QOSS Output Charge td(on) tr td(off) Turn Off Delay Time tf Fall Time VGS = 0V, VDS = –10V, f = 10kHz 368 478 pF 148 192 pF 7.8 10.1 pF Ω 20 Ω 5000 2.2 2.9 nC 0.14 nC 0.74 nC 0.43 nC 2.5 nC Turn On Delay Time 510 ns Rise Time 520 ns 1000 ns 970 ns VDS = –10V, ID = –1A VDS = –10V, VGS = 0V VDS = –10V, VGS = –2.5V, ID = –1A RG = 10Ω Diode Characteristics VSD Diode Forward Voltage IS = –1A, VGS = 0V –0.77 –1 V Qrr Reverse Recovery Charge VDS= –10V, IF = –1A, di/dt = 200A/μs 4.0 nC trr Reverse Recovery Time VDS= –10V, IF = –1A, di/dt = 200A/μs 11 ns THERMAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER RθJA (1) (2) 2 MIN TYP MAX UNIT (1) 75 °C/W Junction to Ambient Thermal Resistance (2) 265 °C/W Junction to Ambient Thermal Resistance Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu. Device mounted on FR4 material with minimum Cu mounting area. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25213W10 CSD25213W10 www.ti.com SLPS443 – JUNE 2013 P-Chan 1.0x1.0 CSP TTA MAX Rev1 P-Chan 1.0x1.0 CSP TTA MIN Rev1 Max RθJA = 333°C/W when mounted on minimum pad area of 2 oz. Cu. Max RθJA = 90°C/W when mounted on 1inch2 of 2 oz. Cu. M0149-01 M0150-01 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) Figure 1. Transient Thermal Impedance Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25213W10 3 CSD25213W10 SLPS443 – JUNE 2013 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 20 VGS = −4.5V VGS = −2.5V VGS = −1.8V 18 16 − IDS - Drain-to-Source Current (A) − IDS - Drain-to-Source Current (A) 20 14 12 10 8 6 4 2 0 0 1 2 3 4 − VDS - Drain-to-Source Voltage (V) 16 14 12 10 8 6 TC = 125°C TC = 25°C TC = −55°C 4 2 0 5 VDS = −5V 18 0 1 G001 Figure 2. Saturation Characteristics TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 400 3.5 350 C − Capacitance (nF) − VGS - Gate-to-Source Voltage (V) ID = −1A VDS =−10V 4 3 2.5 2 1.5 1 300 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 250 200 150 100 0.5 50 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 Qg - Gate Charge (nC) 1.8 2 0 2.2 0 2 4 6 8 10 12 14 16 − VDS - Drain-to-Source Voltage (V) G001 18 20 G001 Figure 5. Capacitance TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 1.1 100 RDS(on) - On-State Resistance (mΩ) ID = −250uA − VGS(th) - Threshold Voltage (V) G001 450 Figure 4. Gate Charge 1 0.9 0.8 0.7 0.6 0.5 −75 −25 25 75 125 TC - Case Temperature (ºC) Figure 6. Threshold Voltage vs. Temperature 4 5 Figure 3. Transfer Characteristics 4.5 0 2 3 4 − VGS - Gate-to-Source Voltage (V) 175 TC = 25°C Id = −1A TC = 125ºC Id = −1A 90 80 70 60 50 40 30 20 0 G001 1 2 3 4 5 − VGS - Gate-to- Source Voltage (V) 6 G001 Figure 7. On-State Resistance vs. Gate-to-Source Voltage Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25213W10 CSD25213W10 www.ti.com SLPS443 – JUNE 2013 TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 10 VGS = −2.5V VGS = −4.5V 1.3 ID = −1A − ISD − Source-to-Drain Current (A) Normalized On-State Resistance 1.4 1.2 1.1 1 0.9 0.8 0.7 −75 −25 25 75 125 TC - Case Temperature (ºC) 175 TC = 25°C TC = 125°C 1 0.1 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 − VSD − Source-to-Drain Voltage (V) G001 Figure 8. Normalized On-State Resistance vs. Temperature G001 Figure 9. Typical Diode Forward Voltage TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 100 1000 1ms 10ms 100ms 1s DC 100 10 1 0.1 Single Pulse Typical RthetaJA =265ºC/W(min Cu) 0.01 0.01 TC = 25ºC TC = 125ºC − IAV - Peak Avalanche Current (A) − IDS - Drain-to-Source Current (A) 1 0.1 1 10 − VDS - Drain-to-Source Voltage (V) 10 1 0.01 50 0.1 TAV - Time in Avalanche (ms) G001 Figure 10. Maximum Safe Operating Area 1 G001 Figure 11. Single Pulse Unclamped Inductive Switching TEXT ADDED FOR SPACING − IDS - Drain- to- Source Current (A) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 −50 Typical RthetaJA =75ºC/W(max Cu) −25 0 25 50 75 100 125 TA - AmbientTemperature (ºC) 150 175 G001 Figure 12. Maximum Drain Current vs. Temperature Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25213W10 5 CSD25213W10 SLPS443 – JUNE 2013 www.ti.com MECHANICAL DATA CSD25213W10 Package Dimensions Pin 1 Mark 1 Solder Ball Ø 0.31 ±0.075 2 2 1 A 1.00 0.50 +0.00 –0.10 A B B 1.00 +0.00 –0.10 0.50 Side View Bottom View 0.04 0.62 Max 0.38 Top View 0.62 Max Seating Plate Front View M0151-01 NOTE: All dimensions are in mm (unless otherwise specified) Pin Configuration Table POSITION DESIGNATION A1 Gate B1 Drain A2, B2 Source Land Pattern Recommendation Ø 0.25 1 2 0.50 A B 0.50 M0152-01 NOTE: All dimensions are in mm (unless otherwise specified) 6 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25213W10 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD25213W10 ACTIVE DSBGA YZB 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -55 to 150 213 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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