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CSD25404Q3
SLPS570 – NOVEMBER 2015
CSD25404Q3 –20 V P-Channel NexFET™ Power MOSFET
1 Features
•
•
•
•
•
•
•
1
Product Summary
Ultra-Low Qg and Qgd
Low Thermal Resistance
Low RDS(on)
Halogen Free
RoHS Compliant
Pb Free Terminal Plating
SON 3.3 mm × 3.3 mm Plastic Package
TA = 25°C
TYPICAL VALUE
Drain-to-source voltage
–20
V
Qg
Gate charge total (–4.5 V)
10.9
nC
Qgd
Gate charge gate to drain
RDS(on)
Vth
DEVICE
QTY
CSD25404Q3
mΩ
VGS = –2.5 V
10.1
mΩ
VGS = –4.5 V
5.5
mΩ
–0.9
MEDIA
2500 13-Inch Reel
CSD25404Q3T
V
250
7-Inch Reel
PACKAGE
SHIP
SON 3.3 mm × 3.3
mm Plastic Package
Tape and
Reel
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
This –20 V, 5.5 mΩ NexFET™ power MOSFET is
designed to minimize losses in power conversion load
management applications with a SON 3.3 mm × 3.3
mm package that offers an excellent thermal
performance for the size of the device.
Absolute Maximum Ratings
TA = 25°C
VALUE
UNIT
VDS
Drain-to-source voltage
–20
V
VGS
Gate-to-source voltage
±12
V
Continuous drain current, TC = 25°C
–104
Continuous drain current (package limit)
–60
Continuous drain current(1)
–18
Pulsed drain current(2)
–240
ID
Top View
8
1
2
7
S
D
3
6
S
S
IDM
S
D
Power dissipation
PD
(1)
Operating junction,
storage temperature
A
A
2.8
Power dissipation, TC = 25°C
TJ,
Tstg
W
96
–55 to 150
°C
(1) RθJA = 45°C/W on 1 inch2 Cu (2 oz.) on 0.060 inch thick FR4
PCB.
(2) Max RθJC = 1.3, pulse duration ≤100 µs, duty cycle ≤1%.
5
G
S
RDS(on) vs VGS
Gate Charge
24
8
TC = 25° C, I D = -10 A
TC = 125° C, I D = -10 A
21
-VGS - Gate-to-Source Voltage (V)
RDS(on) - On-State Resistance (m:)
40
Threshold voltage
3 Description
4
nC
VGS = –1.8 V
Ordering Information(1)
DC-DC Converters
Battery Management
Load Switch
Battery Protection
D
2.2
Drain-to-source on resistance
2 Applications
•
•
•
•
UNIT
VDS
18
15
12
9
6
3
0
ID = -10 A
VDS = -10 V
7
6
5
4
3
2
1
0
0
2
4
6
8
10
-VGS - Gate-To-Source Voltage (V)
12
D007
0
2
4
6
8
10
12
14
Qg - Gate Charge (nC)
16
18
20
D004
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CSD25404Q3
SLPS570 – NOVEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Specifications.........................................................
6.1
6.2
6.3
6.4
1
1
1
2
3
7
5.1 Electrical Characteristics........................................... 3
5.2 Thermal Information .................................................. 3
5.3 Typical MOSFET Characteristics.............................. 4
6
7
7
7
7
Mechanical, Packaging, and Orderable
Information ............................................................. 8
7.1
7.2
7.3
7.4
Device and Documentation Support.................... 7
Community Resources..............................................
Trademarks ...............................................................
Electrostatic Discharge Caution ................................
Glossary ....................................................................
CSD25404Q3 Package Dimensions......................... 8
Recommended PCB Pattern..................................... 9
Recommended Stencil Opening ............................... 9
Q3 Tape and Reel Information................................ 10
4 Revision History
2
DATE
REVISION
NOTES
November 2015
*
Initial release.
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SLPS570 – NOVEMBER 2015
5 Specifications
5.1 Electrical Characteristics
(TA = 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
STATIC CHARACTERISTICS
BVDSS
Drain-to-source voltage
VGS = 0 V, ID = –250 μA
IDSS
Drain-to-source leakage current
VGS = 0 V, VDS = –16 V
–1
μA
IGSS
Gate-to-source leakage current
VDS = 0 V, VGS = ±12 V
–100
nA
VGS(th)
Gate-to-source threshold voltage
VDS = VGS, ID = –250 μA
–20
–0.65
V
–0.90
–1.15
40
150
mΩ
VGS = –2.5 V, ID = –10 A
10.1
12.1
mΩ
VGS = –4.5 V, ID = –10 A
5.5
6.5
mΩ
VDS = –10 V, ID = –10 A
47
VGS = –1.8 V, ID = –1 A
RDS(on)
Drain-to-source on resistance
gfs
Transconductance
V
S
DYNAMIC CHARACTERISTICS
CISS
Input capacitance
VGS = 0 V, VDS = –10 V,
ƒ = 1 MHz
1630
2120
pF
COSS
Output capacitance
902
1170
pF
CRSS
Reverse transfer capacitance
52
68
pF
RG
Series gate resistance
0.8
2.4
Ω
Qg
Gate charge total (–4.5 V)
10.8
14.1
nC
Qgd
Gate charge gate to drain
2.2
nC
Qgs
Gate charge gate to source
2.8
nC
Qg(th)
Gate charge at Vth
1.5
nC
QOSS
Output charge
9.0
nC
td(on)
Turn on delay time
13
ns
tr
Rise time
8
ns
td(off)
Turn off delay time
35
ns
tf
Fall time
13
ns
VDS = –10 V, ID = –10 A
VDS = –10 V, VGS = 0 V
VDS = –10 V, VGS = –4.5 V,
ID = –10 A , RG = 5 Ω
DIODE CHARACTERISTICS
VSD
Diode forward voltage
Qrr
Reverse recovery charge
trr
Reverse recovery time
IS = –10 A, VGS = 0 V
–0.8
VDS = –10 V, IF = –10 A,
di/dt = 200 A/μs
20.5
–1
nC
V
26
ns
5.2 Thermal Information
(TA = 25°C unless otherwise stated)
MAX
UNIT
RθJC
Junction-to-case thermal resistance (1)
THERMAL METRIC
1.3
°C/W
RθJA
Junction-to-ambient thermal resistance (1) (2)
55
°C/W
(1)
(2)
MIN
TYP
RθJC is determined with the device mounted on a 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu pad on a 1.5 inch × 1.5 inch (3.81 cm ×
3.81 cm), 0.06 inch (1.52 mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu.
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CSD25404Q3
SLPS570 – NOVEMBER 2015
GATE
www.ti.com
GATE
DRAIN
DRAIN
Max RθJA = 160°C/W
when mounted on
minimum pad area of
2 oz. Cu.
Max RθJA = 55°C/W
when mounted on
1 inch2 of 2 oz. Cu.
SOURCE
SOURCE
M0137-02
M0137-01
5.3 Typical MOSFET Characteristics
(TA = 25°C unless otherwise stated)
Figure 1. Transient Thermal Impedance
4
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Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
120
VGS = -1.8 V
VGS = -2.5 V
VGS = -4.5 V
120
100
80
60
40
20
TC = 125° C
TC = 25° C
TC = -55° C
105
-IDS - Drain-To-Source Current (A)
-IDS - Drain-to-Source Current (A)
140
90
75
60
45
30
15
0
0
0
0.5
1
1.5
2
2.5
3
3.5
4
-VDS - Drain-to-Source Voltage (V)
4.5
5
0
0.5
D002
1
1.5
2
2.5
3
-VGS - Gate-To-Source Voltage (V)
3.5
4
D003
VDS = –5 V
Figure 2. Saturation Characteristics
Figure 3. Transfer Characteristics
10000
7
6
C - Capacitance (pF)
-VGS - Gate-to-Source Voltage (V)
8
5
4
3
2
1000
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
100
1
10
0
0
2
4
6
8
10
12
14
Qg - Gate Charge (nC)
ID = –10 A
16
18
0
20
2
4
D004
Figure 4. Gate Charge
20
D005
Figure 5. Capacitance
24
RDS(on) - On-State Resistance (m:)
1.2
-VGS(th) - Threshold Voltage (V)
18
VDS = –10 V
1.3
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
-75
6
8
10
12
14
16
-VDS - Drain-to-Source Voltage (V)
TC = 25° C, I D = -10 A
TC = 125° C, I D = -10 A
21
18
15
12
9
6
3
0
-50
-25
0
25
50
75 100
TC - Case Temperature (qC)
125
150
175
0
D006
2
4
6
8
10
-VGS - Gate-To-Source Voltage (V)
12
D007
ID = –250 µA
Figure 6. Threshold Voltage vs Temperature
Figure 7. On-State Resistance vs Gate-to-Source Voltage
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CSD25404Q3
SLPS570 – NOVEMBER 2015
www.ti.com
Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
100
1.3
VGS = -2.5 V
VGS = -4.5 V
-ISD - Source-To-Drain Current (A)
Normalized On-State Resistance
1.4
1.2
1.1
1
0.9
0.8
0.7
-75
TC = 25qC
TC = 125qC
10
1
0.1
0.01
0.001
0.0001
-50
-25
0
25
50
75 100
TC - Case Temperature (qC)
125
150
0
175
0.2
0.4
0.6
0.8
-VSD - Source-To-Drain Voltage (V)
D008
1
D009
ID = –10 A
Figure 8. Normalized On-State Resistance vs Temperature
Figure 9. Typical Diode Forward Voltage
70
-IDS - Drain-to-Source Current (A)
-IDS - Drain-to-Source Current (A)
1000
100
10
1
DC
10 ms
0.1
0.1
1 ms
100 µs
1
10
-VDS - Drain-to-Source Voltage (V)
50
60
50
40
30
20
10
0
-50
-25
D010
0
25
50
75
100 125
TC - Case Temperature (qC)
150
175
D011
Single Pulse, Max RθJC = 1.3 °C/W
Figure 10. Maximum Safe Operating Area
6
Figure 11. Maximum Drain Current vs Temperature
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SLPS570 – NOVEMBER 2015
6 Device and Documentation Support
6.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
6.2 Trademarks
NexFET, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
6.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
6.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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CSD25404Q3
SLPS570 – NOVEMBER 2015
www.ti.com
7 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
7.1 CSD25404Q3 Package Dimensions
DIM
MILLIMETERS
NOM
MAX
MIN
NOM
MAX
A
0.950
1.000
1.100
0.037
0.039
0.043
A1
0.000
0.000
0.050
0.000
0.000
0.002
b
0.280
0.340
0.400
0.011
0.013
0.016
b1
0.310 NOM
0.012 NOM
c
0.150
0.200
0.250
0.006
0.008
0.010
D
3.200
3.300
3.400
0.126
0.130
0.134
D2
1.650
1.750
1.800
0.065
0.069
0.071
d
0.150
0.200
0.250
0.006
0.008
0.010
d1
0.300
0.350
0.400
0.012
0.014
0.016
E
3.200
3.300
3.400
0.126
0.130
0.134
E2
2.350
2.450
2.550
0.093
0.096
0.100
0.550
0.014
e
H
0.650 TYP
0.35
K
8
INCHES
MIN
0.450
0.026 TYP
0.650 TYP
0.018
0.022
0.026 TYP
L
0.35
0.450
0.550
0.014
0.018
0.022
L1
0
—
0
0
—
0
θ
0
—
0
0
—
0
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SLPS570 – NOVEMBER 2015
7.2 Recommended PCB Pattern
For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through
PCB Layout Techniques.
7.3 Recommended Stencil Opening
All dimensions are in mm, unless otherwise specified.
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1.75 ±0.10
7.4 Q3 Tape and Reel Information
4.00 ±0.10 (See Note 1)
Ø 1.50
+0.10
–0.00
3.60
1.30
3.60
5.50 ±0.05
12.00
+0.30
–0.10
8.00 ±0.10
2.00 ±0.05
M0144-01
Notes:
1. 10 sprocket hole pitch cumulative tolerance ±0.2
2. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm
3. Material: black static dissipative polystyrene
4. All dimensions are in mm (unless otherwise specified).
5. Thickness: 0.30 ±0.05 mm
6. MSL1 260°C (IR and Convection) PbF-Reflow Compatible
10
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
CSD25404Q3
ACTIVE
VSON-CLIP
DQG
8
2500
RoHS-Exempt
& Green
SN
Level-1-260C-UNLIM
-55 to 150
CSD25404
CSD25404Q3T
ACTIVE
VSON-CLIP
DQG
8
250
RoHS-Exempt
& Green
SN
Level-1-260C-UNLIM
-55 to 150
CSD25404
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of