DEM-PCM1801

DEM-PCM1801 DEM-DAI1801 EVALUATION FIXTURE ® For most current data sheet and other product information, visit www.burr-brown.com FEATURES DESCRIPTION ● SOCKET FOR THE PCM1801 ● COMPATIBLE WITH THE DEM-DAI MOTHER BOARD The DEM-PCM1801 is a basic evaluation fixture for the PCM1801 16-bit stereo audio A/D converter. It may be used as part of the customer’s prototype system design, or in conjunction with the DEM-DAI mother board to provide a complete evaluation platform for the PCM1801. ● POWER SUPPLY, DIGITAL I/O, AND ANALOG INPUT CONNECTORS ORDERING INFORMATION ● EASY CONFIGURATION USING THE ON-BOARD DIP SWITCH ● REQUIRES A SINGLE +5V POWER SUPPLY PART NUMBER DESCRIPTION DEM-PCM1801 DEM-DAI1801 Basic Evaluation Fixture Includes the DEM-PCM1801 and the DEM-DAI Mother Board BLOCK DIAGRAM Power Supply Digital Inerface Lch IN PCM1801 A/D Rch IN Mode Control Switch International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ® © 1999 Burr-Brown Corporation LI-542 1 Printed in U.S.A. November, 1999 DEM-PCM1801 HARDWARE DESCRIPTION BCK is the bit clock, which operates at 32, 48, or 64 times the sampling frequency. DOUT is the audio data output, carrying 16-bit data for both the Left and Right channels. POWER SUPPLY The DEM-PCM1801 requires a single +5V supply. Two connectors are provided for the power supply: CN1 and CN4. For standalone operation, the power supply may be connected to either CN1 or CN4. When using the DEMPCM1801 in conjunction with the DEM-DAI mother board, connector CN4 is used as the power supply connector. When using connector CN4, jumpers must be installed at JP1. When used in conjunction with the DEM-DAI mother board, all necessary clocks can be derived from the mother board’s crystal oscillator/divider circuitry. The PCM1801’s data output (DOUT) may be transmitted over coaxial cable or optical link using the mother board’s S/PDIF transmitter circuitry. Refer to the DEM-DAI data sheet for more information regarding mother board use and configuration. The DEM-PCM1801 includes all necessary power supply filter and bypass capacitors. Refer to Figure 1 for connections and component values. DIP SWITCH Switch SW1 is used to configure the PCM1801’s audio data format and enable/disable the on-chip digital high-pass filter. The high-pass filter may be used to remove the DC offset generated by the on-chip AFE circuitry. Table I shows the available settings for switch SW1. ANALOG INPUTS The PCM1801’s left and right analog inputs are available at connector CN2. Both inputs are AC coupled using 1µF aluminum electrolytic capacitors. The full scale input signal for the PCM1801 is 2.828Vp-p (or 1Vrms). SWITCH FUNCTION FMT Selects Audio Data Format BYPASS Enables or Disables the HPF DIGITAL INTERFACE L = 16-Bit Left-Justified, MSB first H = 16-Bit I2S, MSB first L = HPF Enabled H = HPF Disabled (or Bypassed) Connector CN3 provides the interface to the PCM 1801’s audio serial port and system clock inputs. The PCM1801 is a Slave device, meaning that all clocks must be provided by an external audio source. NOTE: (1) Audio data must be in Binary Two's Complement format. TABLE I. DIP Switch (SW1) Configuration VCC VCC GND VINL CN2 GND SCHEMATICS A schematic of the DEM-PCM1801 evaluation fixture is shown in Figure 1. SCLK is the system clock input, which may be 256, 384, or 512 times the sampling frequency (fS). The sampling frequency may be set from 4kHz to 48kHz. LRCK is the left/ right word clock, which operates at the sampling frequency. VINR SETTINGS (1) CN4 CN1 JP1 + C7 PCM1801U U1 1 + C4 VINL VREF1 13 2 VINR VREF2 13 3 DGND AGND 12 4 VDD 5 SCKI 6 BCK 7 LRCK VCC 11 DOUT NC BCK LRCK GND SCLK C6 + C5 + C3 + FMT 10 BYPAS 9 DOUT 8 SW1 CN3 C3 - C6 = 4.7µF Aluminum Electrolytic C1 = 100µF Aluminim Electrolytic C7, C8 = 1µF Aluminum Electrolytic C2 = 0.1µF Ceramic FIGURE 1. Schematic for the DEM-PCM1801 Evaluation Fixture. ® DEM-PCM1801 + 2 FMT C8 BYPASS + C1 C2 PCB LAYOUT Figures 2 through 4 show the printed circuit board (PCB) plots for the DEM-PCM1801. Figure 2. Silk Screen (Top Side). Figure 4. Bottom Side Layer. Figure 3. Top Side Layer. ® 3 DEM-PCM1801