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DRIVECABLE02EVK/NOPB

DRIVECABLE02EVK/NOPB

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    -

  • 描述:

    BOARD EVAL SERDES, CLC001, 012

  • 数据手册
  • 价格&库存
DRIVECABLE02EVK/NOPB 数据手册
150 – 1500 Mbps Cable Extender Chipset (DS15BA101/DS15EA101) Evaluation Kit USER MANUAL Part Number: DriveCable02EVK NOPB For the latest documents concerning these products and evaluation kit, visit lvds.national.com. Schematics and gerber files are also available at lvds.national.com. January 2008 Rev. 0.3 DriveCable02EVK User Manual Table of Contents Overview ................................................................................................................................................ 3 Board Description................................................................................................................................... 4 Setting Up the DriveCable02EVK Evaluation Kit ................................................................................. 5 Evaluation with the 100-ohm Differential Balanced Cables .................................................................. 6 Evaluation with the 50-ohm Coaxial Cables ........................................................................................ 10 Page 2 of 12 DriveCable02EVK User Manual Overview The DriveCable02EVK is an evaluation kit designed for demonstrating performance of the DS15BA101 and DS15EA101, a cable extender chipset. The kit enables evaluation of the chipset with 100-ohm differential cables such as twin-axial and low cost CAT5e/6/7 twisted pair cables and 50-ohm coaxial cables. The purpose of this document is to: familiarize you with the DriveCable02EVK, suggest the test setup procedures and instrumentation, and guide you through some typical measurements that demonstrate performance of the chipset in typical applications. Page 3 of 12 DriveCable02EVK User Manual Board Description Vbias GND VDD Figure 1 shows a drawing of the board. It is a 3 inch x 4 inch 6-layer PCB with a two-device layout that is capable of demonstrating performance and all features of the DS15BA101 and DS15EA101. Figure 1. DriveCable02EVK Board Connector JP1 JP2 JP3 Device U1 U2 U1 Function Select output amplitude Output enable Set input common mode voltage (Optional) Table 1. DriveCable02EVK Connector-Device-Function Cross Reference Page 4 of 12 DriveCable02EVK User Manual Setting Up the DriveCable02EVK Evaluation Kit This section provides a quick reference for setting up some typical test configurations using the DriveCable02EVK that will enable you to evaluate the solution with 100-ohm differential cables (twinaxial and twisted pair cables) as well as 50-ohm coaxial cables. Page 5 of 12 DriveCable02EVK User Manual Evaluation with 100-ohm Differential Balanced Cables Advantest D3186 Pattern Generator Connector Adapter The DriveCable02EVK can be used to evaluate the chipset with 100-ohm differential cables (twin-axial and twisted pair cables). Examples are CAT5e/6/7 cable assemblies such as Belden 1500A, Belden 1700A, Siemon CAT7 Tera, Belden 89207 and Amphenol SKEWCLEAR series of cables. Figure 2 is a simplified block diagram of the configuration. U1 Cable Tektronix TDS 6154C Oscilloscope U2 Connector Adapter Cable Extender Chipset Evaluation Board P/N: DriveCable02EVK, Rev. 2.0 Gigabits@ManyMeters Figure 2. Test Setup for 100-ohm Differential Cable Evaluation Note: Connector Adapters are NOT included in this kit. Currently, RJ45-SMA adapters are available and can be ordered separately. The part number is DS91C176EVK NOPB. If cable assemblies have other than RJ-45 connectors, it is recommended to obtain/develop an adapter board similar to the RJ45-SMA adapter to ensure good impedance control of the signal path. For more information about the RJ45-SMA Adapter check: http://www.national.com/appinfo/lvds/ds91c176evk.html Page 6 of 12 DriveCable02EVK User Manual Follow these steps to set up the DriveCable02EVK for evaluation with 100-ohm differential balanced cables: 1. Configure DriveCable02EVK board: a) Provide 3.3 V between the J2 (VDD) and J1 (GND). This powers all devices on the board. b) Set DS15BA101 (U1) output voltage amplitude to 0.4 V by using JP1. c) Enable DS15EA101 (U2) outputs by setting its EN* pin to low. This is accomplished by placing a jumper across the GND and SIG pins of the connector JP2. 2. Connect the DS15BA101 inputs to a signal source (e.g. Pattern Generator or Serializer output). a) Note the AC-coupling capacitors on the inputs (SMA1 and SMA2) b) Adjust the signal parameters (VOH, VOL, VCM) so that they comply with the DS15BA101 input requirements. c) If DC-coupled interface is desired, use 0-ohm SM0402 resistors in place of the C1 and C2. d) There is a provision to add an optional resistor divider network (R12 and R13) on the DS15BA101 inputs in case one desires biasing the input signal externally (note: there is already an internal biasing network on the DS15BA101 inputs). In addition, the JP3 connector provides signal biasing provision for a voltage source. 3. Attach the connector adapters (if available) to the DS15BA101 outputs (SMA3 and SMA4) and DS15EA101 inputs (SMA5 and SMA6). 4. Connect a 100-ohm cable assembly with corresponding plugs on its ends. 5. The LED1 will illuminate if the DS15EA101 (U2) detects a valid signal. 6. Connect the DS15EA101 (U2) outputs directly to an oscilloscope, a bit error rate tester (BERT) receiver or a deserializer using good quality coaxial cables. Note that the equalizer outputs have internal 50-ohm pull-ups and that there are on-board AC-coupling capacitors. 7. Observe the results on the oscilloscope or BERT receiver. Page 7 of 12 DriveCable02EVK User Manual Figure 3 presents typical maximum data rate as a function of CAT5e cable length. The data was collected on four chipsets (A, B, C and D). The data in red was taken with the 0.5 UI jitter criteria while the data in blue was taken with the 0.25 UI jitter criteria. A B C D A B C D 2.50 Maximum Data Rate [Gbps] 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.00 0 25 50 75 100 Cable Length [m] Figure 3. DS15BA101 and DS15EA101 Performance with CAT5e Cable Page 8 of 12 125 DriveCable02EVK User Manual Figure 4 presents maximum data rate as a function of CAT7 cable length. The data was collected on four chipsets (A, B, C and D). The data in red was taken with the 0.5 UI jitter criteria while the data in blue was taken with the 0.25 UI jitter criteria. A B C D A B C D 3.00 Maximum Data Rate [Gbps] 2.75 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.00 0 25 50 75 Cable Length [m] Figure 4. DS15BA101 and DS15EA101 Performance with CAT7 Cable Page 9 of 12 100 DriveCable02EVK User Manual Evaluating 50-ohm Coaxial Cables The DriveCable02EVK can be used to evaluate 50-ohm coaxial cables. Examples of 50-ohm coaxial cables are Belden 9914 and Andrew FSJ-50B. Figure 5 is a simplified block diagram of the configuration. Advantest D3186 Pattern Generator U1 Cable Extender Chipset Evaluation Board P/N: DriveCable02EVK, Rev. 2.0 Gigabits@ManyMeters Tektronix TDS 6154C Oscilloscope U2 Figure 5. Test Setup for 50-ohm Coaxial Cable Evaluation Page 10 of 12 Cable DriveCable02EVK User Manual Follow these steps to set up the DriveCable02EVK for evaluation with 50-ohm coaxial cables: 1. Configure DriveCable02EVK board: a) Provide 3.3 V between the J2 (VDD) and J1 (GND). This powers all devices on the board. b) Set DS15BA101 (U1) output voltage amplitude to 0.8 V by using JP1. c) Enable DS15EA101 (U2) outputs by setting its EN* pin to low. This is accomplished by placing a jumper across the GND and SIG pins of the connector JP2. d) Remove R8 and place 50-ohm to GND termination on the DS15EA101 input that will be used (R9 or R10) and 25-ohm to GND termination on the DS15EA101 input that will NOT be used (R9 or R10). 2. Connect the cable driver inputs to a signal source (e.g. Pattern Generator). e) f) Note the AC-coupling capacitors on the inputs (SMA1 and SMA2) Adjust the signal parameters (VOH, VOL, VCM) so that they comply with the DS15BA101 input requirements. g) If DC-coupled interface is desired, use 0-ohm SM0402 resistors in place of the C1 and C2. h) There is a provision to add an optional resistor divider network (R12 and R13) on the DS15BA101 inputs in case one desires bias the signal externally (there is an internal biasing network on the DS15BA101 inputs). In addition, the JP3 connector provides signal biasing provision for a voltage source. 3. Use SMA-to-BNC Adapters (i.e. PE9074 from www.pasternack.com) if necessary (in case coaxial cable has BNC connectors). 4. Connect a coaxial cable assembly with coresponding connectors on its ends. 5. The LED1 will illuminate if the DS15EA101 (U2) detects a valid signal. 6. Connect equalizer outputs directly to an oscilloscope or a bit error rate tester (BERT) receiver using good quality coaxial cables. Note that the equalizer outputs have internal 50-ohm pull-ups and that there are on-board AC-coupling capacitors. 7. Observe the results on the oscilloscope or BERT receiver. Page 11 of 12 DriveCable02EVK User Manual Figure 6 presents maximum data rate as a function of Belden 9914 cable length. The data was collected on two chipsets (A and B). The data in red was taken with the 0.5 UI jitter criteria while the data in blue was taken with the 0.25 UI jitter criteria. A B A B 3.00 Maximum Data Rate [Gbps] 2.75 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.00 0 100 200 Cable Length [m] Figure 6. DS15BA101 and DS15EA101 Performance with Belden 9914 Cable Page 12 of 12 300 To: Company: Phone: Fax: Date: From: Phone: Fax: 11/27/2007 Page 1 of __ Gordon Galbraith (503) 992-4448 E:\...\06_P-06379R0_370HR_b.zlf - 11/27/2007 2:46:04 PM [CUSTOMER COPY] soldermask: PSR 4000 Taiyo Thickness Material Type Nom mils E1 .5oz E2 .5oz E3 .5oz (48) FOIL 10.08 (256) 2116 0.65 2.50 0.65 28.81 E4 .5oz E5 .5oz E6 .5oz (um) 1.90 0.65 2.50 0.65 / 1652 - Polyclad 370 HR (17) (64) Lam, 370HR .0025 1080 .5/.5 DSTF 24x18 (17) (732) 7628 / 7628 / 7628 / 7628 - Polyclad 370 HR (17) (64) Lam, 370HR .0025 1080 .5/.5 DSTF 24x18 (17) 10.08 (256) 1652 1.90 (48) FOIL / 2116 - Polyclad 370 HR Overall Board Thicknesses (Over Conductor) inches (mm) nom: 0.0604 (1.53) Customer Notes: National Semiconductor Total thickness .060" +/- .006" Note pitch is equal to center to center spacing, not edge to edge. Pitch = edge to edge spacing plus one trace width. -------------------------------------------------------------------------------------------------Impedance Notes 11/26/2007 10:41 AM -------------------------------------------------------------------------------------------------Layer 1 (ref 2); 18.00 mil lines for 50 ohms +/-10% (model 49.69) 8.50 mil lines/14 mil pitch for 100 ohm differential +/-10% (model 98.9) IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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DRIVECABLE02EVK/NOPB 价格&库存

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