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DRV10983, DRV10983Z
SLVSCP6H – JULY 2014 – REVISED JUNE 2020
DRV10983 12- to 24-V, Three-Phase, Sensorless BLDC Motor Driver
1 Features
3 Description
•
•
•
The DRV10983 device is a three-phase sensorless
motor driver with integrated power MOSFETs, which
can provide continuous drive current up to 2 A. The
device is specifically designed for cost-sensitive, lownoise, low-external-component-count applications.
1
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Input Voltage Range: 8 to 28 V
Total Driver H + L rDS(on): 250 mΩ
Drive Current: 2-A Continuous Winding Current
(3-A Peak)
Sensorless Proprietary Back Electromotive Force
(BEMF) Control Scheme
Continuous Sinusoidal 180° Commutation
No External Sense Resistor Required
For Flexibility User May Include External Sense
Resistor to Monitor Power Delivered to Motor
Flexible User Interface Options:
– I2C Interface: Access Registers for Command
and Feedback
– Dedicated SPEED Pin: Accepts Either Analog
or PWM Input
– Dedicated FG Pin: Provides TACH Feedback
– Spin-Up Profile Customizable With EEPROM
– Forward-Reverse Control With DIR Pin
Integrated Step-Down Regulator to Efficiently
Provide Voltage (5 V or 3.3 V) for Internal and
External Circuits
Supply Current 3 mA With Standby Version
(DRV10983)
Supply Current 180 μA With Sleep Version
(DRV10983Z)
Overcurrent Protection
Lock Detection
Voltage Surge Protection
UVLO Protection
Thermal Shutdown Protection
Thermally-Enhanced 24-Pin HTSSOP
The DRV10983 device uses a proprietary sensorless
control scheme to provide continuous sinusoidal
drive, which significantly reduces the pure tone
acoustics that typically occur as a result of
commutation. The interface to the device is designed
to be simple and flexible. The motor can be controlled
directly through PWM, analog, or I2C inputs. Motor
speed feedback is available through either the FG pin
or I2C.
The DRV10983 device features an integrated stepdown regulator to efficiently step down the supply
voltage to either 5 or 3.3 V for powering both internal
and external circuits. The device is available in either
a sleep mode or a standby mode version to conserve
power when the motor is not running. The standby
mode (3-mA) version leaves the regulator running
and the sleep mode (180-µA) version shuts it off. Use
the standby mode version in applications where the
regulator is used to power an external microcontroller.
TI provides DRV10983 tuning Guide for quick setup
and tuning of the device for optimal performance.
Device Information(1)
PART NUMBER
DRV10983
Appliance Fan
HVAC
HTSSOP (24)
DRV10983Z
BODY SIZE (NOM)
7.80 mm × 6.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Application Schematic
VCC
10 µF
0.1 µF
2 Applications
•
•
PACKAGE
0.1 µF
10 µF
3.3 V/5 V
47 µH
1 µF
1 µF
Interface to
Microcontroller
1
VCP
VCC 24
2
CPP
VCC 23
3
CPN
W 22
4
SW
W 21
5
SWGND
V 20
6
VREG
V 19
7
V1P8
U 18
8
GND
U 17
9
V3P3
PGND 16
10
SCL
PGND 15
11
SDA
12
FG
M
DIR 14
SPEED 13
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
DRV10983, DRV10983Z
SLVSCP6H – JULY 2014 – REVISED JUNE 2020
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Description (continued).........................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
8
1
1
1
2
5
5
6
Absolute Maximum Ratings ...................................... 6
ESD Ratings.............................................................. 6
Recommended Operating Conditions....................... 7
Thermal Information .................................................. 7
Electrical Characteristics........................................... 8
Typical Characteristics ............................................ 11
Detailed Description ............................................ 12
8.1
8.2
8.3
8.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
12
13
14
17
8.5 Register Maps ......................................................... 42
9
Application and Implementation ........................ 48
9.1 Application Information............................................ 48
9.2 Typical Application .................................................. 48
10 Power Supply Recommendations ..................... 50
11 Layout................................................................... 50
11.1 Layout Guidelines ................................................. 50
11.2 Layout Example .................................................... 51
12 Device and Documentation Support ................. 52
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Device Support ....................................................
Documentation Support ........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Receiving Notification of Documentation Updates
Community Resources..........................................
Glossary ................................................................
52
52
52
52
52
52
52
13 Mechanical, Packaging, and Orderable
Information ........................................................... 52
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (February 2018) to Revision H
Page
•
Added PGND spec to Absolute Maximum Ratings ................................................................................................................ 6
•
Added Open Drain spec to Electrical Characteristics .......................................................................................................... 10
•
Added update on V3P3 LDO and V1P8 LDO ..................................................................................................................... 14
•
Updated PWM OutputPWM Output section ......................................................................................................................... 37
•
Added information on motor speed accuracy ...................................................................................................................... 39
•
Added MotorCurrent1 and MotorCurrent2 to Register Map ................................................................................................. 42
•
Added MotorCurrent1 and MotorCurrent2 to Table 9........................................................................................................... 44
•
Updated Table 10 ................................................................................................................................................................. 49
•
Added EEPROM note to Layout Guidelines......................................................................................................................... 50
Changes from Revision F (December 2017) to Revision G
Page
•
Added timing information for entering and exiting sleep mode and standby mode ............................................................... 9
•
Added BEMF COMPARATOR hysteresis specification ....................................................................................................... 10
•
Updated Start the Motor Under Different Initial Conditions figure ........................................................................................ 21
•
Changed the default value for register address 0x27 from 0xFC to 0xF4 in the Default EEPROM Value table ................. 43
•
Deleted the "TI recommends..." sentence from the description for address 0x27, bit 3 ...................................................... 46
•
Added constraints to recommended external inductor ......................................................................................................... 49
Changes from Revision E (May 2017) to Revision F
Page
•
Specified the drive current as continuous winding current in the Features............................................................................ 1
•
Added the internal SPEED pin pulldown resistance to ground parameter to the Electrical Characteristics table ................. 9
•
Changed the Step-Down Regulator section ......................................................................................................................... 14
•
Updated the Motor Phase Resistance section ..................................................................................................................... 17
2
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Product Folder Links: DRV10983
DRV10983, DRV10983Z
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SLVSCP6H – JULY 2014 – REVISED JUNE 2020
•
Deleted the Inductive AVS Function section ........................................................................................................................ 37
•
Changed the default value for register address 0x29 from 0xB7 to 0xB9 in the Default EEPROM Value table ................. 43
•
Added application information for the sleep mode device ................................................................................................... 48
Changes from Revision D (May 2017) to Revision E
•
Page
Changed pin numbering in the Pin Functions table .............................................................................................................. 6
Changes from Revision C (May 2016) to Revision D
Page
•
Added the DRV10983Z part number to the data sheet header and to the Device Information table .................................... 1
•
Added DRV10983Z part number ............................................................................................................................................ 7
•
Corrected the link to the DRV10983 and DRV10975 Tuning Guide .................................................................................... 17
•
Added text to the PWM Output section ................................................................................................................................ 37
•
Changed Figure 37............................................................................................................................................................... 38
•
Changed "FGOLSet[1:0]" to "FGOLsel[1:0]" in Register Map address 0x2B....................................................................... 42
•
Added recommended minimum dead time to SysOpt7 register........................................................................................... 47
•
Added External Components table ...................................................................................................................................... 49
•
Changed the link to the DRV10983 and DRV10975 Tuning Guide ..................................................................................... 49
•
Changed the layout example................................................................................................................................................ 51
Changes from Revision B (February 2015) to Revision C
Page
•
Added "phase to phase" clarification for overcurrent protection........................................................................................... 10
•
Added more accurate description to clarify overcurrent protection operation ...................................................................... 15
Changes from Revision A (October 2014) to Revision B
•
Page
Changed data sheet with the DRV10983Z sleep version ..................................................................................................... 1
Changes from Original (July 2014) to Revision A
Page
•
Changed the input voltage range: 8 to 28 V........................................................................................................................... 1
•
Deleted DRV10983Z sleep version part and updated standby mode supply current ............................................................ 1
•
Updated pin information for SW, SWGND, VREG, SDA, FG, and VCC pins .......................................................................... 5
•
Added DIR, SW, and VREG pins to Absolute Maximum Ratings ......................................................................................... 6
•
Updated max supply voltage and voltage range ratings for VCC and U, V, W in Recommended Operating Conditions ..... 6
•
changed Functional Block Diagram ..................................................................................................................................... 13
•
Changed "hardware current limit" to "lock detection current limit" and "software current" to "acceleration current
limit" throughout data sheet .................................................................................................................................................. 15
•
Updated max value for open to closed loop threshold ........................................................................................................ 27
•
Corrected description to "velocity constant of the motor" for Equation 2 ............................................................................ 27
•
Corrected register name in Start-Up Current Setting .......................................................................................................... 27
•
Updated Equation 3 ............................................................................................................................................................. 27
•
Updated Figure 20 ............................................................................................................................................................... 28
•
Updated caption name for Figure 24 ................................................................................................................................... 30
•
Corrected max speed command setting for SpdCtrl[8:0] .................................................................................................... 30
•
Updated register description for status register. .................................................................................................................. 42
•
Updated the data in the examples for MotorSpeed1 and MotorPeriod1 ............................................................................. 44
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DRV10983, DRV10983Z
SLVSCP6H – JULY 2014 – REVISED JUNE 2020
www.ti.com
•
Updated IPDPosition description in Register Map .............................................................................................................. 44
•
Increased max motor voltage for Recommended Application Range ................................................................................. 49
•
Updated graph callout for Figure 41 .................................................................................................................................... 50
4
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DRV10983, DRV10983Z
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SLVSCP6H – JULY 2014 – REVISED JUNE 2020
5 Description (continued)
An I2C interface allows the user to reprogram specific motor parameters in registers and program the EEPROM
to help optimize the performance for a given application. The DRV10983 device is available in a thermally
efficient HTSSOP, 24-pin package with an exposed thermal pad. The operating temperature is specified from
–40°C to 125°C.
6 Pin Configuration and Functions
PWP PowerPAD™ Package
24-Pin HTSSOP With Exposed Thermal Pad
Top View
VCP
1
24
VCC
CPP
2
23
VCC
CPN
3
22
W
SW
4
21
W
SWGND
5
20
V
VREG
6
19
V
Thermal pad (GND)
V1P8
7
18
U
GND
8
17
U
V3P3
9
16
PGND
SCL
10
15
PGND
SDA
11
14
DIR
FG
12
13
SPEED
Not to scale
Pin Functions
PIN
NAME
NO.
TYPE (1)
DESCRIPTION
CPN
3
P
Charge pump pin 1, use a ceramic capacitor between CPN and CPP.
CPP
2
P
Charge pump pin 2, use a ceramic capacitor between CPN and CPP.
DIR
14
I
Direction
FG
12
O
FG signal output.
GND
8
—
Digital and analog ground
15, 16
—
Power ground
SCL
10
I
I2C clock signal
SDA
11
I/O
I2C data signal
SPEED
13
I
Speed control signal for PWM or analog input speed command
SW
4
O
Step-down regulator switching node output
PGND
SWGND
5
P
Step-down regulator ground
U
17, 18
O
Motor U phase
V
19, 20
O
Motor V phase
7
P
Internal 1.8-V digital core voltage. V1P8 capacitor must connect to GND. This is an output, but not
specified to drive external loads.
V1P8
(1)
I = input, O = output, I/O = input/output, P = power
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DRV10983, DRV10983Z
SLVSCP6H – JULY 2014 – REVISED JUNE 2020
www.ti.com
Pin Functions (continued)
PIN
TYPE (1)
DESCRIPTION
9
P
Internal 3.3-V supply voltage. V3P3 capacitor must connect to GND. This is an output and may drive
external loads not to exceed IV3P3_MAX.
VCC
23, 24
P
Device power supply
VCP
1
P
Charge pump output.
VREG
6
P
Step-down regulator output and feedback point
21, 22
O
Motor W phase
—
—
The exposed thermal pad must be electrically connected to the ground plane through soldering to
PCB for proper operation and connected to bottom side of PCB through vias for better thermal
spreading.
NAME
NO.
V3P3
W
thermal pad
(GND)
7 Specifications
7.1 Absolute Maximum Ratings
over operating ambient temperature (unless otherwise noted) (1)
Input voltage (2)
MIN
MAX
VCC
–0.3
30
SPEED
–0.3
4
PGND
–0.3
0.3
SCL, SDA
–0.3
4
DIR
–0.3
4
–1
30
U, V, W
SW
Output voltage
(2)
–1
30
VREG
–0.3
7
FG
–0.3
4
VCP
–0.3
V(VCC) + 6
CPN
–0.3
30
CPP
–0.3
V(VCC) + 6
V3P3
–0.3
4
V1P8
UNIT
V
V
–0.3
2.5
Maximum junction temperature, TJ_MAX
–40
150
°C
Storage temperature, Tstg
–55
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to the network ground terminal (GND) unless otherwise noted.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
6
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
(1)
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2)
±2500
±1500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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SLVSCP6H – JULY 2014 – REVISED JUNE 2020
7.3 Recommended Operating Conditions
over operating ambient temperature range (unless otherwise noted)
Supply voltage
Voltage
VCC
MIN
NOM
MAX
8
24
28
U, V, W
–0.7
SCL, SDA, FG, SPEED, DIR
–0.1
PGND, GND
–0.1
3.3
3.6
V
0.1
100
Step-down regulator output current (linear mode)
0
V3P3 LDO output current
5
Operating junction temperature, TJ
V
29
Step-down regulator output current (buck mode)
Current
UNIT
–40
mA
125
°C
7.4 Thermal Information
DRV10983, DRV10983Z
THERMAL METRIC (1)
PWP (HTSSOP)
UNIT
24 PINS
RθJA
Junction-to-ambient thermal resistance
36.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
17.4
°C/W
RθJB
Junction-to-board thermal resistance
14.8
°C/W
ψJT
Junction-to-top characterization parameter
0.4
°C/W
ψJB
Junction-to-board characterization parameter
14.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
1.1
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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DRV10983, DRV10983Z
SLVSCP6H – JULY 2014 – REVISED JUNE 2020
www.ti.com
7.5 Electrical Characteristics
over operating ambient temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
TA = 25°C; sleepDis = 1; SPEED = 0 V;
V(VCC) = 24 V; buck regulator
3.5
5
TA = 25°C; sleepDis = 1; SPEED = 0 V;
V(VCC) = 24 V; linear regulator
11
TA = 25°C; SPEED = 0 V; V(VCC) = 24 V;
standby mode device; buck regulator
3
TA = 25°C; SPEED = 0 V; V(VCC) = 24 V;
standby mode device; linear regulator
9
UNIT
SUPPLY CURRENT (DRV10983)
IVcc
Supply current
IVccSTBY
Standby current
mA
4
mA
SUPPLY CURRENT (DRV10983Z)
TA = 25°C; sleepDis = 1; SPEED = 0 V;
V(VCC) = 24 V; buck regulator
3.5
TA = 25°C; sleepDis = 1; SPEED = 0 V;
V(VCC) = 24 V; linear regulator
11
Sleep current
TA = 25°C; SPEED = 0 V; V(VCC) = 24 V;
sleep mode device; buck regulator
160
200
µA
VUVLO_R
UVLO threshold voltage
Rise threshold, TA = 25°C
7
7.4
8
V
VUVLO_F
UVLO threshold voltage
Fall threshold, TA = 25°C
6.7
7.1
7.5
V
VUVLO_HYS
UVLO threshold voltage
hysteresis
TA = 25°C
200
300
400
mV
V(VCC) = 24 V, TA = 25°C, VregSel = 0,
5-mA load
3
3.3
3.6
V(VCC) = 24 V, TA = 25°C, VregSel = 1,
V(VREG) < 3.3 V, 5-mA load
V(VREG) – 0.3
V(VREG) – 0.1
V(VREG)
V(VCC) = 24 V, TA = 25°C, VregSel = 1,
V(VREG) ≥ 3.3 V, 5-mA load
3
3.3
3.6
IVcc
Supply current
IVccSLEEP
5
mA
UVLO
LDO OUTPUT
V3P3
IV3P3_MAX
Maximum load from V3P3
V1P8
V(VCC) = 24 V, TA = 25°C
5
V
mA
V(VCC) = 24 V, TA = 25°C, VregSel = 0
1.6
1.78
2
V(VCC) = 24 V, TA = 25°C, VregSel = 1
1.6
1.78
2
TA = 25˚C; VregSel = 0, LSW = 47 µH,
CSW = 10 µF, Iload = 50 mA
4.5
5
5.5
TA = 25˚C; VregSel = 1, LSW = 47 µH,
CSW = 10 µF, Iload = 50 mA
3.06
3.4
3.6
V
STEP-DOWN REGULATOR
VREG
Regulator output voltage
Regulator output voltage
(linear mode)
VREG_L
IREG_MAX
Maximum load from VREG
V
TA = 25°C, VregSel = 0, RSW = 39 Ω,
CSW = 10 µF
5
TA = 25°C, VregSel = 1, RSW = 39 Ω,
CSW = 10 µF
3.4
TA = 25°C, LSW = 47 µH, CSW = 10 µF
100
TA = 25˚C; V(VCC) = 24 V; V(VCP) = 29 V;
Iout = 1 A
0.25
TA = 85˚C; V(VCC) = 24 V; V(VCP) = 29 V;
Iout = 1 A
0.325
V
mA
INTEGRATED MOSFET
rDS(on)
Series resistance (H + L)
0.4
Ω
SPEED – ANALOG MODE
VAN/A_FS
Analog full-speed voltage
VAN/A_ZS
Analog zero-speed voltage
V(V3P3) × 0.9
100
mV
V
tSAM
Analog speed sample period
320
µs
VAN/A_RES
Analog voltage resolution
5.8
mV
SPEED – PWM DIGITAL MODE
8
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SLVSCP6H – JULY 2014 – REVISED JUNE 2020
Electrical Characteristics (continued)
over operating ambient temperature range (unless otherwise noted)
PARAMETER
VDIG_IH
PWM input high voltage
VDIG_IL
PWM input low voltage
ƒPWM
PWM input frequency
TEST CONDITIONS
MIN
TYP
MAX
2.2
UNIT
V
1
0.6
V
100
kHz
STANDBY MODE (DRV10983)
VEN_SB
Analog voltage-to-enter
standby mode
SpdCtrlMd = 0 (analog mode)
VEX_SB
Analog voltage-to-exit
standby
SpdCtrlMd = 0 (analog mode)
120
mV
tEX_SB_ANA
Time-to-exit from standby
mode
SpdCtrlMd = 0 (analog mode)
SPEED > VEX_SB
700
ms
Time taken to drive motor
after exiting from standby
mode
SpdCtrlMd = 0 (analog mode)
SPEED > VEX_SB; ISDen = 0;
BrkDoneThr[2:0] = 0
1
µs
tEX_SB_DR_ANA
tEX_SB_PWM
Time-to-exit from standby
mode
SpdCtrlMd = 1 (PWM mode)
SPEED > VDIG_IH
1
µs
tEX_SB_DR_PWM
Time taken to drive motor
after exiting from standby
mode
SpdCtrlMd = 1 (PWM mode)
SPEED > VDIG_IH; ISDen = 0; BrkDoneThr[2:0] = 0
55
ms
tEN_SB_ANA
Time-to-enter standby mode
SpdCtrlMd = 0 (analog mode)
SPEED < VEN_SB; AvSIndEn = 0
5
ms
tEN_SB_PWM
Time-to-enter standby mode
SpdCtrlMd = 1 (PMW mode)
SPEED < VDIG_IL; AvSIndEn = 0
60
ms
30
mV
SLEEP MODE (DRV10983Z)
VEN_SL
Analog voltage-to-enter
sleep
SpdCtrlMd = 0 (analog mode)
30
VEX_SL
Analog voltage-to-exit sleep
SpdCtrlMd = 0 (analog mode)
2.2
3.3
V
tEX_SL_ANA
Time-to-exit from sleep
mode
SpdCtrlMd = 0 (analog mode)
SPEED > VEX_SL
1
µs
tEX_SL_DR_ANA
Time taken to drive motor
after exiting from sleep
mode
SpdCtrlMd = 0 (analog mode)
SPEED > VEX_SL; ISDen = 0;
BrkDoneThr[2:0] = 0
350
µs
tEX_SL_PWM
Time-to-exit from sleep
mode
SpdCtrlMd = 1 (PWM mode)
SPEED > VDIG_IH
1
µs
tEX_SL_DR_PWM
Time taken to drive motor
after exiting from sleep
mode
SpdCtrlMd = 1 (PWM mode)
SPEED > VDIG_IH; ISDen = 0; BrkDoneThr[2:0] = 0
350
ms
tEN_SL_ANA
Time-to-enter sleep mode
SpdCtrlMd = 0 (analog mode)
SPEED < VEN_SL; AvSIndEn = 0
5.2
ms
tEN_SL_PWM
Time-to-enter sleep mode
SpdCtrlMd = 1 (PMW mode)
SPEED < VDIG_IL; AvSIndEn = 0
58
ms
RPD_SPEED_SL
Internal SPEED pin pulldown
VSPEED = 0 (sleep mode)
resistance to ground
mV
55
kΩ
DIGITAL I/O (DIR INPUT AND FG OUTPUT)
VDIR_H
Input high
VDIR_L
Input low
IFG_SINK
Output sink current
2.2
V
0.6
Vout = 0.3 V
5
V
mA
I2C SERIAL INTERFACE
VI2C_H
Input high
VI2C_L
Input low
2.2
V
0.6
V
LOCK DETECTION RELEASE TIME
tLOCK_OFF
Lock release time
tLCK_ETR
Lock enter time
5
s
0.3
s
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Electrical Characteristics (continued)
over operating ambient temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
3
4
A
150
°C
10
°C
50
mV
OVERCURRENT PROTECTION
IOC_limit
Overcurrent protection
TA = 25˚C; phase to phase
THERMAL SHUTDOWN
TSDN
Shutdown temperature
threshold
Shutdown temperature
TSDN_HYS
Shutdown temperature
threshold
Hysteresis
BEMF COMPARATOR
BEMFHYS
BEMF comparator hysteresis bemfHsyEn = 1
OPEN DRAIN OUTPUTS (FG, SDA)
VOL
10
Output logic low voltage
IO = 5 mA
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21.4
36.7
66.0
mV
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7.6 Typical Characteristics
0.008
Switching Regulator Output
5.2
Supply Current
0.006
0.004
0.002
5.1
5
4.9
IVCC
VREG
0
4.8
0
10
20
30
Power Supply
0
10
Figure 1. Supply Current vs Power Supply
20
Power Supply
D001
30
D002
Figure 2. Step-down Regulator Output vs Power Supply
(VregSel = 0)
Switching Regulator Output
3.5
3.4
3.3
3.2
VREG
3.1
0
10
20
Power Supply
30
D004
Figure 3. Step-down Regulator Output vs Power Supply
(VregSel = 1)
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8 Detailed Description
8.1 Overview
The DRV10983 is a three-phase sensorless motor driver with integrated power MOSFETs, which provide drive
current capability up to 2 A continuous. The device is specifically designed for low-noise, low external component
count, 12- to 24-V motor drive applications. The device is configurable through a simple I2C interface to
accommodate different motor parameters and spin-up profiles for different customer applications.
A 180° sensorless control scheme provides continuous sinusoidal output voltages to the motor phases to enable
ultra-quiet motor operation by keeping the electrically induced torque ripple small.
The DRV10983 features extensive protection and fault detect mechanisms to ensure reliable operation. Voltage
surge protection prevents the input Vcc capacitor from overcharging, which is typical during motor deceleration.
The devices provides phase to phase overcurrent protection without the need for an external current sense
resistor. Rotor lock detect is available through several methods. These methods can be configured with register
settings to ensure reliable operation. The device provides additional protection for undervoltage lockout (UVLO)
and for thermal shutdown.
The commutation control algorithm continuously measures the motor phase current and periodically measures
the VCC supply voltage. The device uses this information for BEMF estimation, and the information is also
provided through the I2C register interface for debug and diagnostic use in the system, if desired.
A buck step-down regulator efficiently steps down the supply voltage. The output of this regulator provides power
for the internal circuits and can also be used to provide power for an external circuit such as a microcontroller. If
providing power for an external circuit is not necessary (and to reduce system cost), configure the buck stepdown regulator as a linear regulator by replacing the inductor with resistor.
TI designed the interfacing to the DRV10983 to be flexible. In addition to the I2C interface, the system can use
the discrete FG pin, DIR pin, and SPEED pin. SPEED is the speed command input pin. It controls the output
voltage amplitude. DIR is the direction control input pin. FG is the speed indicator output, which shows the
frequency of the motor commutation.
EEPROM is integrated in the DRV10983 as memory for the motor parameter and operation settings. EEPROM
data transfers to the register after power on and exit from sleep mode.
The DRV10983 device can also operate in register mode. If the system includes a microcontroller communicating
through the I2C interface, the device can dynamically update the motor parameter and operation settings by
writing to the registers. In this configuration, the EEPROM data is bypassed by the register settings.
12
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8.2 Functional Block Diagram
SDA
I2C
Communication
SCL
Register
EEPROM
SW
3.3-/5-V StepDown Regulator
VREG
FG
SWGND
VCC
V3P3
3.3-V LDO
V1P8
1.8-V LDO
Charge
Pump
VCP
CPP
CPN
VCC
GND
VCP
Oscillator
Bandgap
U
V
W
SPEED
V/I
sensor
U
Pre Driver
PGND
Logic
Core
ADC
VCC
VCP
V
Pre Driver
PWM and Analog
Speed Control
DIR
PGND
VCC
Lock
VCP
Over Current
Pre Driver
Thermal
GND
W
PGND
UVLO
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8.3 Feature Description
8.3.1 Regulators
8.3.1.1 Step-Down Regulator
The DRV10983 includes a hysteretic step-down voltage regulator that can be operated as either a switching buck
regulator using an external inductor or as a linear regulator using an external resistor (see Figure 4). The best
efficiency is achieved when the step-down regulator is in buck mode. However, the DRV10983Z device (sleep
mode version) only operates with the step-down regulator in linear mode and with a Zener diode as described in
the Typical Application section. The regulator output voltage can be configured by register bit VregSel. When
VregSel = 0, the regulator output voltage is 5 V, and when VregSel = 1, the regulator output voltage is 3.3 V. It is
recommended to configure the step-down voltage regulator Vreg at 5 V for a cleaner and lower acoustic (low
harmonics) phase currents. When the regulated voltage drops by the hysteresis level, the high-side FET turns on
to increase the regulated voltage back to the target of 3.3 V or 5 V. The switching frequency of the hysteretic
regulator is not constant and changes with the load.
If the step-down regulator is configured in buck mode, see IREG_MAX in the Electrical Characteristics to determine
the amount of current provided for external load. If the step-down regulator is configured as linear mode, it is
used for the device internal circuit only.
NOTE
The DRV10983Z step-down regulator only operates in linear mode (using an external
resistor) and with a Zener diode as described in the Typical Application section. The
DRV10983Z device does not support buck mode (using an external inductor) as shown in
Figure 4.
VREG
VREG
VCC
IC
VCC
IC
SW
SW
47 µH
3.3 V/5 V
39 Ω
10 µF
Load
10 µF
3.3 V/5 V
SWGND
Step-Down Regulator With External Inductor (Buck
Mode)
SWGND
Step-Down Regulator With External Resistor (Linear
Mode)
Figure 4. Step-Down Regulator Configurations
8.3.1.2 3.3-V and 1.8-V LDO
The DRV10983 includes a 3.3-V LDO and an 1.8-V LDO. The 3.3-V LDO is powered by Vreg and 1.8-V LDO is
powered by 3.3-V LDO. The 1.8-V LDO is for internal circuit only. The 3.3-V LDO is mainly for internal circuits,
but can also drive external loads not to exceed IV3P3_MAX listed in the Electrical Characteristics. For example, it
can work as a pullup voltage for the FG, DIR, SDA, and SCL interface.
Both V1P8 and V3P3 capacitor must be connected to GND.
8.3.2 Protection Circuits
8.3.2.1 Thermal Shutdown
The DRV10983 has a built-in thermal shutdown function, which shuts down the device when junction
temperature is more than TSDN ˚C and recovers operating conditions when junction temperature falls to TSDN –
TSDN_HYS˚C.
The OverTemp status bit (address 0x10 bit 7) is set during thermal shutdown.
14
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Feature Description (continued)
8.3.2.2 Undervoltage Lockout (UVLO)
The DRV10983 has a built-in UVLO function block. The hysteresis of UVLO threshold is VUVLO-HYS. The device is
locked out when VCC is down to VUVLO_F and woke up at VUVLO_R.
8.3.2.3 Overcurrent Protection (OCP)
The overcurrent protection function acts to protect the device if the current, as measured from the FETs, exceeds
the IOC-limit threshold. It protects the device from phase-to-phase short-circuit conditions; the DRV10983 places
the output drivers into a high-impedance state and maintains this condition until the overcurrent is no longer
present. The OverCurr status bit (address 0x10 bit 5) is set.
The DRV10983 also provides acceleration current limit and lock detection current limit functions to protect the
device and motor (see Current Limit and Lock Detect and Fault Handling).
8.3.2.4 Lock
When the motor is blocked or stopped by an external force, the lock protection is triggered, and the device stops
driving the motor immediately. After the lock release time tLOCK_OFF, the DRV10983 resumes driving the motor
again. If the lock condition is still present, it enters the next lock protection cycle until the lock condition is
removed. With this lock protection, the motor and device does not get overheated or damaged due to the motor
being locked (see Lock Detect and Fault Handling).
During lock condition, the MtrLck Status bit (address 0x10, bit 4) is set. To further diagnose, check the register
FaultCode.
8.3.3 Motor Speed Control
The DRV10983 offers four methods for indirectly controlling the speed of the motor by adjusting the output
voltage amplitude. This can be accomplished by varying the supply voltage (VCC) or by controlling the Speed
Command. The Speed Command can be controlled in one of three ways. The user can set the Speed Command
on the SPEED pin by adjusting either the PWM input (SPEED pin configured for PWM mode) or the analog input
(SPEED pin configured for analog mode), or by writing the Speed Command directly through the I2C serial port
to SpdCtrl[8:0]. The Speed Command is used to determine the PWM duty cycle output (PWM_DCO) (see
Figure 5).
The Speed Command may not always be equal to the PWM_DCO because DRV10983 has implemented the
AVS function (see AVS Function), the acceleration current limit function (see Acceleration Current Limit), and the
closed loop accelerate function (see Closed Loop Accelerate) to optimize the control performance. These
functions can limit the PWM_DCO, which affects the output amplitude.
PWM In
PWM Duty
Analog
ADC
SPEED Pin
AVS,
Acceleration Current Limit
Closed Loop Accelerate
Speed
Command
2
IC
PWM_
DCO
VCC
Output
Amplitude
X
Motor
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Figure 5. Multiplexing the Speed Command to the Output Amplitude Applied to the Motor
The output voltage amplitude applied to the motor is accomplished through sine wave modulation so that the
phase-to-phase voltage is sinusoidal.
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Feature Description (continued)
When any phase is measured with respect to ground, the waveform is sinusoidally coupled with third-order
harmonics. This encoding technique permits one phase to be held at ground while the other two phases are
pulse-width modulated. Figure 6 and Figure 7 show the sinusoidal encoding technique used in the DRV10983.
PWM Output
Average Value
Figure 6. PWM Output and the Average Value
U-V
U
V-W
V
W-U
W
Sinusoidal voltage from phase to phase
Sinusoidal voltage with third order harmonics
from phase to GND
Figure 7. Representing Sinusoidal Voltages With Third-Order Harmonic Output
The output amplitude is determined by the magnitude of VCC and the PWM duty cycle output (PWM_DCO). The
PWM_DCO represents the peak duty cycle that is applied in one electrical cycle. The maximum amplitude is
reached when PWM_DCO is at 100%. The peak output amplitude is VCC. When the PWM_DCO is at 50%, the
peak amplitude is VCC / 2 (see Figure 8).
100% PWM DCO
50% PWM DC0
VCC
VCC / 2
Figure 8. Output Voltage Amplitude Adjustment
8.3.4 Sleep or Standby Condition
The DRV10983 is available in either a sleep mode or standby mode version. The DRV10983 enters either sleep
or standby to conserve energy. When the device enters either sleep or standby, the motor stops driving. The
step-down regulator is disabled in the sleep mode version to conserve more energy. The I2C interface is disabled
and any register data not stored in EEPROM will be reset. The step-down regulator remains active in the standby
mode version. The register data is maintained, and the I2C interface remains active.
Setting sleepDis = 1 prevents the device from entering into the sleep or standby condition. If the device has
already entered into sleep or standby condition, setting sleepDis = 1 will not take it out of the sleep or standby
condition. During a sleep or standby condition, the Slp_Stdby status bit (address 0x10, bit 6) will be set.
16
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Feature Description (continued)
For different speed command modes, Table 1 shows the timing and command to enter the sleep or standby
condition.
Table 1. Conditions to Enter or Exit Sleep or Standby Condition
SPEED COMMAND
MODE
ENTER STANDBY
CONDITION
ENTER SLEEP
CONDITION
EXIT FROM STANDBY
CONDITION
EXIT FROM SLEEP
CONDITION
Analog
SPEED pin voltage < VEN_SB
for tEN_SB_ANA
SPEED pin voltage <
VEN_SL for tEN_SL_ANA
SPEED pin voltage > VEX_SB
for tEX_ SB_ANA
SPEED pin voltage > VEX_SL
for tEX_ SL_ANA
PWM
SPEED pin low (V < VDIG_IL)
for tEN_SB_PWM
SPEED pin low (V <
VDIG_IL) for
tEN_SL_PWM
SPEED pin high (V >
VDIG_IH) for tEX_SB_PWM
SPEED pin high (V >
VDIG_IH) for tEX_SL_PWM
I2C
SpdCtrl[8:0] is programmed
as 0 for tEN_SB_PWM
SpdCtrl[8:0] is
programmed as 0 for
tEN_SL_PWM
SpdCtrl[8:0] is programmed
as non-zero for tEX_SB_PWM
SPEED pin high (V >
VDIG_IH) for tEX_SL_PWM(PWM
mode) or SPEED pin voltage
> VEX_SL for tEX_ SL_ANA
(Analog mode)
Speed pin in DRV10983 (Standby version) and DRV10983Z (sleep version) should be in known state (pulled
high or low) when the speed is controlled via I2C.
Note that using the analog speed command, a higher voltage is required to exit from the sleep condition than the
standby condition. The I2C speed command cannot take the device out of the sleep condition because I2C
communication is disabled during the sleep condition.
8.3.5 Non-Volatile Memory
The DRV10983 has 96-bits of EEPROM data, which are used to program the motor parameters as described in
the I2C Serial Interface.
The procedure for programming the EEPROM is as follows. TI recommends to perform the EEPROM
programming without the motor spinning, power cycle after the EEPROM write, and read back the EEPROM to
verify the programming is successful.
1. Set SIdata = 1.
2. Write the desired motor parameters into the corresponding registers (address 0x20:0x2B) (see I2C Serial
Interface).
3. Write 1011 0110 (0xB6) to enProgKey in the DevCtrl register.
4. Ensure that VCC is at or above 22 V.
5. Write eeWrite = 1 in EECtrl register to start the EEPROM programming.
The programming time is about 24 ms, and eeWrite bit is reset to 0 when programming is done.
8.4 Device Functional Modes
This section includes the logic required to be able to reliably start and drive the motor. It describes the processes
used in the logic core and provides the information needed to effectively configure the parameters to work over a
wide range of applications.
8.4.1 Motor Parameters
For the motor parameter measurement, see the DRV10983 and DRV10975 Tuning Guide.
The motor phase resistance and the BEMF constant (Kt) are two important parameters used to characterize a
BLDC motor. The DRV10983 requires these parameters to be configured in the register. The motor phase
resistance is programmed by writing the values for Rm[6:0] in the MotorParam1 register. The BEMF constant is
programmed by writing the values for Kt[6:0] in the MotorParam2 register.
8.4.1.1 Motor Phase Resistance
For a wye-connected motor, the motor phase resistance refers to the resistance from the phase output to the
center tap, RPH_CT (see Figure 9).
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Device Functional Modes (continued)
Phase U
RPH_CT
RPH_CT
RPH_CT
Center
Tap
Phase V
Phase W
Figure 9. Wye-Connected Motor Phase Resistance
For a delta-connected motor, the motor phase resistance refers to the equivalent phase to center tap in the wye
configuration, which is represented as RY. RPH_CT = RY (see Figure 10).
For both the delta-connected motor and the wye-connected motor, calculating the equivalent RPH_CT is easy by
measuring the resistance between two phase terminals (RPH_PH), and then dividing this value by two as shown
inEquation 1.
RPH_CT = ½RPH_PH
(1)
Phase U
RY
RPH_PH
RY
Phase V
RPH_PH
Center
Tap
RPH_PH
RY
Phase W
Figure 10. Delta-Connected Motor and the Equivalent Wye Connections
The motor phase resistance (RPH_CT) must be converted to a 7-bit digital register value Rm[6:0] to program the
motor phase resistance value. The digital register value can be determined as follows:
1. Convert the motor phase resistance (RPH_CT) to a digital value where the LSB is weighted to represent 9.67
mΩ: Rmdig = RPH_CT / 0.00967.
2. Encode the digital value such that Rmdig = Rm[3:0] 2.2V, order of FG and PWM doesn’t matter. Ensure FG 5 W, Leakage Current
5 W, Leakage Current
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