DRV1100U/2K5

® DRV1100 DR OPVA1100 658 DRV 110 0 HIGH POWER DIFFERENTIAL DRIVER AMPLIFIER FEATURES DESCRIPTION ● ● ● ● The DRV1100 is fixed gain differential line driver designed for very low harmonic distortion at the high powers required of xDSL line interface standards. Operating on a single +5V supply, it can deliver 230mA peak output current and 9.5Vp-p differential output voltage swing. This high output power on a single +5V supply makes the DRV1100 an excellent choice for the xDSL applications that require up to 17dBm power onto the line with high crest factors. The DRV1100 is available in both 8-pin plastic DIP and SO-8 packages. HIGH OUTPUT CURRENT: 230mA SINGLE SUPPLY OPERATION: 5V 5MHz BANDWIDTH: 6Vp-p into 15Ω VERY LOW THD AT HIGH POWER: –72dBc at 6Vp-p, 100kHz, 100Ω ● LOW QUIESCENT CURRENT: 11mA ● FIXED DIFFERENTIAL GAIN: 3V/V APPLICATIONS ● ● ● ● ● ● xDSL TWISTED PAIR LINE DRIVER COMMUNICATIONS LINE DRIVER TRANSFORMER DRIVER SOLENOID DRIVER HIGH POWER AUDIO DRIVER CRT YOKE DRIVER +5V DRV1100 Out+ 4Ω In+ G = 3V/V In– 4Ω Out– Patent Pending Protection 135Ω 1:4 Transformer GND International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © SBWS004 1996 Burr-Brown Corporation PDS-1354 Printed in U.S.A. December, 1996 SPECIFICATIONS At VDD = +5.0V, VCM = VDD/2, TA = 25°C, unless otherwise specified. DRV1100P, U PARAMETER CONDITIONS AC PERFORMANCE –3dB Bandwidth Differential Slew Rate Step Response Delay(1) Settling Time to 1%, Step Input Settling Time to 1%, Step Input Settling Time to 0.1%, Step Input Settling Time to 0.1%, Step Input THD, Total Harmonic Distortion(2) f = 10kHz f = 10kHz f = 100kHz f = 100kHz Input Voltage Noise Input Current Noise INPUT CHARACTERISTICS Differential Input Resistance Differential Input Capacitance Common-Mode Input Resistance Common-Mode Input Capacitance Input Offset Voltage Input Bias Current Common-Mode Rejection Ratio Power Supply Rejection Ratio Input Common-Mode Voltage Range(3) OUTPUT CHARACTERISTICS Differential Output Offset, RTO Differential Output Offset Drift, RTO Differential Output Resistance Peak Current (Continuous) Differential Output Voltage Swing Output Voltage Swing, Each Side Gain Gain Error POWER SUPPLY Operating Voltage Range Quiescent Current MIN RL = 15Ω, VO = 1Vp-p RL ≥ 100Ω, VO = 1Vp-p RL = 15Ω, VO = 6Vp-p RL ≥ 100Ω, VO = 6Vp-p RL = 100Ω, VO = 6Vp-p VO = 1Vp-p VO = 1Vp-p, RL = 100Ω VO = 6Vp-p, RL = 100Ω VO = 1Vp-p, RL = 100Ω VO = 6Vp-p, RL = 100Ω RL = 100Ω, VO = 6Vp-p RL = 15Ω, VO = 6Vp-p RL = 100Ω, VO = 6Vp-p RL = 15Ω, VO = 6Vp-p f = 100kHz f = 100kHz Input Referred Input Referred –66 60 0.5 –40°C to +85°C RL = 15Ω RL = 1kΩ RL = 100Ω RL = 15Ω RL = 1kΩ Fixed Gain, Differential 200 8.5 6.0 0.125 MAX +4.5 UNITS 8 11 5 6 80 25 0.25 0.3 0.8 1.1 MHz MHz MHz MHz V/µs ns µs µs µs µs –85 –76 –72 –65 30 0.5 dBc dBc dBc dBc nV/√Hz fA/√Hz 1011 1 1011 6 5 1 62 76 Ω pF Ω pF mV pA dB dB V VDD –0.5 10 30 0.16 230 9.6 9.5 6.6 25 ±0.25 mV µV/°C Ω mA Vp-p Vp-p Vp-p V V/V dB +5.5 +16 V mA +85 °C 4.875 3 VDD = 5.0V TEMPERATURE RANGE Thermal Resistance, θJA DRV1100P 8-Pin DIP DRV1100U 8-Pin SO-8 TYP +5.0 +11 –40 100 125 °C/W °C/W NOTES: (1) Time from 50% point of input step to 50% point of output step. (2) Measurement Bandwidth = 500kHz. (3) Output common-mode voltage follows input common-mode voltage; therefore, if input VCM = VDD/2, then output VCM = VDD/2. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® DRV1100 2 PIN CONFIGURATIONS ABSOLUTE MAXIMUM RATINGS Analog Inputs: Current .............................................. ±100mA, Momentary ±10mA, Continuous Voltage ....................................... GND –0.3V to VDD +0.2V Analog Outputs Short Circuit to Ground (+25°C) ..................... Momentary Analog Outputs Short Circuit to VDD (+25°C) ........................... Momentary VDD to GND .............................................................................. –0.3V to 6V Junction Temperature ................................................................... +150°C Storage Temperature Range .......................................... –40°C to +125°C Lead Temperature (soldering, 3s) ................................................. +260°C Power Dissipation .............................. (See Thermal/Analysis Discussion) Top View GND 1 8 Out– In+ 2 7 VDD (+5V) In– 3 6 VDD (+5V) GND 4 5 Out+ PACKAGE/ORDERING INFORMATION +5V 6 In+ In– 7 2 5 3 8 4 PRODUCT PACKAGE PACKAGE DRAWING NUMBER(1) DRV1100P DRV1100U 8-Pin PDIP 8-Lead SO-8 006 182 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. Out+ Out– ELECTROSTATIC DISCHARGE SENSITIVITY 1 GND This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ® 3 DRV1100 TYPICAL PERFORMANCE CURVES At VDD = +5.0V, VCM = VDD/2, TA = 25°C, unless otherwise specified. LARGE SIGNAL FREQUENCY RESPONSE SMALL SIGNAL FREQUENCY RESPONSE RL = 1kΩ 9.5 8.5 RL = 100Ω 7.5 6.5 Differential Gain (dB) Differential Gain (dB) 8.5 RL = 15Ω 5.5 4.5 3.5 7.5 VO = 1Vp-p 10K 5.5 1M RL = 15Ω 4.5 3.5 1.5 100K RL = 100Ω 6.5 2.5 2.5 1.5 RL = 1kΩ 9.5 VO = 6Vp-p 10K 10M Frequency (Hz) SMALL SIGNAL 2ND HARMONIC DISTORTION 10M –40 VO = 1Vp-p VO = 1Vp-p –45 –45 RL = 15Ω –50 3rd Harmonic (dB) 2nd Harmonic (dB) 1M SMALL SIGNAL 3RD HARMONIC DISTORTION –40 –55 –60 –65 –70 RL = 15Ω –50 –55 RL = 100Ω –60 –65 –70 RL = 100Ω –75 –75 –80 100K 1M –80 100K 10M 1M Frequency (Hz) 10M Frequency (Hz) LARGE SIGNAL 2ND HARMONIC DISTORTION LARGE SIGNAL 3RD HARMONIC DISTORTION –40 –40 VO = 6Vp-p VO = 6Vp-p –45 –45 RL = 15Ω RL = 15Ω –50 3rd Harmonic (dB) 2nd Harmonic (dB) 100K Frequency (Hz) –55 –60 RL = 100Ω –65 –50 –60 –65 –70 –70 –75 –75 –80 100K 1M –80 100K 10M Frequency (Hz) 1M Frequency (Hz) ® DRV1100 RL = 100Ω –55 4 10M TYPICAL PERFORMANCE CURVES (CONT) At VDD = +5.0V, VCM = VDD/2, TA = 25°C, unless otherwise specified. 100kHz THD –40 –50 –50 RL = 15Ω THD (dBc) THD (dBc) 10kHz THD –40 –60 –70 RL = 15Ω –60 RL = 100Ω –70 RL = 100Ω –80 –80 RL = 1kΩ RL = 1kΩ –90 –90 1 2 3 4 5 7 8 9 10 1 2 6 SMALL SIGNAL STEP RESPONSE LARGE SIGNAL STEP RESPONSE Output RL = 100Ω 0 –0.5V Input 0 –3V Time (50ns/div) Time (50ns/div) LARGE SIGNAL OPERATING RANGE 10 MAXIMUM VO vs SUPPLY VOLTAGE 12 8 Differential Output Voltage (Vp-p) RL = 1kΩ 1% THD RL = 100Ω 7 6 RL = 15Ω 5 7 8 9 10 RL = 100Ω +3V Differential Voltage (750mV/div) Input Differential Output Swing (Vp-p) 5 4 Differential Output Voltage (Vp-p) +0.5V 9 3 Differential Output Voltage (Vp-p) Output Differential Voltage (125mV/div) 6 4 3 2 1 0 RL = 1kΩ 10 RL = 100Ω 8 RL = 15Ω 6 4 2 0 1K 10K 100K 1M 10M 4.5 Frequency (Hz) 4.75 5 5.25 5.5 Supply Voltage (VDD) ® 5 DRV1100 TYPICAL PERFORMANCE CURVES (CONT) At VDD = +5.0V, VCM = VDD/2, TA = 25°C, unless otherwise specified. DIFFERENTIAL OUTPUT IMPEDANCE DIFFERENTIAL INPUT VOLTAGE NOISE Impedance (Ω) 10 100 1 0.1 10 100 1K 10K 100K 1k 1M 10K 100K 1M 10M Frequency Frequency (Hz) QUIESCENT CURRENT vs TEMPERATURE POWER SUPPLY REJECTION vs FREQUENCY 13 80 12 70 VDD = +5V 11 60 10 PSRR (dB) Quiescent Current (mA) Voltage Noise (nV/√Hz) 1000 9 8 7 6 50 40 30 20 5 10 4 0 3 –40 –20 0 20 40 60 80 100 1K Temperature (°C) 100K Frequency (Hz) ® DRV1100 10K 6 1M 10M APPLICATIONS INFORMATION INTERNAL BLOCK DIAGRAM The DRV1100 is a true differential input to differential output fixed gain amplifier. Operating on a single +5V power supply, it provides an internally fixed differential gain of +3 and a common-mode gain of +1 from the input to output. Fabricated on an advanced CMOS process, it offers very high input impedance along with a low impedance 230mA output drive. Figure 1 shows a simplified internal block diagram. Out+ VDD/2 VP Out– VP VDD/2 Load VP 0V VP Out+ FIGURE 2. DRV1100 Single Ended and Differential Output Waveforms. In+ Buffer Preamp (Vp-p). Squaring 1/2 of the Vp-p and dividing by the load will give the peak power. For example, the Typical Performance Curves show that on +5V supply the DRV1100 will deliver 6.8Vp-p into 15Ω at 500kHz. The peak load power under this condition is (6.8Vp-p/2)2/15Ω = 770mW. Out– In– FIGURE 1. Simplified DRV1100 Internal Block Diagram. SUPPLY VOLTAGE The DRV1100 is designed for operation on a single +5V supply. For loads > 200Ω, each output will swing rail to rail. This gives a peak-to-peak differential output swing that is approximately = 2 • VDD. For best distortion performance, the power supply should be decoupled to a good ground plane immediately adjacent to the package with a 0.1µF capacitor. In addition, a larger electolytic supply decoupling capacitor (6.8µF) should be near the package but can be shared among multiple devices. To achieve the maximum dynamic range, operate the DRV1100 with the inputs centered at VDD / 2. This will place the output differential swing centered at VDD /2 for maximum swing and lowest distortion. Purely differential input signals will produce a purely differential output signal. A single ended input signal, applied to one input of the DRV1100, with the other input at a fixed voltage, will produce both a differential and common-mode output signal. This is an acceptable mode of operation when the DRV1100 is driving an element with good common-mode rejection (such as a transformer). DIGITAL SUBSCRIBER LINE APPLICATIONS The DRV1100 is particularly suited to the high power, low distortion, requirements of a twisted pair driver in digital communications applications. These include HDSL (High bit rate Digital Subscriber Lines), ADSL (Asymmetrical Digital Subscriber Lines), and RADSL (Rate adaptive ADSL). Figure 3 shows a typical transformer coupled xDSL line driver configuration. In general, the DRV1100 is usable for output power requirements up to 17dBm with a crest factor up to 6 (crest factor is the ratio of peak to rms voltage). DIFFERENTIAL OUTPUT VOLTAGE AND POWER Applying the balanced differential output voltage of the DRV1100 to a load between the outputs will produce a peakto-peak voltage swing that is twice the swing of each individual output. This is illustrated in Figure 2 where the common-mode voltage is VDD / 2. For a load connected between the outputs, the only voltage that matters is the differential voltage between the two outputs—the commonmode voltage does not produce any load current in this case. To calculate the required amplifier power for an xDSL application— The peak power that the DRV1100 can deliver into a differential load is VP2/ RL. The Typical Performance Curves show the maximum Vp-p versus load and frequency. The peak voltage (Vp) equals 1/2 of the peak-to-peak voltage • Determine the average power required onto the line in the particular application. The DRV1100 must be able to deliver twice this power (+3dB) to account for the power ® 7 DRV1100 +5V Protection Circuits DRV1100 Out+ 4Ω In+ Line Impedance 4Ω In– 135Ω Out– 1:4 Transformer GND FIGURE 3. Typical Digital Subscriber Line Application. loss through the series impedance matching resistors shown in Figure 3. Twice the required line power must be delivered by the DRV1100 through the frequency band of interest with the distortion required by the system. ground or to the supply without damage. The outputs are not, however, designed for a continuous short to ground or the supply. • Calculate the RMS voltage required at the output of the DRV1100 with this 2X line power requirement. Vrms = (2 • PLINE • RL)1/2, where RL is the total load impedance that the DRV1100 must drive. Multiply this Vrms by 2 • crest factor to get the total required differential peak-topeak voltage at the output. The DRV1100 must be able to drive the peak-to-peak differential voltage into the load impedance. POWER DISSIPATION AND THERMAL ANALYSIS The total internal power dissipation of the DRV1100 is the sum of a quiescent term and the power dissipated internally to deliver the load power. The Typical Performance Curves show the quiescent current over temperature. At +5V supply, the typical no load supply current of 11mA will dissipate 55mW quiescent power. The rms power dissipated in the output circuit to deliver a Vrms to a load RL is: Where possible, the transformer turns ratio may be adjusted to keep within the DRV1100 output voltage and current constraints for a given RLINE and desired power onto the line. Prms = (VDD – Vrms) • (Vrms/RL) The internal power dissipation will reach a maximum when Vrms is equal to VDD /2. For a sinusoidal output, this corresponds to an output Vp-p = 1.41 • VDD. Using the example of Figure 3, assume the average power desired on a 135Ω line is 14dBm (HDSL). Twice this power (17dBm) is required into the matching resistors on the primary side of the transformer. This 135Ω load is reflected through the 1:4 transformer as a (135/(42)) = 8.4Ω load. The two series 4.1Ω resistors, along with the 0.2Ω differential output impedance of the DRV1100, will provide impedance matching into this 8.4Ω load. The DRV1100 will see approximately a 16.5Ω load under these conditions. The required 17dBm (50mW) into this load will need an output Vrms = (50mW • 16.5)1/2 = 0.91Vrms. Assuming a crest factor of 3, the differential peak-to-peak output voltage = 6 • 0.91 = 5.45Vp-p. The Typical Performance Curves show that, at 100kHz, the DRV1100 can deliver this voltage swing with less than –62dB THD. As an example, compute the power and junction temperature under a worst case condition with VDD = +5V and Vrms = 2.5V into a 16Ω differential load (peak output current for a sinusoid would be 222mA). The total internal power dissipation would be: (5V • 11mA) + (5V – 2.5V) • (2.5V/16Ω) = 446mW To compute the internal junctions temperature, this power is multiplied by the junction to ambient thermal impedance (to get the temperature rise above ambient) then added to the ambient temperature. Using the specified maximum ambient temperature of +85°C, the junction temperature for the DRV1100 in an SO-8 package under these worst case conditions will be: OUTPUT PROTECTION Figure 3 also shows overvoltage and short circuit protection elements that are commonly included in xDSL applications. Overvoltage suppressors include diodes or MOV’s. The outputs of the DRV1100 can be momentarily shorted to TJ = 85°C + 0.446W • 125°C/W = 141°C ® DRV1100 8 Often, the RB resistors will be set to a relatively high value (> 10kΩ) to minimize quiescent current in the reference path. If a lower input impedance is desired, additional terminating resistors may be added to the input side of the blocking capacitors (CB). INTERNAL TEMPERATURE RISE OF DRV1100 IN SOIC 90 80 Limit at 85°C Ambient Temperature Rise 70 The circuit of Figure 5 may also be operated with only a single ended input. In that case, the reference voltage on the other input should be decoupled to ground with a 0.1µF capacitor. In this connection, the input will generate unbalanced outputs. The differential output voltage will still be 3 times the input peak-to-peak voltage, but since there is now a common-mode voltage input, there will be a common mode voltage output. The output common-mode voltage will be equal to the input signal’s peak-to-peak swing. This common-mode component will reduce the available differential output voltage swing. However, if the output load has good common-mode rejection, such as a transformer, this is an acceptable way of using the DRV1100 with a single ended source. 60 50 RL = 15Ω 40 30 20 RL = 100Ω 10 0 0 0.5 1 2 1.5 2.5 3 3.5 Load Voltage (rms) FIGURE 4. Junction Temperature Rise From Ambient for the DRV1100U. The internal junction temperature should, in all cases, be limited to < 150°C. For a maximum ambient temperature of +85°C, this limits the internal temperature rise to less than 65°C. Figure 4 shows the temperature rise from ambient to junction for loads of 15Ω and 100Ω. This shows that the internal junction temperature will never exceed the rated maximum for a 15Ω load. Figure 6 shows a means of translating a ground centered single ended input to a purely differential signal for application to DRV1100 input. This circuit uses a wideband dual op amp in cross coupled feedback configuration. The outputs of this circuit may then be fed into the inputs of Figure 5. The total gain of Figure 6 is 2 • (RF / RG ). The circuit will act to hold all 4 op amp inputs equal to the + input of the lower op amp. Since this is at ground, the midpoint for the input signal (where the two outputs will be equal) is also at 0V. INPUT INTERFACE CIRCUITS Best performance with the DRV1100 is achieved with a differential input centered at VDD /2. Signals that do not require DC coupling may be connected as shown in Figure 5 through blocking caps to a midpoint reference developed through resistor dividers from the supply voltage. The value for the RB resistors determine four performance requirements. RF RG VI • They bias the inputs at the supply midpoint. • They provide a DC bias current path for the input to the DRV1100 1/2 OPA2650 • They set the AC input impedance for the source signals to RB/2. 500Ω • They set the low frequency cutoff frequency along with CB. 500Ω + RF V RG I – RF V RG I 500Ω 500Ω +VDD 1/2 OPA2650 RB CB V1 RB RB DRV1100 RL FIGURE 6. Single Ended to Differential Conversion. V2 CB RB FIGURE 5. AC Coupled Differential Input Interface. ® 9 DRV1100 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) DRV1100U NRND SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR DRV 1100U (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of