DRV8300DRGE-EVM

www.ti.com User’s Guide DRV8300xxx-EVM User’s Guide ABSTRACT This document is provided with the DRV8300Dxxx-EVM customer evaluation module (EVM) as a supplement to the DRV8300 Datasheet. This user's guide details the hardware implementation of the EVM. Figure 1-1. DRV8300Dxxx-EVM SLVUBV6 – APRIL 2020 Submit Document Feedback DRV8300xxx-EVM User’s Guide Copyright © 2020 Texas Instruments Incorporated 1 www.ti.com CAUTION The DRV8300Dxxx-EVMs are designed to be evaluated only with the LAUNCHXL-F280049C MCU PCB which must be ordered separately. The 3.3VDC power to the LAUNCHXL-F280049C is provided from the DRV8300Dxxx-EVM. To ensure high voltage isolation between the DRV8300Dxxx-EVM and the LAUNCHXL-F280049C board, the three isolation jumpers must be removed as shown below. Figure 1-2. JP1/JP2/JP3 Removed WARNING Although the MCU PCB provides isolation of up to 3000 VRMS to the USB, the DRV8300Dxxx-EVM itself is considered an electrically live EVM and is not intended nor designed for isolation voltage testing. Voltages exceeding the standard EVM ratings as specified on the data sheet may cause personal injury, electrical shock hazard, damage the EVM, or a combination. Additionally, do not leave power connections to the EVM connected while not in operation. WARNING Hot surface. Contact may cause burns. Do not touch. 2 DRV8300xxx-EVM User’s Guide SLVUBV6 – APRIL 2020 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Table of Contents www.ti.com WARNING High Voltage. Electric shock is possible when connecting board to live wire. The board should be handled with care by a professional. For safety, use of isolated test equipment with overvoltage and overcurrent protection is highly recommended. Table of Contents 1 Introduction.............................................................................................................................................................................4 1.1 Overview............................................................................................................................................................................ 4 1.2 Purpose and Scope............................................................................................................................................................4 2 Hardware and Software Overview.........................................................................................................................................5 2.1 Hardware Connections Overview – DRV8300Dxxx-EVM + LAUNCHXL-F280049C.........................................................5 2.2 Faults, Indicators, and Jumper Settings.............................................................................................................................8 2.3 EVM Hardware Quick-Start................................................................................................................................................9 2.4 DRV8300 EVM GUI Software.......................................................................................................................................... 10 3 References............................................................................................................................................................................ 12 List of Figures Figure 1-1. DRV8300Dxxx-EVM.................................................................................................................................................. 1 Figure 1-2. JP1/JP2/JP3 Removed............................................................................................................................................. 2 Figure 1-1. Block Diagram........................................................................................................................................................... 4 Figure 2-1. EVM Board Overview................................................................................................................................................ 5 Figure 2-2. DRV8300Dxxx-EVM Mating to LAUNCHXL-F280049C............................................................................................ 6 Figure 2-3. PVDD Input (J4)........................................................................................................................................................ 6 Figure 2-4. Hall Sensor Input and Power Connections (J7)........................................................................................................ 7 Figure 2-5. Motor Phase Connector (J5)..................................................................................................................................... 8 Figure 2-6. Status LEDs, AREF Select, and GVDD Select......................................................................................................... 9 Figure 2-7. DRV8300Dxxx-EVM GUI Software......................................................................................................................... 10 List of Tables SLVUBV6 – APRIL 2020 Submit Document Feedback DRV8300xxx-EVM User’s Guide Copyright © 2020 Texas Instruments Incorporated 3 www.ti.com Introduction 1 Introduction 1.1 Overview The DRV8300 is a gate driver IC for three-phase motor drive applications. It provides three high-accuracy trimmed and temperature compensated half-bridge drivers, each capable of driving high-side and low-side Ntype MOSFETs. Along with the hardware of the DRV8300, the TMS320F280049C microcontroller-based board has reference software that sends necessary signals to the DRV8300 to spin a 3-phase Brushless-DC motor. GuiComposer software allows the user to program settings, enable the motor to spin, and monitor the system from fault conditions. PVDD GVDD DBx GVDD MCU INHA INHB INHC BSTA, BSTB, BSTC GHA, GHB, GHC SHA, SHB, SHC DRV8300D INLA INLB INLC GLA, GLB. GLC GND Repeated for 3 phases Figure 1-1. Block Diagram 1.2 Purpose and Scope This document is designed to be used as a startup guide to the DRV8300 EVM and LAUNCHXL-F280049C solution. This document is intended for the engineers involved in the design, implementation, and validation of DRV8300 + TMS320F280049C reference software. The scope of this document is to provide the user with a guide to evaluate the DRV8300 device with a TMS320F280049C isolated board. This document covers the hardware connections required between boards and external motor/supplies. When the hardware connections are complete, the user is required to download the necessary tools and software to spin a motor. The reference software is composed of GuiComposer software with sensored trapazoidal algorithm for BLDC motor control. 4 DRV8300xxx-EVM User’s Guide SLVUBV6 – APRIL 2020 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Hardware and Software Overview www.ti.com 2 Hardware and Software Overview 2.1 Hardware Connections Overview – DRV8300Dxxx-EVM + LAUNCHXL-F280049C The following section describes the EVM hardware and connections to the external supply, hall sensors, PC via USB, and motor. Figure 2-1. EVM Board Overview SLVUBV6 – APRIL 2020 Submit Document Feedback DRV8300xxx-EVM User’s Guide Copyright © 2020 Texas Instruments Incorporated 5 www.ti.com Hardware and Software Overview Figure 2-2. DRV8300Dxxx-EVM Mating to LAUNCHXL-F280049C The DRV8300Dxxx-EVM must plug into the lower LAUNCHXL-F280049C Launchpad headers as shown below. Figure 2-3. PVDD Input (J4) 6 DRV8300xxx-EVM User’s Guide SLVUBV6 – APRIL 2020 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Hardware and Software Overview www.ti.com WARNING To minimize the risk of potential shock hazard and personal injury, remove all power connections and interfaces to the DRV8300Dxxx-EVM when not in use. The DRV8300Dxxx-EVM is designed for an input supply from 6 VDC to 100 VDC and up to 25-A continuous drive current (software limited). The input connects to J4 with the noted polarity. PVDD_TP connects to the same node but must not be used for high current input. PVDD input is fused with a 30 A fuse and the input connector is rated for 32 A. Figure 2-4. Hall Sensor Input and Power Connections (J7) Hall sensors are connected to J7 including hall power and GND. The 3.3 VDC supply to the Hall sensors is supplied from the 3.3 V LDO on the EVM. External hall power can be input through the HALL_EXT test point if a different supply or voltage level is desired. To use the included 3.3 V LDO to power the halls, connect J3 on the right side to pins 1:2 as shown. To use HALL_EXT, connect J3 on the left side to pins 2:3. To insert or remove wires/terminals on J7, use a flat blade screwdriver to push down the respective tab on top of the J7 connector. SLVUBV6 – APRIL 2020 Submit Document Feedback DRV8300xxx-EVM User’s Guide Copyright © 2020 Texas Instruments Incorporated 7 www.ti.com Hardware and Software Overview Figure 2-5. Motor Phase Connector (J5) WARNING Motor Phase connections must match the hall sensor connection sequence. For example, MOTA must match HALL_A, MOTB must match HALL_B, MOTC must match HALL_C. The phases must also be in sequential order; A, then B, then C. If the motor phases do not match the hall sensors or the connections are made out of order, the motor will not spin smoothly and current consumption will increase. The three phase inputs of the motor connect to MOTA/MOTB/MOTC through connector J5. 2.2 Faults, Indicators, and Jumper Settings The DRV8300 implements Bootstrap Undervoltage, GVDD Undervoltage, and Thermal Shutdown in case of overtemperature. See the DRV8300 Datasheet for more information on DRV8300 fault support. The DRV8300Dxxx-EVM implements Overvoltage and Undervoltage on the PVDD and GVDD supplies as well as Gross Over-Current protection. Status LEDs for the 3.3 V, PVDD, GVDD, and FAULT are included and shown below. 8 DRV8300xxx-EVM User’s Guide SLVUBV6 – APRIL 2020 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Hardware and Software Overview www.ti.com Figure 2-6. Status LEDs, AREF Select, and GVDD Select The FAULT LED will light up if the EVM senses a fault due to the following conditions: FAULT Lower Limit Upper Limit Action Taken PVDD 6V 100 V PWM Input forced to 0%. GVDD 6V 20 V PWM Input forced to 0%. Over-Current -25 A 25 A PWM Input forced to 0%. The Faults can be reset in the GUI software using the CLEAR FAULTS button. More details on the GUI can be found in the Software section below. The AREF Select jumper selects the offset for the Current Shunt Amplifiers on the EVM. The default position is to the left on pins 1:2 which configures the CSA for Bi-directional mode (offset 1.65 V) allowing the CSA input to sense positive or negative current. Placing the jumper to the right on pins 2:3 configures the CSA for Unidirectional mode (offset 0 V) which allows only positive currents to be measured. This does increase the measurement range of the CSA. The GVDD Select jumper allows the user to use the built-in 12 V Buck Regulator to generate GVDD or input it externally through GVDD_EXT. The default position is to the left on pins 1:2 which configures the EVM for internal mode (GVDD from the buck regulator). Placing the jumper to the right on pins 2:3 configures the board for external GVDD mode (GVDD supplied into GVDD_EXT test point). 2.3 EVM Hardware Quick-Start This section describes the steps to prepare the DRV8300Dxxx-EVM for first motor spin-up. This section assumes the default jumper positions mentioned above are used. 1. Ensure that the isolation jumpers JP1/JP2/JP3 on the LAUNCHXL-F280049C have been removed. 2. Plug the DRV8300Dxxx-EVM onto the lower position of the LAUNCHXL-F280049C board. 3. Connect motor phase connections to their respective MOTA/MOTB/MOTC inputs on J5, making sure to match A, B, and C. SLVUBV6 – APRIL 2020 Submit Document Feedback DRV8300xxx-EVM User’s Guide Copyright © 2020 Texas Instruments Incorporated 9 Hardware and Software Overview www.ti.com 4. Connect the Hall sensor connections, Hall power, and ground to J7. Make sure that Hall A, B, and C are in the correct order. 5. Connect the provided micro-USB cable to the LAUNCHXL-F280049C. 6. Connect PVDD and GND to connector J4. A low current limit of 300 mA on the PVDD supply is recommended for first power-up to ensure the EVM is connected correctly. If there is no issue upon powerup, the current limit can be raised to allow for current based on your motor specifications. 7. Start the GUI per the instructions below in the software section. 2.4 DRV8300 EVM GUI Software This section details the features of the EVM GUI Software. The GUI is written in GUI Composer and is available on the development software gallery at dev.ti.com/gallery. Once logged into the TI system, if you cannot find the GUI you may need to request access from your TI representative. Figure 2-7. DRV8300Dxxx-EVM GUI Software The GUI will Connect to and program the C2000 MCU on the LAUNCHXL-F280049C board when launched assuming the board is connected/powered. The GUI includes the following indicators and controls: Item # Item Name Item Description 1 EVM Selection Select the EVM connected to the PC, either DRGE or DIPW. 10 DRV8300xxx-EVM User’s Guide SLVUBV6 – APRIL 2020 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Hardware and Software Overview www.ti.com Item # Item Name Item Description 2 Output Enable This will enable or disable the Duty Cycle slider. When disabled, the Duty Cycle is automatically set to 0%. 3 Duty Cycle % This controls the Duty Cycle % input sent to the DRV8300. Note that the PWM frequency is fixed at 20 kHz. 4 Acceleration Delay Number of processing cycles to skip in each update of the PWM and GUI controls. Increase this for slower PWM update rate or decrease for faster PWM update rate. 5 CSA Bi-Directional Enable Enabled by default, this controls the software offset for the CSA. This should match the selection of jumper J8. 6 Over-Current Limit Software Over-Current limit for gross overcurrent detection and Fault. 7 Current Sense Resistor Current sense resistor value populated on board, default is 0.003 ohms. 8 CSA Gain CSA gain resistor setting, hardware resistor, default 10 V/V. 9 Fault Status LED Indicator for overall Fault status. Logical OR of all faults. 10 CLEAR FAULTS Click this button to clear the Fault warning. If the Fault persists, this control will not disable or clear the Faults. 11 PVDD Fault LED Indicates a PVDD fault has occured, either overvoltage or undervoltage. 12 GVDD Fault LED Indicates a GVDD fault has occured, either overvoltage or undervoltage. 13 Over-Current Fault LED Indicates a gross Over-Current fault has occured. Limit is set by control (5). 14 PVDD Voltage Indicator PVDD voltage sensed by the MCU. 15 GVDD Voltage Indicator GVDD voltage sensed by the MCU. 16 Board Temperature Temperature sensor on the bottom of the PCB located under the FETs. 17 Connection Status and Control Displays if the GUI is connected to the hardware. Once the hardware is connected, the FAULT Status and Voltage Monitors should match the EVM. If these do not match then please remove EVM power and recheck the setup. To spin the motor: 1. Use the EVM Selection drop down to select which EVM is connected to the PC, either DIPW or DRGE. 2. Enable the PWM using the Output Enable toggle switch. 3. Use the Duty Cycle slider or input field to change the PWM Input Duty Cycle. 4. The motor should now be spinning! SLVUBV6 – APRIL 2020 Submit Document Feedback DRV8300xxx-EVM User’s Guide Copyright © 2020 Texas Instruments Incorporated 11 References www.ti.com 3 References See these documents for additional reference: • • • 12 Texas Instruments, DRV8300 Datasheet Texas Instruments, TMS320F280049C Product Page Texas Instruments, LAUNCHXL-F280049C Product Page DRV8300xxx-EVM User’s Guide SLVUBV6 – APRIL 2020 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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