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DRV8329AEVM

DRV8329AEVM

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

  • 描述:

    DRV8329A 栅极驱动器 电源管理 评估板

  • 数据手册
  • 价格&库存
DRV8329AEVM 数据手册
www.ti.com Table of Contents User’s Guide DRV8329AEVM User’s Guide ABSTRACT This document is provided with the DRV8329 customer evaluation module (EVM) as a supplement to the DRV8329 data sheet (DRV8329 4.5-V to 60-V 1000/2000mA 3-phase gate driver). This User's Guide details the implementation of the EVM and shows how to set up and power the board. Note The DRV8329AEVM comes automatically populated with and configured for the DRV8329A. It is also compatible for the DRV8329B variants (see Section 4.4.1), but the user will need to replace the DRV8329A with the DRV8329B for compatibility. Table of Contents 1 Cautions and Warnings..........................................................................................................................................................3 2 Introduction.............................................................................................................................................................................4 3 Quick Start Guide....................................................................................................................................................................6 4 Hardware and Software Overview.........................................................................................................................................7 4.1 Hardware Connections Overview – DRV8329AEVM + LAUNCHXL-F280049C................................................................7 4.2 Connection Details............................................................................................................................................................. 7 4.3 LED Lights........................................................................................................................................................................10 4.4 DRV8329AEVM Configurability........................................................................................................................................ 11 4.5 Interfacing DRV8329AEVM and LAUNCHXL-F280049C LaunchPad............................................................................. 13 5 Hardware Setup.................................................................................................................................................................... 16 6 Firmware and GUI Application.............................................................................................................................................17 6.1 Connecting to the DRV8329AEVM-GUI...........................................................................................................................17 6.2 DRV8329x EVM GUI Quick Start Guide.......................................................................................................................... 18 6.3 Using the DRV8329x EVM GUI........................................................................................................................................18 7 Schematics............................................................................................................................................................................20 7.1 DRV8329A/B....................................................................................................................................................................20 7.2 Status LEDs..................................................................................................................................................................... 20 7.3 LaunchPad Connectors and Connections........................................................................................................................21 7.4 Power Stage and MOSFETs............................................................................................................................................ 21 7.5 Main Supply Input............................................................................................................................................................ 22 7.6 Hall Sensor and Hall Power selection.............................................................................................................................. 22 7.7 Connectors, Selectors, and Analog Control Interface...................................................................................................... 22 7.8 Dead Time and CSA Gain Selection................................................................................................................................ 23 7.9 Voltage Sense and Protection..........................................................................................................................................23 8 Revision History................................................................................................................................................................... 24 List of Figures Figure 2-1. DRV8329AEVM PCB Layout.....................................................................................................................................5 Figure 4-1. Major hardware blocks of the DRV8329AEVM..........................................................................................................7 Figure 4-2. Connections from motor to DRV8329AEVM............................................................................................................. 8 Figure 4-3. DRV8329AEVM on headers J1/J3 and J2/J4 of LaunchPad.................................................................................... 9 Figure 4-4. Micro-USB plugged into LaunchPad......................................................................................................................... 9 Figure 4-5. DRV8329AEVM LEDs............................................................................................................................................. 11 Figure 4-6. User-adjustable jumpers, resistors, and switches on DRV8329AEVM................................................................... 13 Figure 6-1. DRV8329A_EVM_GUI and DRV8329B_EVM_GUI on the Gallery.........................................................................17 Figure 6-2. Hardware connected message................................................................................................................................17 Figure 6-3. DRV8329A_EVM_GUI defaults when connected....................................................................................................18 Figure 7-1. DRV8329A/B schematic.......................................................................................................................................... 20 SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 1 Trademarks www.ti.com Figure 7-2. Status LEDs schematic........................................................................................................................................... 20 Figure 7-3. LaunchPad connectors schematic.......................................................................................................................... 21 Figure 7-4. LaunchPad connections schematic.........................................................................................................................21 Figure 7-5. Powerstage and MOSFETs schematic....................................................................................................................21 Figure 7-6. Main supply input schematic................................................................................................................................... 22 Figure 7-7. Hall Sensor and Hall Power selection schematic.................................................................................................... 22 Figure 7-8. Connectors, Selectors, and Analog Control Interface schematic............................................................................ 22 Figure 7-9. Dead time and CSA gain selection schematic........................................................................................................ 23 Figure 7-10. Voltage Sense and Protection schematic..............................................................................................................23 List of Tables Table 2-1. DRV8329 device variant names and descriptions (default of EVM in bold)................................................................4 Table 4-1. Description of DRV8329AEVM LEDs (on during power up in bold)..........................................................................10 Table 4-2. User-Selectable Jumpers.......................................................................................................................................... 11 Table 4-3. Connections for Header J1 on DRV8329AEVM (DNP in bold)................................................................................. 13 Table 4-4. Connections for Header J2 on DRV8329AEVM........................................................................................................14 Table 6-1. DRV8329x EVM GUIs available................................................................................................................................17 Trademarks All trademarks are the property of their respective owners. 2 DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Cautions and Warnings 1 Cautions and Warnings Observe the following cautions and warnings as printed on the EVM board. CAUTION: ! Read the User's Guide before use. HOT SURFACE: Caution Hot Surface! Contact may cause burns. Do not touch. Please take the proper precautions when operating. SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 3 Introduction www.ti.com 2 Introduction The DRV8329 is a 4.5-V to 60-V triple half-bridge gate driver IC for motor drive applications. It provides a bootstrap architecture to drive 3 high-side and 3 low-side N-channel MOSFETs with up to 1-A peak source and 2-A peak sink current and can support up to 100% PWM duty cycle inputs with a trickle charge pump. All variants are in compact QFN packages with hardware configurations and provide ultra-low sleep mode current. Additionally, variants offer a variety of optional features including a dead time pin, overcurrent level pin, driver shutoff pin, and integrated LDO capable of driving 3.3 V and 80 mA. A summary of the variants below can be seen in Table 2-1. Table 2-1. DRV8329 device variant names and descriptions (default of EVM in bold) Device Name LDO Output DRVOFF pin DT pin and VDSLVL pin PWM_MODE DRV8329A 3.3 V Yes Available 6x DRV8329B 3.3 V Yes Available 3x The DRV8329AEVM can be interfaced with the TMS320F280049C microcontroller on the LAUNCHXLF280049C LaunchPad in correspondence with the reference software to provide the algorithm to the DRV8329 to control the BLDC motor. This document serves as a startup guide to supplement the DRV8329AEVM + LAUNCHXL-F280049C BLDC motor control demo kit. It also is intended to help engineers design, implement, and validate reference hardware and software for the LaunchPad MCU and DRV8329. For step by step details on connecting the LAUNCHXLF280049C + DRV8329AEVM, refer to Hardware Setup. 4 DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Introduction Figure 2-1. DRV8329AEVM PCB Layout SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 5 Quick Start Guide www.ti.com 3 Quick Start Guide The DRV8329AEVM requires a power supply with a recommended operating range from 4.5-V to 60-V. To setup and power the EVM, follow the sequence below: 1. Connect the power supply ground to the GND of the 2-pin power connector J10 and the power supply positive terminal to the PVDD pin of J10. Ensure jumpers JP1, JP2, and JP3 of the LAUNCHXL-F280049C are not populated (DNP) to ensure that the LaunchPad is powered by the DRV8329AEVM and the motor supply is isolated from the USB. 2. Connect the motor phases to OUTA, OUTB, and OUTC in the correct order to connector J13. For sensored applications, connect the Hall sensors to the appropriate locations on the 5-pin connector J11 as shown in Figure 4-2. Select AVDD or EXT on jumper J11 to choose the Hall power source voltage. 3. Mate the DRV8329AEVM onto the top half of the LAUNCHXL-F280049C (LaunchPad Headers J1/J3 and J2/J4) as shown in Figure 4-3. The motor and power connectors should face the same direction as the Micro-USB connector on the LaunchPad. 4. Place nSLEEP switch in WAKE position and DRVOFF in ON position. 5. Power on the DRV8329AEVM. 6. Connect a Micro-USB cable from the computer into the Micro USB connector on the top of the LAUNCHXLF280049C as shown in Figure 4-4. 6 DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Hardware and Software Overview 4 Hardware and Software Overview 4.1 Hardware Connections Overview – DRV8329AEVM + LAUNCHXL-F280049C Figure 4-1 shows the major hardware blocks of the DRV8329AEVM. The DRV8329AEVM is designed for an input supply from 4.5-V to 60-V. Figure 4-1. Major hardware blocks of the DRV8329AEVM 4.2 Connection Details Figure 4-2 shows the power supply and motor connections made to the DRV8329AEVM in order to spin a 3-phase sensored or sensorless Brushless-DC motor. A 4.5-V to 60-V power supply or battery is connected to the PVDD and GND terminals. The three phases of the BLDC motor connect directly to the OUTA, OUTB, and OUTC terminals of the screw terminal J13 provided on the DRV8329AEVM. For sensored applications, to connect the Hall sensor outputs to the Hall connectors on the DRV8329AEVM, push down on the respective terminals to open the sockets and insert the Hall sensor wires into connector J11. SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 7 Hardware and Software Overview www.ti.com Figure 4-2. Connections from motor to DRV8329AEVM Figure 4-3 and Figure 4-4 shows where the Micro-USB cable is plugged in to the LAUNCHXL-F280049C to provide communication between the LaunchPad firmware and GUI as well as the correct installment of the DRV8329AEVM to the J1/J3 and J2/J4 headers of the LaunchPad. 8 DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Hardware and Software Overview Figure 4-3. DRV8329AEVM on headers J1/J3 and J2/J4 of LaunchPad Figure 4-4. Micro-USB plugged into LaunchPad SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 9 Hardware and Software Overview www.ti.com 4.3 LED Lights There are LED indicators on both the LAUNCHXL-F280049C and DRV8329AEVM when power is provided and the micro USB cable is plugged in to the LaunchPad. The DRV8329AEVM has 4 status LEDs on the board. By default, the PVDD and AVDD LEDs will light up when the board is powered on. The fault LED will light up when the driver reports a fault, and the MCU LED (tied to GPIO59) can be used for debugging and validation. Table 4-1 shows the LED descriptions, with the LEDs that are on during power up indicated in bold. Figure 4-5 shows the LED locations on the EVM. These LEDs all have removable jumpers to reduce power consumed by the EVM. Table 4-1. Description of DRV8329AEVM LEDs (on during power up in bold) Designator Jumper Name Color Description D1 J1 AVDD Green AVDD is outputting 3.3 V D2 J2 nFAULT Red Lights up when fault condition has occurred on DRV8329 D3 J3 PVDD Green Power is supplied to the board D4 J4 MCU_LED Orange MCU debugging 10 DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Hardware and Software Overview Figure 4-5. DRV8329AEVM LEDs 4.4 DRV8329AEVM Configurability The DRV8329AEVM includes a variety of user-selectable jumpers and unpopulated components on the PCB to choose user settings and evaluate the DRV8329A, DRV8329B, DRV8329C, or DRV8329D device. A summary of those selectable settings is listed in Table 4-2 (defaults in bold) and can be seen on the board in Figure 4-6. Table 4-2. User-Selectable Jumpers Id. Setting Name Description Position Function A nSLEEP switch Places DRV8329 in sleep mode S2 = Left Sleep mode S2 = Right Operating mode B Dead time potentiometer, jumper, & resistor Jumper to enable dead time control from potentiometer and potentiometer used to set the resistance for DT pin. J1 = Populated DT from pot is enabled J1 = DNP DT from pot is disabled R1 (CW = more DT, CCW Sets dead time of gate = less DT) driver outputs R2 SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Fixed resistor for DT pin DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 11 Hardware and Software Overview www.ti.com Table 4-2. User-Selectable Jumpers (continued) Id. Setting Name Description Position Function C CSA input filter Input filter to filter any Vsense switching transients at the current sense amplifier inputs. R45 = R43 = 0 ohm C30, C31, C32 = DNP CSA input filtering D Power stage MOSFETs and passive components Optional passive components for tuning power stage, i.e. series gate resistors, RC snubbers, PVDD-GND capacitors, PVDD-LSS capacitors R28, R29, R30, R34, R35, Series gate resistors R36 = 10 ohm (GHA, GHB, GHC, GLA, GLB, GLC) G H J K CSA gain select R25/C12, R26/C13, R27/ C14, R40/C26, R41/C24, R42/C25 = DNP RC snubbers (HS FET A, HS FET B, HS FET C, LS FET A, LS FET B, LS FET C) C18, C20, C44 = 2.2uF PVDD-VDRAIN bypass capacitor C21, C22, C23 = 0.01uF PVDD-LSS bypass capacitors Selects the gain setting of J2 = GND the integrated CSA in V/V. J2 = 50 k HALL_PWR select Use J6 to supply Hall power from AVDD or external hall power. CSAGAIN = 10 V/V J2 = 200 k CSAGAIN = 20 V/V J2 = DNP CSAGAIN = 40 V/V J11 = AVDD Supplies AVDD to Hall power J11 = EXT Supply external hall power from EXT HALL POWER test point. VDSLVL potentiometer, Potentiometer to set J16 = POT select and disable jumpers VDSLVL between 0.1 ̶ 2.5 V, VDSLVL_SEL to select J16 = EXT voltage source, disable jumper to disable VDSLVL J15 = Populated CSAREF select CSAGAIN = 5 V/V VDSLVL set from potentiometer VDSLVL set from VDS EXT test point VDSLVL is disabled (100 kΩ to GVDD) J15 = DNP VDSLVL is enabled R74 (CCW = higher VDSLVL, CW = lower VDSLVL) Sets VDSLVL from 0.1 V ̶ 2.5 V Jumper to select CSA reference voltage from AVDD or an external reference source. J14 = AVDD CSAREF = AVDD J14 = EXT CSAREF = CSAREF EXT test point L Speed pot Sets speed of the motor when potentiometer is enabled in the GUI. R73 (CW = less speed, CCW = more speed) Sets duty cycle from 0% to 100%. M External CSA output filter RC output filter to suppress high frequency transients of CSA output from current shunt. R59 = 330 ohms, C31 = 470 pF Fc ~10 MHz N DRVOFF switch Turns off the gate driver outputs. S2 = Down Drivers are on S2 = Up Drivers are off (DRVOFF is enabled) 12 DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Hardware and Software Overview Figure 4-6. User-adjustable jumpers, resistors, and switches on DRV8329AEVM 4.4.1 DRV8329A/B Compatibility The DRV8329AEVM default is the DRV8329A (Hardware variant), but can also be compatible with the DRV8329B. The main difference is that DRV8329A operates in 6x PWM mode and DRV8329B operates in 3x PWM mode. To use the DRV8329B, remove the DRV8329A from the EVM and replace with the DRV8329B. No extra hardware changes are required for 3x PWM operation. 4.5 Interfacing DRV8329AEVM and LAUNCHXL-F280049C LaunchPad The DRV8329AEVM has 40 pins with different functions. These pins are interfaced with the LAUNCHXLF280049C LaunchPad development kit and are mapped appropriately to receive the functionalities of the DRV8329 device. These 40 pins are grouped into 4 ports in respect to the LAUNCHXL-F280049C (J1 to J4). Table 4-3 and Table 4-4 list the interfacing of these ports of the DRV8329AEVM headers J3 and J4. Table 4-3. Connections for Header J1 on DRV8329AEVM (DNP in bold) J3 Pin Number DRV8329AEVM Function LAUNCHXL-F280049C Function Description 1 AVDD (DNP) +3.3 V 3.3 V LaunchPad Supply 2 +5 V +5 V 5 V LaunchPad Supply 3 POT_MCU/NC_49C PGA1/3/5_GND Not used 4 GND GND GND connection 5 Not used GPIO13/SCIBRX Not used 6 VSENA ADCINA5 Phase A Voltage Sense 7 Not used GPIO40/SCIBTX Not used SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 13 Hardware and Software Overview www.ti.com Table 4-3. Connections for Header J1 on DRV8329AEVM (DNP in bold) (continued) J3 Pin Number DRV8329AEVM Function LAUNCHXL-F280049C Function Description 8 VSENB ADCINB0 Phase B Voltage Sense 9 nSLEEP_DFLT NC nSLEEP for internal use only. 10 VSENC ADCINC2 Phase C Voltage Sense 11 CTAP ADCINB3/VDAC Center tap voltage sense. 12 VSENPVDD ADCINB1 PVDD Bus Voltage Sense 13 Not used SPIACLK Not used 14 NC_MCU/POT_49C ADCINB2 General Purpose pot for MCU (R90) 15 nFAULT_DFLT ADCINC4 nFAULT for internal use only. 16 ISENA ADCINC0 LSS current sense 17 Not used GPIO37 Not used 18 Not used ADCINA9 Not used 19 Not used GPIO35 Not used 20 VDSLVL/C_TAP ADCINA1/DACB_OUT VDSLVL from DAC. C_TAP for internal use only. Table 4-4. Connections for Header J2 on DRV8329AEVM J4 Pin Number DRV8329AEVM Function LAUNCHXL-F280049C Function Description 1 INHA GPIO10/PWM6A PWM used to switch Phase A High-side FET 2 GND GND GND connection 3 INLA GPIO11/PWM6B PWM used to switch Phase A Low-side FET 4 MCU_LED SPIASTE Visual feedback for LaunchPad connection. 5 INHB GPIO8/PWM5A PWM used to switch Phase B High-side FET 6 nFAULT_DFLT NC nFAULT for internal use only. 7 INLB GPIO9/PWM5B PWM used to switch Phase B Low-side FET 8 Not used NC Not used 9 INHC GPIO4/PWM3A PWM used to switch Phase C High-side FET 10 Not used XRSn Not used 11 INLC GPIO5/PWM3B PWM used to switch Phase C Low-side FET 12 Not used SPIASIMO Not used 13 HALLA GPIO58 Hall sensor A from motor 14 Not used SPIASOMI Not used 15 nSLEEP_49C GPIO30 nSLEEP signal (active low) 16 DRVOFF GPIO39 Active-high output to disable gate drivers 17 Not used GPIO18*/XCLKOUT Not used 14 DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Hardware and Software Overview Table 4-4. Connections for Header J2 on DRV8329AEVM (continued) J4 Pin Number DRV8329AEVM Function LAUNCHXL-F280049C Function Description 18 HALLB GPIO23/LED4 Hall sensor B from motor 19 nFAULT_49C/CSAREF GPIO25 nFAULT signal (active low) 20 HALLC GPIO59 Hall sensor C from motor Note There are many resistors that are not populated for internal use only. Ensure the correct resistors are populated so every has signal has only signal path. If multiple signal paths are present, or no signal path is present, the device may not work as intended. SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 15 Hardware Setup www.ti.com 5 Hardware Setup The hardware required to run the motor control is the LAUNCHXL-F280049C LaunchPad development kit, the DRV8329AEVM, a Micro-USB cable, and a power supply with a DC output from 4.5-V to 60-V. Follow these steps to set up the evaluation module: 1. Ensure all resistors, jumpers, and switches are set up accordingly. 2. Mate the DRV8329AEVM board to the top half of the LAUNCHXL-F280049C LaunchPad development kit (mates to J1/J3 and J2/J4 of LaunchPad, as in Figure 4-3). Observe the correct orientation when placing DRV8329AEVM to the LAUNCHXL-F280049C. The motor and power connectors should face to the LaunchPad’s Micro-USB connector. 3. Connect the three phases from the brushless-DC motor to the 3-pin connector J12 on DRV8329AEVM. Phases OUTA, OUTB, and OUTC are labeled in white silkscreen on the PCB top layer. If using a sensored algorithm on the LaunchPad development kit, connect Hall sensors to the 5-pin connector J10. 4. Connect the DC power supply to header J9. Observe the correct polarity PVDD and GND connections on the DRV8329AEVM connector J9. 5. Connect a Micro-USB cable to the LaunchPad development kit and computer. 6. Turn on the power supply and power up the PCB. If using the DRV8329AEVM with an external microcontroller, make the connections needed on the male headers on the top of the board or female connectors on the bottom side of the board. 16 DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Firmware and GUI Application 6 Firmware and GUI Application The DRV8329AEVM can implement sensored, sensorless, or Field-oriented control for commutating a 3-phase Brushless-DC motor. There are two GUIs to support DRV8329A (DRV8329A-EVM-GUI) and DRV8329B (DRV8329B-EVM-GUI) using sensored trapezoidal commutation with Hall sensor feedback. The GUIs allow for basic trapezoidal motor control functions such as acceleration, duty cycle control, PWM switching frequency, MCU dead time insertion, braking, and direction changes. The bus and phase voltage feedback circuits as well as the integrated CSA provide voltage and current feedback from the motor for over-current and motor voltage protection. The following GUIs are available on the Gallery: Table 6-1. DRV8329x EVM GUIs available Variant GUI DRV8329A https://dev.ti.com/gallery/view/BLDC/DRV8329A_EVM_GUI/ver/ 1.0.0/ DRV8329B https://dev.ti.com/gallery/view/BLDC/DRV8329B_EVM_GUI/ver/ 1.0.0/ 6.1 Connecting to the DRV8329AEVM-GUI Follow the instructions in Section 5 and ensure the LAUNCHXL-F280049C is connected to the PC. Turned on the supply to power the DRV8329AEVM and LAUNCHXL-F280049C. Access the Gallery and search for "DRV8329" as shown in Figure 6-1. Click on the GUI for the variant. Figure 6-1. DRV8329A_EVM_GUI and DRV8329B_EVM_GUI on the Gallery Accept the readme that appears. The GUI will detect the LAUNCHXL-F280049C and automatically download the program into the MCU. Once complete, the “Hardware Connected” message appears at the bottom left hand corner as shown in Figure 6-2. Figure 6-2. Hardware connected message The following defaults should appear as shown in Figure 6-3 when the GUI is connected: • • • • Direction – Enabled PWM Frequency (Hz) – 20000 MCU Dead Time (ns) – 0 Acceleration Delay (ms/1% duty cycle) – 50 SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 17 Firmware and GUI Application www.ti.com Figure 6-3. DRV8329A_EVM_GUI defaults when connected 6.2 DRV8329x EVM GUI Quick Start Guide 1. Click on the “Output Enable” switch. 2. Enter the PWM frequency in Hz using the “PWM Frequency (Hz)” text box. Press Enter. 3. Adjust the MCU dead time and Acceleration Delay values. You may also use the DT potentiometer to insert dead time from the DRV8329 rather than the MCU by setting the dead time potentiometer resistance, enabling the DT_POT jumper, and setting the MCU dead time to 0 ns. 4. To control the motor speed using the speed potentiometer, turn the potentiometer all the way counterclockwise to set to 0% speed. Click on the “Potentiometer Enable” switch. To not use the potentiometer to control the motor speed, skip this step. 5. Adjust the “Duty Cycle” slider or enter the duty cycle in the number box to control the speed of the motor from 0% to 100%. 6. Use the “Direction” switch to switch the direction of the motor. 7. Use the drop-down menu in “Motor Braking” to determine the motor braking type. Click on “Stop Motor” to stop the method with the selected braking type. 8. If R58 is populated and R11 is not populated, use the nSLEEP switch to put the driver into a low-power sleep mode. 9. If R69 is populated, use the DRVOFF switch to shut off the gate drivers and Hi-Z the gate driver outputs. 6.3 Using the DRV8329x EVM GUI The GUI offers the following features: MOTOR CONTROL SETTINGS • 18 Output Enable – Global enable flag to run the motor at the selected duty cycle. DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com • • • • • • • • Firmware and GUI Application Potentiometer Enable – Enables potentiometer R90 to control the duty cycle of the motor. Duty cycle is updated in the Duty Cycle slider in real time. Turn all the way clockwise for 0% duty cycle, all the way counterclockwise for 100% duty cycle. Direction – Sets direction of the motor. When enabled, motor spins counterclockwise. When disabled, motor spins clockwise. When the direction is changed, the motor will coast to a stop, wait 1 second, then accelerate to the duty cycle in the opposite direction. nSLEEP – Places the DRV8329 in a low-power sleep mode. nSLEEP toggle switch only works when resistor R26 is populated and resistor R75 is DNP. DRVOFF – Disables all gate drivers in Hi-Z state. PWM Frequency – Sets the PWM switching frequency of the motor in Hz. MCU Dead Time – Sets the MCU deadband time for the PWM inputs in nanoseconds. Duty Cycle – Sets the duty cycle of the motor when potentiometer is disabled. Acceleration Delay – Sets the acceleration and deceleration ramp rate in ms per 1% duty cycle. MOTOR BRAKING SETTINGS • Stop Motor – Stops the motor when toggled according to the braking method in the drop-down menu. The two methods are brake (turn on all low-side MOSFETs) and coast (float all MOSFETs). CSA SETTINGS • • • Over-current Limit – Sets the overcurrent limit in amps. If ISEN is measured to be over the overcurrent limit, Over-Current fault is triggered. Current Sense Resistor – Sets the resistor value in ohms for the shunt resistor onboard the EVM. Default resistor populated is 0.001 ohm. CSA Gain – Gain of the integrated CSA on the EVM. Set the CSA gain setting to match the CSAGAIN setting on J2 of the EVM so the firmware can calculate the ISEN current correctly. FAULT STATUS BITS • • • • • Fault Status – Logical “or” of all faults. When a fault occurs, Output Enable is turned off, Duty Cycle is set to 0%, and the corresponding fault status LED is lit. PVDD Overvoltage Fault – PVDD is over 60 V. Configurable through firmware. PVDD Undervoltage Fault – PVDD is under 4.5 V. Configurable through firmware. Over-Current – Measured LSS current is over the Over-Current threshold. DRV8329 Fault – Fault indicated by the DRV8329. See DRV8329 datasheet. SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 19 Schematics www.ti.com 7 Schematics 7.1 DRV8329A/B AVDD C2 0.1µF 6.3V U1 26 GND GND AVD D PVDD 5 C5 100nF 100V C4 10uF 100V GND GVDD 8 C7 CPH C8 10uF 25V GND GND 470nF 6 CPL 16V nSLEEP 34 nSLEEP INHA INLA AVDD R5 5.1k INHB INLB INHC INLC 29 32 INHB INLB 28 31 INHC INLC 27 30 CSAGAIN R6 GND ISENA CSAGAIN 33 SOA 330 C10 10V 470pF 36 BSTB GHB SHB GLB CPH I NHA I NLA BSTC GHC SHC GLC I NHB I NLB DRVOFF I NHC I NLC LSS FAULT SP DT SN 9 11 10 12 BSTA GHA SHA GLA GHA 13 15 14 16 BSTB GHB SHB GLB GHB 17 19 18 20 BSTC GHC SHC GLC GHC 24 DRVOFF 21 LSS 22 SP 23 SN C3 25V 1uF SHA GLA C6 25V 1uF C9 25V 1uF DRVOFF LSS SP SN CSAGAI N 1 SO CSAREF Power PAD AGND GND C11 0.1µF 6.3V DRV8329AREER 37 25 4 TP2 TP6 TP10 TP12 GND TP1 TP3 TP7 DRVOFF SP SN nSLEEP GND 14 13 12 11 10 9 8 7 6 5 4 3 2 1 GND AVDD PVDD GVDD SHC GLC GND TP5 TP9 TP11 SHB GLB VDSLVL 2 CSAREF CSAREF GVDD SLEEP 3 VDSLVL PVDD CPL 35 DT DT C16 0.1µF 6.3V ISENA INHA INLA nFAULT nFAULT VDSLVL 7 BSTA GHA SHA GLA LSS GLC GHC SHC BSTC GLB GHB SHB BSTB GLA GHA SHA BSTA C1 10uF 6.3V nFAULT TP4 TP8 LSS J7 GNDGND GND Figure 7-1. DRV8329A/B schematic 7.2 Status LEDs AVDD LED nFAULT LED PVDD LED MCU Launchpad LED AVDD AVDD PVDD AVDD 2 1 2 1 2 1 2 1 1 R9 2.00k R8 820 R10 820 nFAULT GND nFAULT D4 Orange MCU 2 D3 Green 2 D2 Red 2 2 D1 Green R7 820 J6 1 J5 1 J4 1 J3 MCU_LED MCU_LED GND Figure 7-2. Status LEDs schematic 20 DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Schematics 7.3 LaunchPad Connectors and Connections Connects to J1/J3 on Launchpad Connects to J4/J2 on Launchpad 3V3_MCU AVDD TP13 TP14 J8 R14 1 POT_MCU/NC_49C 3 0 5 7 nSLEEP_DFLT 9 nSLEEP_DFLT CTAP 11 CTAP 13 nFAULT_DFLT R20 0 15 DNP nFAULT_DFLT 17 19 +5V R15 2 4 6 8 10 12 14 16 18 20 0 VSENA VSENB VSENC VSENPVDD NC_MCU/POT_49C ISENA J9 INHA INLA INHB INLB INHC INLC HALLA nSLEEP_49C INHA INLA INHB INLB INHC GND INLC HALLA nSLEEP_49C VSENA VSENB VSENC VSENPVDD ISENA VDSLVL/C_TAP nFAULT_49C R23 0 nFAULT_49C/CSAREF 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 MCU_LED nFAULT_DFLT MCU_LED nFAULT_DFLT GND DRVOFF HALLB HALLC DRVOFF HALLB HALLC AVDD R21 0 DNP Compatible with Standard Launchpad pin out headers J1/J3 and J4/J2 Specifically analyzed compatibility with: 2355, 25C, 49C, 69M, 27F, 123G, M0 Figure 7-3. LaunchPad connectors schematic nSLEEP nSLEEP R11 0 DNP nSLEEP_49C R12 0 DNP nSLEEP_DFLT R16 0 nFAULT nFAULT POT POT nSLEEP_49C nSLEEP_DFLT nFAULT_49C nFAULT_49C R18 0 DNP nFAULT_DFLT R19 0 DNP POT_MCU/NC_49C R24 0 VDSLVL/C_TAP nFAULT_DFLT R13 0 DNP VDSLVL R17 0 DNP CTAP VDSLVL CTAP VDSLVL compatible with DAC to set or ADC to sense CTAP compatible with ADC to sense NC_MCU/POT_49C MCU connections are default Figure 7-4. LaunchPad connections schematic 7.4 Power Stage and MOSFETs PHASE A 10 Q4 R37 DNP 10 GLA_FET 1 D8 DNPC27 R76 DNP 2nFDNP 10k 50V 1N4448WX-TP OUTB TP19 10 R38 DNP 10 R40 DNP 1.50 Q5 R35 GLB GLB GLB_FET OUTB 1 D9 DNPC28 R77 DNP 2nFDNP 10k 50V 1N4448WX-TP Populate diodes to control sink and source current independently C22 100V 0.01uF C24 DNP 3900pF 100V SHC SHC R33 DNP 10 NT3 R41 DNP 1.50 4 3 1 D7 DNP DNPC19 R75 2nFDNP 10k 50V R27 DNP 1.50 C14 DNP 3900pF 100V C44 100V 4.7uF 1N4448WX-TP OUTC TP20 Q6 R36 GLC 10 R39 DNP 10 GND Q3 GHC_FET Net-Tie GLC GND LSS 10 C20 100V 4.7uF 1N4448WX-TP Net-Tie DNPC26 3900pF 100V 4 3 DNPC17 R60 2nFDNP 10k 50V DNP C13 DNP 3900pF 100V R30 GHC CSD18536KTTT R32 DNP 10 NT2 GHC 4 SHB SHB CSD18536KTTT C18 100V 4.7uF C21 100V 0.01uF D6 TP17 R26 DNP 1.50 GLC_FET 1 D10 DNPC29 R78 DNP 2nFDNP 10k 50V 1N4448WX-TP 3 TP18 R34 GLA OUTA 1 4 OUTA 10 GHB_FET CSD18536KTTT GLA C12 DNP 3900pF 100V Q2 R29 GHB GHB 3 DNPC15 R22 2nFDNP 10k 50V Net-Tie PHASE C CSD18536KTTT DNP 1N4448WX-TP TP16 R25 DNP 1.50 4 R31 DNP 10 NT1 D5 3 SHA 1 3 10 GHA_FET CSD18536KTTT SHA Q1 R28 GHA 4 TP15 GHA PHASE B RC Snubber, HS Drain to LS Source cap, and GS Cap or Res are all recommended, but optional, protection circuits CSD18536KTTT PVDD OUTC C23 100V 0.01uF C25 DNP 3900pF 100V R42 DNP 1.50 External C_GS capacitors can be replaced with k ohm pull down resistors if desired GND LSS DNPC30 GND 330pF 100V SP SP Route as differential pair Kelvin connection to shunt SN R43 0 DNPC31 50V 0.01uF R44 0.001 R45 0 SN DNPC32 330pF 100V GND GND Figure 7-5. Powerstage and MOSFETs schematic SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 21 Schematics www.ti.com 7.5 Main Supply Input PVDD J10 1 2 C33 80V 10uF PVDD_IN C34 100V 390uF C35 100V 390uF GND 4.5-V to 60-V Operation 65V ABS MAX 35A Rated connector Figure 7-6. Main supply input schematic 7.6 Hall Sensor and Hall Power selection TP21 GND AVDD AVDD AVDD HALL_PWR TP22 R46 10.0k TP25 GND EXT_HALL_PWR HALLC HALLB HALLA 3 2 1 AVDD J12 HALL_PWR_SEL R47 10.0k TP23 TP24 R48 10.0k GND J11 1 2 3 4 5 HALLC HALLB HALLA C37 1nF 16V Hall Sensor Power Select C38 1nF 16V GND GND C39 1nF 16V HALL IN HALL_PWR GND Figure 7-7. Hall Sensor and Hall Power selection schematic 7.7 Connectors, Selectors, and Analog Control Interface PVDD TP26 TP27 TP28 TP29 R54 10.0k TP30 3 C45 2.2nF 100V 1 S1 GND R58 0 nSLEEP_SW 2 nSLEEP GND GND R59 10.0k TP31 GND AVDD CSAREF TP34 EXT_CSA_REF TP35 GND GND GND GND GND D11 3.3V 300mW TP32 TP33 J13 GND nSLEEP switch CSAREF GND nSLEEP C45/R59 designed for ~10us nSLEEP reset pulse MCU GPIO should be defaulted to input when R58 is populated nSLEEP is 65V compliant but LP is not Ensure D11 is populated when LP is connected OUTA OUTB OUTC 1 2 3 OUTA OUTB OUTC MOTOR_OUT PVDD Motor Phase Connector 35A rated 3 2 1 R67 10.0k J14 CSA_REF_SEL GND TP36 1 2 J15 VDS_DISABLE GVDD R70 VDSLVL AVDD AVDD TP37 GND R72 7.5k TP38 EXT_VDSLVL R80 DRVOFF DRVOFF D12 S2 R71 0 100k R69 0 10k 3 1 2 CSA REF Select DRVOFF_SW 3.3V 300mW DRVOFF switch DNP R69/R80 if DRVOFF is controlled by LP output GND GND POT R73 25 kohm R74 25 kohm 3 2 1 POT GND J16 VDSLVL_SEL GND GND General purpose pot for MCU VDSLVL Select Valid VDSLVL range: 0.1V - 2.5V POT Voltage range: 0V - 2.538V POT select by default Figure 7-8. Connectors, Selectors, and Analog Control Interface schematic 22 DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Schematics 7.8 Dead Time and CSA Gain Selection CSAGAIN (Pin 33) DT (Pin 3) J1 1 3 5 R3 200k CSAGAIN 2 4 6 R4 50.5k 1 2 R1 500k CSAGAIN DT R2 DNP 30k GND DNP J2 GND GND DT GND DT = GND: t_Dead = 55 ns DT = Floating: t_Dead = 160 ns (DRV8329B) or 55 ns (DRV8329A) DT = 10 k < R1 < 390 k: t_Dead = linear between 100 ns - 2000 ns R1 [ohms] = (t_Dead [ns])*200 - 10000 All values typical GND CSAGAIN = GND: CSAGAIN = 5 V/V CSAGAIN = 47k: CSAGAIN = 10 V/V CSAGAIN = 200k: CSAGAIN = 20 V/V CSAGAIN = HI-Z: CSAGAIN = 40 V/V Figure 7-9. Dead time and CSA gain selection schematic 7.9 Voltage Sense and Protection PVDD VSENB 3 4 VSENB Voltage sense protection VSENC Supply Voltage Sense 2 VSENC R49 110k GND D2+ D2- GND VSENPVDD U2 TPD4S009DCKR VCC 5 D1+ D11 6 R50 4.99k VSENPVDD C36 100nF 50V +5V GND VSENA VSENPVDD VSENA VSENPVDD Phase Voltage Sense OUTA OUTA OUTB OUTB R51 110k OUTC R52 110k VSENA R55 4.99k OUTC VSENA C40 100nF 50V R56 4.99k GND R53 110k VSENB R57 4.99k GND OUTA OUTB OUTC OUTA OUTB R63 1.00k OUTC R65 VSENC C42 100nF 50V GND Virtual Center Tap Voltage Sense R61 1.00k VSENC VSENB C41 100nF 50V Depopulate R65 to disconnect CTAP from LP R62 0 DNP R64 110k R66 0 DNP 1.00k R68 4.99k CTAP CTAP C43 10pF 10V GND Figure 7-10. Voltage Sense and Protection schematic SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback DRV8329AEVM User’s Guide Copyright © 2022 Texas Instruments Incorporated 23 Revision History www.ti.com 8 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision * (March 2022) to Revision A (August 2022) Page • Updated images to production version of DRV8329AEVM................................................................................ 3 24 DRV8329AEVM User’s Guide SLVUCF5A – MARCH 2022 – REVISED AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated STANDARD TERMS FOR EVALUATION MODULES 1. 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However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as accurate, complete, reliable, current, or error-free. 6. Disclaimers: 6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY MATERIALS PROVIDED WITH THE EVM (INCLUDING, BUT NOT LIMITED TO, REFERENCE DESIGNS AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." 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USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES, EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS. THIS OBLIGATION SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED. www.ti.com 8. Limitations on Damages and Liability: 8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE TERMS OR THE USE OF THE EVMS , REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN TWELVE (12) MONTHS AFTER THE EVENT THAT GAVE RISE TO THE CAUSE OF ACTION HAS OCCURRED. 8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY USE OF AN EVM PROVIDED HEREUNDER, INCLUDING FROM ANY WARRANTY, INDEMITY OR OTHER OBLIGATION ARISING OUT OF OR IN CONNECTION WITH THESE TERMS, , EXCEED THE TOTAL AMOUNT PAID TO TI BY USER FOR THE PARTICULAR EVM(S) AT ISSUE DURING THE PRIOR TWELVE (12) MONTHS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT. 9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s) will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s), excluding any postage or packaging costs. 10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas, without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas. Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2019, Texas Instruments Incorporated 5 IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2022, Texas Instruments Incorporated
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