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DRV8829
SLVSA74E – MAY 2010 – REVISED SEPTEMBER 2015
DRV8829 5-A 45-V Single H-Bridge Motor Driver
1 Features
3 Description
•
The DRV8829 is a brushed-DC motor or 1/2 bipolar
stepper driver for industrial applications. The device
output stage consists of an N-channel power
MOSFET H-bridge driver. The DRV8829 is capable of
driving up to 5-A peak current or 3.5-A rms current
(with proper printed-circuit-board ground plane for
thermal dissipation and at 24 V and TA = 25°C).
1
•
•
•
•
•
•
•
Single H-Bridge PWM Motor Driver
– Single Brushed-DC Motor Driver
– 1/2 Bipolar Stepper Motor Driver
5-A peak or 3.5-A rms Output Current
6.5- to 45-V Operating Supply Voltage Range
Simple PH/EN Control Interface
Multiple Decay Modes
– Mixed Decay
– Slow Decay
– Fast Decay
Low-Current Sleep Mode (10 µA)
Small Package and Footprint
– 28 HTSSOP (PowerPAD)
SPACE
Protection Features
– VM Undervoltage Lockout (UVLO)
– Overcurrent Protection (OCP)
– Thermal Shutdown (TSD)
– Fault Condition Indication Pin (nFAULT)
The PH/EN pins provide a simple control interface.
An internal sense amplifier allows for adjustable
current control. A low-power sleep mode is provided
for very low quiescent current standby using a
dedicated nSLEEP pin. Current regulation decay
mode can be set to slow, fast, or mixed decay.
Internal protection functions are provided for
undervoltage,
overcurrent,
short-circuits,
and
overtemperature. Fault conditions are indicated by a
nFAULT pin.
Device Information(1)
PART NUMBER
DRV8829
PACKAGE
HTSS0P (28)
BODY SIZE (NOM)
9.70 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
•
•
•
•
Automatic Teller and Money Handling Machines
Video Security Cameras
Multi-Function Printers and Scanners
Office Automation Machines
Gaming Machines
Factory Automation and Robotics
Stage Lighting Equipment
Simplified Schematic
8.2 to 45 V
Controller
PHASE
DRV8829
ENBL
Current scalar
Decay mode
Single
H-Bridge
Motor Driver
5A
BDC
BDC
Current Reg
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
DRV8829
SLVSA74E – MAY 2010 – REVISED SEPTEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
5
6.1
6.2
6.3
6.4
6.5
6.6
5
5
5
5
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 8
7.1
7.2
7.3
7.4
Overview ................................................................... 8
Functional Block Diagram ......................................... 8
Feature Description................................................... 9
Device Functional Modes........................................ 11
8
Application and Implementation ........................ 13
8.1 Application Information............................................ 13
8.2 Typical Application ................................................. 13
9
Power Supply Recommendations...................... 16
9.1 Bulk Capacitance Sizing ......................................... 16
10 Layout................................................................... 17
10.1
10.2
10.3
10.4
Layout Guidelines .................................................
Layout Example ....................................................
Thermal Considerations ........................................
Power Dissipation .................................................
17
17
18
18
11 Device and Documentation Support ................. 19
11.1
11.2
11.3
11.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
19
19
19
19
12 Mechanical, Packaging, and Orderable
Information ........................................................... 19
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (June 2015) to Revision E
•
Increased the power supply voltage maximum to 50 ............................................................................................................ 5
Changes from Revision C (August 2013) to Revision D
•
2
Page
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 5
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SLVSA74E – MAY 2010 – REVISED SEPTEMBER 2015
5 Pin Configuration and Functions
PWP Package
28-Pin HTSSOP
Top View
1
28
GND
CP1
2
I4
VCP
3
27
26
VM
4
25
I2
OUT1
5
24
I1
ISEN
6
23
I0
OUT2
22
NC
OUT2
7
8
21
ENBL
ISEN
9
20
PHASE
OUT1
10
19
DECAY
VM
11
18
nFAULT
VREF
12
17
nSLEEP
VREF
13
16
nRESET
GND
14
15
V3P3OUT
PowerPAD - GND
CP1
I3
Pin Functions
PIN
NAME
NO.
I/O (1)
EXTERNAL COMPONENTS
OR CONNECTIONS
DESCRIPTION
POWER AND GROUND
GND
14, 28
—
Device ground
VM
4, 11
—
Bridge power supply
Connect to motor supply (8.2 V to 45 V). Both pins
must be connected to same supply.
V3P3OUT
15
O
3.3-V regulator output
Bypass to GND with a 0.47-μF to 6.3-V ceramic
capacitor. Can be used to supply VREF.
CP1
1
IO
Charge pump flying capacitor
CP2
2
IO
Charge pump flying capacitor
VCP
3
IO
High-side gate drive voltage
Connect a 0.1-μF to 16-V ceramic capacitor and
1-MΩ resistor to VM.
ENBL
21
I
Bridge enable
Logic high to enable H-bridge. Internal pulldown.
PHASE
20
I
Bridge phase (direction)
Logic high sets OUT1 high, OUT2 low. Internal
pulldown.
I0
23
I
I1
24
I
I2
25
I
Current set inputs
Sets winding current as a percentage of full-scale.
Internal pulldown.
I3
26
I
I4
27
I
DECAY
19
I
Decay mode
Low = slow decay, open = mixed decay,
high = fast decay
Internal pulldown and pullup.
nRESET
16
I
Reset input
Active-low reset input initializes internal logic and
disables the H-bridge outputs. Internal pulldown.
nSLEEP
17
I
Sleep mode input
Logic high to enable device, logic low to enter lowpower sleep mode. Internal pulldown.
12, 13
I
Current set reference input
Reference voltage for winding current set. Both
pins must be connected together on the PCB.
18
OD
Fault
Logic low when in fault condition
(overtemperature, overcurrent)
Connect a 0.01-μF to 50-V capacitor between
CP1 and CP2.
CONTROL
VREF
STATUS
nFAULT
(1)
Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output
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Pin Functions (continued)
PIN
NAME
NO.
I/O (1)
DESCRIPTION
EXTERNAL COMPONENTS
OR CONNECTIONS
OUTPUT
ISEN
6, 9
IO
Bridge ground / Isense
OUT1
5, 10
O
Bridge output 1
OUT2
7, 8
O
Bridge output 2
4
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Connect to current sense resistor. Both pins must
be connected together on the PCB.
Connect to motor winding. Both pins must be
connected together on the PCB.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
VM
VREF
(1) (2)
MIN
MAX
UNIT
Power supply voltage
–0.3
50
V
Digital pin voltage
–0.5
7
V
Input voltage
–0.3
4
V
ISENSE pin voltage
–0.3
0.8
V
Peak motor drive output current, t < 1 μs
Internally limited
A
Continuous motor drive output current (3)
5
Continuous total power dissipation
A
See Thermal Information
TJ
Operating virtual junction temperature
–40
150
°C
TA
Operating ambient temperature
–40
85
°C
Tstg
Storage temperature
–60
150
°C
(1)
(2)
(3)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
Power dissipation and thermal limits must be observed.
6.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
V(ESD)
(1)
(2)
Electrostatic discharge
(1)
UNIT
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101, all
pins (2)
V
±500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
(1)
NOM
MAX
UNIT
VM
Motor power supply voltage range
8.2
45
VREF
VREF input voltage (2)
1
3.5
IV3P3
V3P3OUT load current
0
1
mA
fPWM
Externally applied PWM frequency
0
100
kHz
(1)
(2)
V
V
All VM pins must be connected to the same supply voltage.
Operational at VREF from 0 V to 1 V, but accuracy is degraded.
6.4 Thermal Information
DRV8829
THERMAL METRIC (1)
PWP (HTSSOP)
UNIT
28 PINS
RθJA
Junction-to-ambient thermal resistance
31.6
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
15.9
°C/W
RθJB
Junction-to-board thermal resistance
5.6
°C/W
ψJT
Junction-to-top characterization parameter
0.2
°C/W
ψJB
Junction-to-board characterization parameter
5.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
1.4
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLIES
IVM
VM operating supply current
VM = 24 V, fPWM < 50 kHz
5
8
mA
IVMQ
VM sleep mode supply current
VM = 24 V
10
20
μA
VUVLO
VM undervoltage lockout voltage
VM rising
7.8
8.2
V
3.3
3.4
V
V3P3OUT REGULATOR
V3P3
V3P3OUT voltage
IOUT = 0 to 1 mA
3.2
LOGIC-LEVEL INPUTS
VIL
Input low voltage
VIH
Input high voltage
2.2
0.6
VHYS
Input hysteresis
0.3
IIL
Input low current
VIN = 0
IIH
Input high current
VIN = 3.3 V
RPD
Internal pulldown resistance
0.45
–20
0.7
V
5.25
V
0.6
V
20
μA
100
100
μA
kΩ
nFAULT OUTPUT (OPEN-DRAIN OUTPUT)
VOL
Output low voltage
IO = 5 mA
IOH
Output high leakage current
VO = 3.3 V
0.5
V
1
μA
0.8
V
±40
μA
DECAY INPUT
VIL
Input low threshold voltage
For slow decay mode
VIH
Input high threshold voltage
For fast decay mode
IIN
Input current
RPU
Internal pullup resistance
RPD
Internal pulldown resistance
2
V
130
kΩ
80
kΩ
H-BRIDGE FETS
RDS(ON)
HS FET on resistance
RDS(ON)
LS FET on resistance
IOFF
Off-state leakage current
VM = 24 V, IO = 1 A, TJ = 25°C
0.1
VM = 24 V, IO = 1 A, TJ = 85°C
0.13
VM = 24 V, IO = 1 A, TJ = 25°C
0.1
VM = 24 V, IO = 1 A, TJ = 85°C
0.13
–40
0.16
0.16
40
Ω
Ω
μA
MOTOR DRIVER
fPWM
Internal current control PWM
frequency
tBLANK
Current sense blanking time
tR
Rise time
30
200
ns
tF
Fall time
30
200
ns
50
kHz
μs
3.75
PROTECTION CIRCUITS
IOCP
Overcurrent protection trip level
tTSD
Thermal shutdown temperature
6
Die temperature
150
6
A
160
180
°C
3
μA
660
685
mV
CURRENT CONTROL
IREF
VREF input current
VREF = 3.3 V
VTRIP
ISENSE trip voltage
VREF = 3.3 V, 100% current setting
Current trip accuracy
(relative to programmed value)
ΔITRIP
AISENSE
6
Current sense amplifier gain
–3
635
VREF = 3.3V , 5% - 34% current setting
–15%
15%
VREF = 3.3 V, 38% - 67% current
setting
–10%
10%
VREF = 3.3 V, 71% - 100% current
setting
–5%
5%
Reference only
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5
V/V
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6.6 Typical Characteristics
7
14
6.5
12
IVMQ (PA)
IVM (mA)
6
5.5
10
5
4
10
8
-40qC
25qC
85qC
125qC
4.5
15
20
25
30
V(VMx) (V)
35
40
45
-40qC
25qC
85qC
125qC
6
10
15
D001
Figure 1. Active Supply Current Over Supply Voltage and
Temperature
20
25
30
V(VMx) (V)
35
40
45
D002
Figure 2. Sleep Current Over Supply Voltage and
Temperature
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7 Detailed Description
7.1 Overview
The DRV8829 is an integrated motor driver solution for bipolar stepper motors or single/dual brushed-DC motors.
The device integrates an NMOS H-bridge and current regulation circuitry. The DRV8829 can be powered with a
supply voltage from 8.2 to 45 V, and is capable of providing an output current up to 5-A peak or 3.5-A rms.
Actual operable rms current will depend on ambient temperature, supply voltage, and PCP ground plane size.
A simple PH/EN interface allows easy interfacing to the controller circuit.
The current regulation is highly configurable, with several decay modes of operation. The decay mode can be
selected as a fixed slow, mixed, or fast decay.
A current scalar feature allows the controller to scale the output current without needing to scale the analog
reference voltage input VREF. The DAC is accessed using digital input pins. This allows the controller to save
power by decreasing the current consumption when not required.
A low-power sleep mode is included which allows the system to save power when not driving the motor.
7.2 Functional Block Diagram
VM
+
0.1 µF
VM
VM
0.1 µF
bulk
VM
1 M
VM
Power
0.1 µF
OUT1
CP2
0.01 µF
1 mA
Charge
Pump
OUT1
CP1
V3P3OUT
3.3-V LDO
Core Logic
Gate
Drive
PWM
0.47 µF
BDC
VM
PHASE
OUT2
ENBL
OUT2
nSLEEP
Control
Inputs
nRESET
I[4:0]
3.3V
DECAY
Analog
Inputs
Overcurrent
RSENSE
VREF
Undervoltage
nFAULT
Output
I[4:0]
Thermal
GND
8
AISEN
+
VREF
-
VREF
ISEN
Protection
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DAC
GND PPAD
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7.3 Feature Description
7.3.1 PWM Motor Drivers
The DRV8829 contains one H-bridge motor driver with current-control PWM circuitry. Figure 3 shows a block
diagram of the motor control circuitry. A bipolar stepper motor is shown, but the driver can also drive a DC motor.
Figure 3. Motor Control Circuitry
There are multiple VM, ISEN, OUT, and VREF pins. All like-named pins must be connected together on the PCB.
7.3.2 Blanking Time
After the current is enabled in the H-bridge, the voltage on the ISEN pin is ignored for a fixed period of time
before enabling the current sense circuitry. This blanking time is fixed at 3.75 μs. The blanking time also sets the
minimum on time of the PWM.
7.3.3 nRESET and nSLEEP Operation
The nRESET pin, when driven active low, resets the internal logic. It also disables the H-bridge drivers. All inputs
are ignored while nRESET is active.
Driving nSLEEP low will put the device into a low-power sleep state. In this state, the H-bridge is disabled, the
gate drive charge pump is stopped, the V3P3OUT regulator is disabled, and all internal clocks are stopped. In
this state all inputs are ignored until nSLEEP returns inactive high. When returning from sleep mode, some time
(approximately 1 ms) needs to pass before the motor driver becomes fully operational. The nRESET and
nSLEEP have internal pulldown resistors of approximately 100 kΩ. These signals need to be driven to logic high
for device operation.
7.3.4 Protection Circuits
The DRV8829 is fully protected against undervoltage, overcurrent and overtemperature events.
7.3.4.1 Overcurrent Protection (OCP)
An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this
analog current limit persists for longer than the OCP time, all FETs in the H-bridge will be disabled and the
nFAULT pin will be driven low. The device will remain disabled until either nRESET pin is applied, or VM is
removed and re-applied.
Overcurrent conditions on both high and low side devices; that is, a short to ground, supply, or across the motor
winding will all result in an overcurrent shutdown. The overcurrent protection does not use the current sense
circuitry used for PWM current control, and is independent of the ISENSE resistor value or VREF voltage.
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Feature Description (continued)
7.3.4.2 Thermal Shutdown (TSD)
If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled and the nFAULT pin will be
driven low. Once the die temperature has fallen to a safe level operation will automatically resume.
7.3.4.3 Undervoltage Lockout (UVLO)
If at any time the voltage on the VM pins falls below the undervoltage lockout threshold voltage, all circuitry in the
device will be disabled and internal logic will be reset. Operation will resume when VM rises above the UVLO
threshold.
7.3.5 Current Regulation
The current through the motor winding is regulated by a fixed-frequency PWM current regulation, or current
chopping. When the H-bridge is enabled, current rises through the winding at a rate dependent on the DC
voltage and inductance of the winding. Once the current hits the current chopping threshold, the bridge disables
the current until the beginning of the next PWM cycle.
For stepping motors, current regulation is normally used at all times, and can changing the current can be used
to microstep the motor. For DC motors, current regulation is used to limit the start-up and stall current of the
motor.
If the current regulation feature is not needed, it can be disabled by connecting the ISENSE pins directly to
ground and the VREF pins to V3P3.
The PWM chopping current in each bridge is set by a comparator which compares the voltage across a current
sense resistor connected to the ISEN pin, multiplied by a factor of 5, with a reference voltage. The reference
voltage is input from the xVREF pins, and is scaled by a 5-bit DAC that allows current settings of zero to 100% in
an approximately sinusoidal sequence.
The full-scale (100%) chopping current is calculated in Equation 1.
VREFX
ICHOP = 5¾
· RISENSE
(1)
Example:
If a 0.25-Ω sense resistor is used and the VREFx pin is 2.5 V, the full-scale (100%) chopping current will be
2.5 V / (5 × 0.25 Ω) = 2 A.
Five input pins (I0 - I4) are used to scale the current in the bridge as a percentage of the full-scale current set by
the VREF input pin and sense resistance. The I0 - I4 pins have internal pulldown resistors of approximately 100
kΩ. The function of the pins is shown in Table 1.
Table 1. Current Scalar Logic
10
I[4..0]
RELATIVE CURRENT
(% FULL-SCALE CHOPPING CURRENT)
0x00h
0% (Bridge disabled)
0x01h
5%
0x02h
10%
0x03h
15%
0x04h
20%
0x05h
24%
0x06h
29%
0x07h
34%
0x08h
38%
0x09h
43%
0x0Ah
47%
0x0Bh
51%
0x0Ch
56%
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Table 1. Current Scalar Logic (continued)
I[4..0]
RELATIVE CURRENT
(% FULL-SCALE CHOPPING CURRENT)
0x0Dh
60%
0x0Eh
63%
0x0Fh
67%
0x10h
71%
0x11h
74%
0x12h
77%
0x13h
80%
0x14h
83%
0x15h
86%
0x16h
88%
0x17h
90%
0x18h
92%
0x19h
94%
0x1Ah
96%
0x1Bh
97%
0x1Ch
98%
0x1Dh
99%
0x1Eh
100%
0x1Fh
100%
7.4 Device Functional Modes
7.4.1 Bridge Control
The PHASE input pin controls the direction of current flow through the H-bridge. The ENBL input pin enables the
H-bridge outputs when active high. Table 2 shows the logic.
Table 2. H-Bridge Logic
ENBL
PHASE
OUT1
OUT2
0
X
Z
Z
1
1
H
L
1
0
L
H
The control inputs have internal pulldown resistors of approximately 100 kΩ.
7.4.2 Decay Mode
During PWM current chopping, the H-bridge is enabled to drive current through the motor winding until the PWM
current chopping threshold is reached. This is shown in Figure 4 as case 1. The current flow direction shown
indicates the state when the PHASE pin is high.
Once the chopping current threshold is reached, the H-bridge can operate in two different states, fast decay or
slow decay.
In fast decay mode, once the PWM chopping current level has been reached, the H-bridge reverses state to
allow winding current to flow in a reverse direction. As the winding current approaches zero, the bridge is
disabled to prevent any reverse current flow. Fast decay mode is shown in Figure 4 as case 2.
In slow decay mode, winding current is recirculated by enabling both of the low-side FETs in the bridge. This is
shown in Figure 4 as case 3.
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Figure 4. Decay Modes
The DRV8829 supports fast decay, slow decay and a mixed decay mode. Slow, fast, or mixed decay mode is
selected by the state of the DECAY pin - logic low selects slow decay, open selects mixed decay operation, and
logic high sets fast decay mode. The DECAY pin has both an internal pullup resistor of approximately 130 kΩ
and an internal pulldown resistor of approximately 80 kΩ. This sets the mixed decay mode if the pin is left open
or undriven.
Mixed decay mode begins as fast decay, but at a fixed period of time (75% of the PWM cycle) switches to slow
decay mode for the remainder of the fixed PWM period.
12
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The DRV8829 is used in brushed motor or stepper control.
8.2 Typical Application
In this application, the DRV8829 will be used to drive a brushed-DC motor. The following design procedure can
be used to configure the DRV8829.
DRV8829PWP
28
1
GND
CP1
I4
CP2
27
26
VM
3
I3
0.1 µF
VCP
25
0.1 µF
4
I2
VM
I1
OUT1
I0
ISEN
NC
OUT2
24
1 M
5
23
100 m
6
7
21
BDC
22
BDC
8
ENBL
OUT2
PHASE
ISEN
DECAY
OUT1
20
9
19
10
18
11
nFAULT
VM
nSLEEP
VREF
17
10 k
0.01 µF
2
VM
12
16
0.1 µF
13
nRESET
VREF
V3P3OUT
GND
15
+
100 µF
14
R1
0.47 µF
R2
Figure 5. Typical Application Schematic
8.2.1 Design Requirements
Table 3 gives design input parameters for system design.
Table 3. Design Parameters
DESIGN PARAMETER
REFERENCE
EXAMPLE VALUE
Supply voltage
VM
24 V
Motor winding resistance
RL
0.83 Ω
Motor winding inductance
LL
232.5 µH
ITRIP
3.5 A
Target chopping current
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8.2.2 Detailed Design Procedure
The maximum current (ITRIP) is set by the Ix pins, the VREF analog voltage, and the sense resistor value
(RSENSE). When starting a brushed-DC motor, a large inrush current may occur because there is no back-EMF.
Current regulation will act to limit this inrush current and prevent high current on start-up.
VREFX
ICHOP = 5¾
· RISENSE
(2)
Example: If the desired chopping current is 3.5 A
Set RSENSE = 100 mΩ
VREF would have to be 1.75 V.
Create a resistor divider from V3P3OUT (3.3 V) to set VREF ≈ 1.75 V.
Set R2 = 18 kΩ, set R1 = 16 kΩ
8.2.2.1 Sense Resistor
For optimal performance, it is important for the sense resistor to be:
• Surface-mount
• Low inductance
• Rated for high enough power
• Placed closely to the motor driver
The power dissipated by the sense resistor equals Irms² x R. For example, if the rms motor current is 2-A and a
100-mΩ sense resistor is used, the resistor will dissipate 2 A² × 0.1 Ω = 0.4 W. The power quickly increases with
greater current levels.
Resistors typically have a rated power within some ambient temperature range, along with a de-rated power
curve for high ambient temperatures. When a PCB is shared with other components generating heat, margin
should be added. It is always best to measure the actual sense resistor temperature in a final system, along with
the power MOSFETs, as those are often the hottest components.
Because power resistors are larger and more expensive than standard resistors, it is common practice to use
multiple standard resistors in parallel, between the sense node and ground. This distributes the current and heat
dissipation.
14
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8.2.3 Application Curves
Figure 6. Motor Start-up without Current Regulation,
Overcurrent Trips
Figure 7. Motor Start-up With Current Regulation
Figure 8. Motor Start-up With Current Regulation, Motor Reaches Steady State
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9 Power Supply Recommendations
The DRV8829 is designed to operate from an input voltage supply (VM) range from 8.2 V to 45 V. The device
has an absolute maximum rating of 47 V. A 0.1-µF ceramic capacitor rated for VM must be placed at each VM
pin as close to the DRV8829 as possible. In addition, a bulk capacitor must be included on VM.
9.1 Bulk Capacitance Sizing
Having appropriate local bulk capacitance is an important factor in motor drive system design. It is generally
beneficial to have more bulk capacitance, while the disadvantages are increased cost and physical size.
The amount of local capacitance needed depends on a variety of factors, including:
• The highest current required by the motor system.
• The power supply’s capacitance and ability to source current.
• The amount of parasitic inductance between the power supply and motor system.
• The acceptable voltage ripple.
• The type of motor used (Brushed DC, Brushless DC, Stepper).
• The motor braking method.
The inductance between the power supply and motor drive system will limit the rate current can change from the
power supply. If the local bulk capacitance is too small, the system will respond to excessive current demands or
dumps from the motor with a change in voltage. When adequate bulk capacitance is used, the motor voltage
remains stable and high current can be quickly supplied.
The data sheet generally provides a recommended value, but system-level testing is required to determine the
appropriate sized bulk capacitor.
The voltage rating for bulk capacitors should be greater than the operating voltage, to provide margin for cases
when the motor transfers energy to the supply.
Power Supply
Parasitic Wire
Inductance
Motor Drive System
VM
+
±
+
Motor
Driver
GND
Local
Bulk Capacitor
IC Bypass
Capacitor
Figure 9. Setup of Motor Drive System With External Power Supply
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10 Layout
10.1 Layout Guidelines
Each VM terminal must be bypassed to GND using a low-ESR ceramic bypass capacitors with recommended
values of 0.1 μF rated for VM. These capacitors should be placed as close to the VM pins as possible with a
thick trace or ground plane connection to the device GND pin.
The VM pin must be bypassed to ground using a bulk capacitor rated for VM. This component may be an
electrolytic.
A low-ESR ceramic capacitor must be placed in between the CP1 and CP2 pins. TI recommends a value of 0.1
μF rated for VM . Place this component as close to the pins as possible.
A low-ESR ceramic capacitor must be placed in between the VM and VCP pins. TI recommends a value of 0.47
μF rated for 16 V. Place this component as close to the pins as possible. In addition, place a 1 MΩ between VM
and VCP.
Bypass V3P3OUT to ground with a ceramic capacitor rated 6.3 V. Place this bypassing capacitor as close to the
pin as possible.
The current sense resistor should be placed as close as possible to the device pins to minimize trace inductance
between the pin and resistor.
10.2 Layout Example
+
0.1 µF
CP1
GND
CP2
I4
VCP
I3
VM
I2
OUT1
I1
0.1 µF
1 M
RISEN
0.47 µF
0.1 µF
ISEN
I0
OUT2
NC
OUT2
ENBL
ISEN
PHASE
OUT1
DECAY
VM
nFAULT
VREF
nSLEEP
VREF
nRESET
GND
V3P3OUT
0.1 µF
Figure 10. Example Layout
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10.3 Thermal Considerations
The DRV8829 has thermal shutdown (TSD) as described above. If the die temperature exceeds approximately
150°C, the device will be disabled until the temperature drops to a safe level.
Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient
heatsinking, or too high an ambient temperature.
10.4 Power Dissipation
Power dissipation in the DRV8829 is dominated by the power dissipated in the output FET resistance, or RDS(ON).
Average power dissipation when running a stepper motor can be roughly estimated by Equation 3.
PTOT (W)
ª¬RDS(ON),HS (:) RDS(ON),LS (:)º¼ u ª¬IOUT(RMS) (A)º¼
2
where
•
•
•
PTOT is the total power dissipation
RDS(ON) is the resistance of each FET (high-side and low-side)
IOUT(RMS) is the RMS output current being applied to each winding
(3)
IOUT(RMS) is equal to the approximately 0.7x the full-scale output current setting.
The maximum amount of power that can be dissipated in the device is dependent on ambient temperature and
heatsinking.
RDS(ON) increases with temperature, so as the device heats, the power dissipation increases. This must be taken
into consideration when sizing the heatsink.
10.4.1 Heatsinking
The PowerPAD™ package uses an exposed pad to remove heat from the device. For proper operation, this pad
must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane,
this can be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs
without internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area
is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and
bottom layers.
For details about how to design the PCB, refer to TI application report SLMA002, "PowerPAD™ Thermally
Enhanced Package" and TI application brief SLMA004, "PowerPAD™ Made Easy", available at www.ti.com.
In general, the more copper area that can be provided, the more power can be dissipated.
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11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 Trademarks
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
DRV8829PWP
ACTIVE
HTSSOP
PWP
28
50
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 85
DRV8829
DRV8829PWPR
ACTIVE
HTSSOP
PWP
28
2000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 85
DRV8829
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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