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DRV8832
SLVSAB3I – MAY 2010 – REVISED JANUARY 2016
DRV8832 Low-Voltage Motor Driver IC
1 Features
3 Description
•
The DRV8832 provides an integrated motor driver
solution for battery-powered toys, printers, and other
low-voltage or battery-powered motion control
applications. The device has one H-bridge driver, and
can drive one DC motor or one winding of a stepper
motor, as well as other loads like solenoids. The
output driver block consists of N-channel and Pchannel power MOSFETs configured as an H-bridge
to drive the motor winding.
1
•
•
•
•
•
•
•
H-Bridge Voltage-Controlled Motor Driver
– Drives DC Motor, One Winding of a Stepper
Motor, or Other Actuators/Loads
– Efficient PWM Voltage Control for Constant
Motor Speed With Varying Supply Voltages
– Low MOSFET On-Resistance:
HS + LS 450 mΩ
1-A Maximum DC/RMS or Peak Drive Current
2.75-V to 6.8-V Operating Supply Voltage Range
300-nA (Typical) Sleep Mode Current
Reference Voltage Output
Current Limit Circuit
Fault Output
Thermally-Enhanced Surface Mount Packages
2 Applications
•
•
Provided with sufficient PCB heatsinking, the
DRV8832 can supply up to 1 A of DC/RMS or peak
output current. The device operates on power supply
voltages from 2.75 V to 6.8 V.
To maintain constant motor speed over varying
battery voltages while maintaining long battery life, a
PWM voltage regulation method is provided. An input
pin allows programming of the regulated voltage. A
built-in voltage reference output is also provided.
Internal protection functions are provided for
overcurrent protection, short-circuit protection,
undervoltage
lockout,
and
overtemperature
protection.
Battery-Powered:
– Printers
– Toys
– Robotics
– Cameras
– Phones
Small Actuators, Pumps, and so forth
The DRV8832 also provides a current limit function to
regulate the motor current during conditions like
motor start-up or stall, as well as a fault output pin to
signal a host processor of a fault condition.
The DRV8832 is available in a tiny 3-mm × 3-mm 10pin VSON package and MSOP PowerPAD™
package (Eco-friendly: RoHS & no Sb/Br).
Device Information(1)
PART NUMBER
DRV8832
PACKAGE
BODY SIZE (NOM)
MSOP PowerPAD (10)
3.00 mm × 3.00 mm
VSON (10)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
2.75V to 6.8V
DRV8832
IN1
IN2
Controller
Brushed DC
Motor Driver
1.3A peak
BDC
Protection
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
DRV8832
SLVSAB3I – MAY 2010 – REVISED JANUARY 2016
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 7
7.1
7.2
7.3
7.4
Overview ................................................................... 7
Functional Block Diagram ......................................... 7
Feature Description................................................... 7
Device Functional Modes........................................ 10
8
Application and Implementation ........................ 11
8.1 Application Information............................................ 11
8.2 Typical Application .................................................. 11
9
Power Supply Recommendations...................... 15
9.1 Bulk Capacitance .................................................... 15
9.2 Power Supervisor.................................................... 15
10 Layout................................................................... 16
10.1 Layout Guidelines ................................................. 16
10.2 Layout Example .................................................... 16
10.3 Thermal Considerations ........................................ 16
11 Device and Documentation Support ................. 18
11.1
11.2
11.3
11.4
11.5
Documentation Support .......................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
18
18
18
18
18
12 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision H (October 2013) to Revision I
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
•
Added VHYS parameter row under the Logic-Level Inputs section in Electrical Characteristics ............................................ 5
•
Changed the paragraph describing the FAULT behavior in Current Limit ........................................................................... 10
•
Updated the paragraphs in Power Dissipation and added Equation 4................................................................................. 16
2
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5 Pin Configuration and Functions
DGQ and DRC Packages
10-Pin MSOP PowerPAD and VSON
Top View
OUT2
ISENSE
OUT1
VCC
GND
1
10
2
9
GND
(PPAD)
3
4
8
7
5
6
IN2
IN1
VREF
VSET
FAULTn
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
FAULTn
6
OD
Fault output
GND
5
—
Device ground
Open-drain output driven low if fault condition present
IN1
9
I
Bridge A input 1
Logic high sets OUT1 high
IN2
10
I
Bridge A input 2
Logic high sets OUT2 high
ISENSE
2
IO
Current sense resistor
Connect current sense resistor to GND. Resistor value
sets current limit level.
OUT1
3
O
Bridge output 1
Connect to motor winding
OUT2
1
O
Bridge output 2
Connect to motor winding
VCC
4
—
Device and motor supply
Bypass to GND with a 0.1-μF (minimum) ceramic
capacitor.
VREF
8
O
Reference voltage output
Reference voltage output
VSET
7
I
Voltage set input
Input voltage sets output regulation voltage
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1) (2)
MIN
MAX
UNIT
Power supply voltage, VCC
–0.3
7
V
Input pin voltage
–0.5
7
V
Peak motor drive output current (3)
Internally limited
A
Continuous motor drive output current (3)
–1
A
Continuous total power dissipation
1
See Thermal Information
TJ
Operating virtual junction temperature
–40
150
°C
Tstg
Storage temperature
–60
150
°C
(1)
(2)
(3)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
Power dissipation and thermal limits must be observed.
6.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
V(ESD)
(1)
(2)
Electrostatic discharge
(1)
UNIT
±2500
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins (2)
V
±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VCC
Motor power supply voltage
IOUT
Continuous or peak H-bridge output current (1)
(1)
NOM
MAX
UNIT
2.75
6.8
V
0
1
A
Power dissipation and thermal limits must be observed.
6.4 Thermal Information
DRV8832
THERMAL METRIC (1)
DGQ (MSOP PowerPAD)
DRC (VSON)
UNIT
10 PINS
10 PINS
RθJA
Junction-to-ambient thermal resistance
69.3
50.2
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
63.5
78.4
°C/W
RθJB
Junction-to-board thermal resistance
51.6
18.8
°C/W
ψJT
Junction-to-top characterization parameter
1.5
1.1
°C/W
ψJB
Junction-to-board characterization parameter
23.2
17.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
9.5
5.1
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.5 Electrical Characteristics
VCC = 2.75 V to 6.8 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLIES
IVCC
VCC operating supply current
VCC = 5 V
1.4
2
mA
IVCCQ
VCC sleep mode supply current
VCC = 5 V, TA = 25°C
0.3
1
μA
VCC undervoltage lockout
voltage
VCC rising
2.575
2.75
VCC falling
2.47
VUVLO
V
LOGIC-LEVEL INPUTS
VIL
Input low voltage
0.25 × VCC
VHYS
Input hysteresis
VIH
Input high voltage
IIL
Input low current
VIN = 0
IIH
Input high current
VIN = 3.3 V
0.08 × Vcc
V
V
0.5 × VCC
V
–10
10
μA
50
μA
LOGIC-LEVEL OUTPUTS (FAULTn)
VOL
Output low voltage
VCC = 5 V, IOL = 4 mA (1)
0.5
VCC = 5 V, I
O
= 0.8 A, TJ = 85°C
290
VCC = 5 V, I
O
= 0.8 A, TJ = 25°C
250
VCC = 5 V, I
O
= 0.8 A, TJ = 85°C
230
VCC = 5 V, I
O
= 0.8 A, TJ = 25°C
200
V
H-BRIDGE FETS
RDS(ON)
RDS(ON)
IOFF
HS FET on resistance
LS FET on resistance
Off-state leakage current
400
320
mΩ
mΩ
–20
20
μA
ns
MOTOR DRIVER
tR
Rise time
VCC = 3 V, load = 4 Ω
50
300
tF
Fall time
VCC = 3 V, load = 4 Ω
50
300
fSW
Internal PWM frequency
44.5
ns
kHz
PROTECTION CIRCUITS
IOCP
Overcurrent protection trip level
tOCP
OCP deglitch time
TTSD
Thermal shutdown temperature
1.3
3
Die temperature (1)
A
μs
2
150
160
180
°C
1.235
1.285
1.335
V
VOLTAGE CONTROL
VREF
Reference output voltage
ΔVLINE
Line regulation
VCC = 3.3 V to 6 V, VOUT = 3 V (1)
IOUT = 500 mA
ΔVLOAD
Load regulation
VCC = 5 V, VOUT = 3 V
IOUT = 200 mA to 800 mA (1)
±1%
±1%
CURRENT LIMIT
VILIM
Current limit sense voltage
tILIM
Current limit fault deglitch time
RISEN
Current limit set resistance
(external resistor value)
(1)
160
200
240
275
0
mV
ms
1
Ω
Not production tested.
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100%
95%
90%
85%
80%
75%
70%
65%
60%
55%
50%
0.2
100%
90%
80%
70%
EFFICENCY
EFFICIENCY
6.6 Typical Characteristics
60%
50%
40%
30%
Linear Regulator
20%
DRV8832
0.4
0.6
10%
0.8
0%
0.5
LOAD - A
1.5
2.5
3.5
4.5
5.5
VOUT - V
Figure 2. Efficiency vs Output Voltage
(VIN = 5 V, IOUT = 500 mA)
Figure 1. Efficiency vs Load Current
(VIN = 5 V, VOUT = 3 V)
2000
550
±40ƒC
1800
±40°C
25°C
85°C
500
25°C
450
85°C
IVCCQ (nA)
IVCC (uA)
400
1600
1400
350
300
250
200
1200
150
100
1000
50
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
VCC (V)
2.0
2.5
3.5
4.0
4.5
5.0
5.5
VVcc (V)
Figure 3. IVCC vs VVCC
6.0
C002
Figure 4. IVCCQ vs VVCC
750
750
±40ƒC
25°C
2.75 V
700
85°C
650
RDS(ON) HS + LS) (mŸ)
RDS(ON) (HS + LS) (mŸ)
3.0
C001
550
450
650
5V
6V
600
550
500
450
400
350
350
3.0
3.5
4.0
4.5
5.0
VCC (V)
5.5
6.0
C003
25°C
85°C
Temperature (ƒC)
C004
Figure 6. RDS(ON) HS + LS vs Temperature
Figure 5. RDS(ON) vs VVCC
6
±40ƒC
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7 Detailed Description
7.1 Overview
The DRV8832 is an integrated motor driver solution used for brushed motor control. The device integrates one
H-bridge, current regulation circuitry, and a PWM voltage regulation method.
Using the PWM voltage regulation allows the motor to maintain the desired speed as VCC changes. Battery
operation is an example of using this feature. When the battery is new or fully charged VCC will be higher than
when the battery is old or partially discharged. The speed of the motor will vary based on the voltage of the
battery. By setting the desired voltage across the motor at a lower voltage, a fully charged battery will use less
power and spin the motor at the same speed as a battery that has been partially discharged.
7.2 Functional Block Diagram
Battery
VCC
VCC
VCC
OCP
Integ.
Comp
VREF
Ref
Gate
Drive
+
OUT1
VSET
DCM
VCC
Logic
IN1
OCP
IN2
Gate
Drive
OverTemp
FAULTn
OUT2
Osc
Current
Sense
ISENSE
GND
7.3 Feature Description
7.3.1 PWM Motor Driver
The DRV8832 contains an H-bridge motor driver with PWM voltage-control circuitry with current limit circuitry.
Figure 7 shows a block diagram of the motor control circuitry.
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Feature Description (continued)
VCC
VCC
OCP
IN1
OUT 1
IN2
Predrive
PWM
DCM
OUT2
VSET
+
COMP
OCP
/4
Integrator
DIFF
+
-
ITRIP
ISEN
COMP
REF
Figure 7. Motor Control Circuitry
7.3.2 Bridge Control
The IN1 and IN2 control pins enable the H-bridge outputs. Table 1 shows the logic:
Table 1. H-Bridge Logic
IN1
IN2
OUT1
OUT2
Function
0
0
Z
Z
Sleep/Coast
0
1
L
H
Reverse
1
0
H
L
Forward
1
1
H
H
Brake
When both inputs are low, the output drivers are disabled and the device is placed into a low-power sleep state.
The current limit fault condition (if present) is also cleared. Note that when transitioning from either brake or sleep
mode to forward or reverse, the voltage control PWM starts at zero duty cycle. The duty cycle slowly ramps up to
the commanded voltage. This can take up to 12 ms to go from sleep to 100% duty cycle. Because of this, highspeed PWM signals cannot be applied to the IN1 and IN2 pins. To control motor speed, use the VSET pin as
described below.
Because of the sleep mode functionality described previously, when applying an external PWM to the DRV8832,
hold one input logic high while applying a PWM signal to the other. If the logic input is held low instead, then the
device will cycle in and out of sleep mode, causing the FAULTn pin to pulse low on every sleep mode exit.
7.3.3 Voltage Regulation
The DRV8832 provides the ability to regulate the voltage applied to the motor winding. This feature allows
constant motor speed to be maintained even when operating from a varying supply voltage such as a
discharging battery.
The DRV8832 uses a pulse-width modulation (PWM) technique instead of a linear circuit to minimize current
consumption and maximize battery life.
8
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The circuit monitors the voltage difference between the output pins and integrates it, to get an average DC
voltage value. This voltage is divided by 4 and compared to the VSET pin voltage. If the averaged output voltage
(divided by 4) is lower than VSET, the duty cycle of the PWM output is increased; if the averaged output voltage
(divided by 4) is higher than VSET, the duty cycle is decreased.
During PWM regulation, the H-bridge is enabled to drive current through the motor winding during the PWM on
time. This is shown in the diagram below as case 1. The current flow direction shown indicates the state when
IN1 is high and IN2 is low.
Note that if the programmed output voltage is greater than the supply voltage, the device will operate at 100%
duty cycle and the voltage regulation feature will be disabled. In this mode the device behaves as a conventional
H-bridge driver.
During the PWM off time, winding current is recirculated by enabling both of the high-side FETs in the bridge as
shown in Figure 8.
VCC
2
1
OUT1
Shown with
OUT2
IN1=1, IN2=0
1 PWM on
2 PWM off
Figure 8. Voltage Regulation
7.3.4 Reference Output
The DRV8832 includes a reference voltage output that can be used to set the motor voltage. Typically for a
constant-speed application, VSET is driven from VREF through a resistor divider to provide a voltage equal to
1/4 the desired motor drive voltage.
For example, if VREF is connected directly to VSET, the voltage will be regulated at 5.14 V. If the desired motor
voltage is 3 V, VREF should be 0.75 V. This can be obtained with a voltage divider using 53 kΩ from VREF to
VSET, and 75 kΩ from VSET to GND.
7.3.5 Current Limit
A current limit circuit is provided to protect the system in the event of an overcurrent condition, such as what
would be encountered if driving a DC motor at start-up or with an abnormal mechanical load (stall condition).
The motor current is sensed by monitoring the voltage across an external sense resistor. When the voltage
exceeds a reference voltage of 200 mV for more than approximately 3 µs, the PWM duty cycle is reduced to limit
the current through the motor to this value. This current limit allows for starting the motor while controlling the
current.
If the current limit condition persists for some time, it is likely that a fault condition has been encountered, such
as the motor being run into a stop or a stalled condition. An overcurrent event must persist for approximately
275 ms before the fault is registered. After approximately 275 ms, a fault signaled to the host by driving the
FAULTn signal low. Operation of the motor driver will continue.
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The current limit fault condition is self-clearing and will be released when the abnormal load (stall condition) is
removed.
The resistor used to set the current limit must be less than 1 Ω. Its value may be calculated using Equation 1:
200 mV
RISENSE = ¾
ILIMIT
where
•
•
RISENSE is the current sense resistor value
ILIMIT is the desired current limit (in mA)
(1)
If the current limit feature is not needed, the ISENSE pin may be directly connected to ground.
7.3.6 Protection Circuits
The DRV8832 is fully protected against undervoltage, overcurrent and overtemperature events.
7.3.6.1 Overcurrent Protection (OCP)
An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this
analog current limit persists for longer than the OCP time, all FETs in the H-bridge will be disabled, and the
FAULTn signal will be driven low. The device will remain disabled until VCC is removed and re-applied.
Overcurrent conditions are sensed independently on both high and low side devices. A short to ground, supply,
or across the motor winding will all result in an overcurrent shutdown. Note that OCP is independent of the
current limit function, which is typically set to engage at a lower current level; the OCP function is intended to
prevent damage to the device under abnormal (for example, short-circuit) conditions.
7.3.6.2 Thermal Shutdown (TSD)
If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled and the FAULTn signal will be
driven low. Once the die temperature has fallen to a safe level operation will automatically resume.
7.3.6.3 Undervoltage Lockout (UVLO)
If at any time the voltage on the VCC pins falls below the undervoltage lockout threshold voltage, all circuitry in
the device will be disabled, the FAULTn signal will be driven low, and internal logic will be reset. Operation will
resume when VCC rises above the UVLO threshold.
Table 2. Device Protection
FAULT
CONDITION
ERROR REPORT
H-BRIDGE
INTERNAL
CIRCUITS
RECOVERY
VCC undervoltage
(UVLO)
VCC < VUVLO
FAULTn
Disabled
Disabled
VCC > VUVLO
Overcurrent (OCP)
IOUT > IOCP
FAULTn
Disabled
Operating
Power Cycle VCC
Thermal Shutdown
(TSD)
TJ > TTSD
FAULTn
Disabled
Operating
TJ < TTSD – THYS
7.4 Device Functional Modes
The DRV8832 is active when either IN1 or IN2 are set to a logic high. Sleep mode is entered when both IN1 and
IN2 are set to a logic low. When in sleep mode, the H-bridge FETs are disabled (Hi-Z).
Table 3. Modes of Operation
FAULT
10
CONDITION
H-BRIDGE
INTERNAL CIRCUITS
Operating
Operating
IN1 or IN2 high
Operating
Sleep mode
IN1 and IN2 low
Disabled
Disabled
Fault encountered
Any fault condition met
Disabled
See Table 2
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The DRV8832 is used in brushed DC applications to provide a constant motor speed over varying voltages. The
following design procedure can be used to configure the DRV8832 for a system with a VCC variance of 4 V to
6 V.
8.2 Typical Application
Figure 9 shows a common application of the DRV8832.
VCC
VCC
OUT1
10 µF
BDC
IN1
IN2
Controller
OUT2
VREF
2.87k
ISENSE
VSET
0.4
10k
FAULTn
GND
PPAD
Figure 9. Typical Application Schematic
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Typical Application (continued)
8.2.1 Design Requirements
Table 4 lists the design parameters for this application.
Table 4. Design Parameters
DESIGN
PARAMETER
REFERENCE
EXAMPLE VALUE
Motor voltage
VCC
4V
Motor RMS current
IRMS
0.3 A
Motor start-up current
ISTART
0.6 A
Motor current trip
point
ILIMIT
0.5 A
8.2.2 Detailed Design Procedure
8.2.2.1 Motor Voltage
The motor voltage to use will depend on the ratings of the motor selected and the desired RPM. A higher voltage
spins a brushed DC motor faster with the same PWM duty cycle applied to the power FETs. A higher voltage
also increases the rate of current change through the inductive motor windings.
For the DRV8832, TI recommends setting a motor voltage at the lowest system VCC. This will maintain a
constant RPM across varying VCC conditions.
For example if the VCC voltage can vary from 4.5 V to 5.5 V, setting the VSET voltage to 1.125 V will
compensate for power supply variation. The DRV8832 will set the motor voltage at 4.5 V, even if VCC is 5.5 V.
8.2.2.2 Motor Current Trip Point
When the voltage on pin ISENSE exceeds VILIM (0.2 V), overcurrent is detected. The RSENSE resistor should be
sized to set the desired ILIMIT level.
RISENSE = 0.2 V / ILIMIT
(2)
To set ILIMIT to 5 A, RISENSE = 0.2 V / 0.5 A = 0.4 Ω.
To prevent false trips, ILIMIT must be higher than regular operating current. Motor current during start-up is
typically much higher than steady-state spinning, because the initial load torque is higher, and the absence of
back-EMF causes a higher voltage and extra current across the motor windings.
It can be beneficial to limit start-up current by using series inductors on the DRV8832 output, as that allows ILIMIT
to be lower, and it may decrease the system’s required bulk capacitance. Start-up current can also be limited by
ramping the forward drive duty cycle.
8.2.2.3 Sense Resistor
For optimal performance, it is important for the sense resistor to be:
• Surface-mount
• Low inductance
• Rated for high enough power
• Placed closely to the motor driver
The power dissipated by the sense resistor equals IRMS2 × R. For example, if peak motor current is 1 A, RMS
motor current is 0.7 A, and a 0.4-Ω sense resistor is used, the resistor will dissipate 0.7 A2× 0.4 Ω = 0.2 W. The
power quickly increases with higher current levels.
Resistors typically have a rated power within some ambient temperature range, along with a derated power curve
for high ambient temperatures. When a PCB is shared with other components generating heat, margin should be
added. It is always best to measure the actual sense resistor temperature in a final system, along with the power
MOSFETs, as those are often the hottest components.
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Because power resistors are larger and more expensive than standard resistors, it is common practice to use
multiple standard resistors in parallel, between the sense node and ground. This distributes the current and heat
dissipation.
8.2.2.4 Low Power Operation
Under normal operation, using sleep mode to minimize supply current should be sufficient.
If desired, power can be removed to the DRV8832 to further decrease supply current. TI recommends removing
power to the FAULTn pullup resistor when removing power to the DRV8832. Removing power from the FAULTn
pullup resistor will eliminate a current path from the FAULTn pin through an ESD protection diode to VCC. TI
also recommends setting both IN1 and IN2 as a logic low when power is removed.
8.2.3 Application Curves
The following scope captures show how the output duty cycle changes to as VCC increases. This allows the
motor to spin at a constant speed as VCC changes. At VCC=3.9V, the output duty cycle is 100% on. As the VCC
voltage increases to greater than 4 V, the output duty cycle begins to decrease. The output duty cycle is shown
at VCC=4.5 V, VCC=5 V and VCC=5.5 V.
• Channel 1 – OUT1: IN1 – Logic Low
• Channel 2 – OUT2: IN2 – Logic High
• Channel 4 – Motor current: VSET – 1 V
• Motor used: NMB Technologies Corporation, PPN7PA12C1
Figure 10. Output Pulse Width Modulating at VCC = 3.9 V
Figure 11. Output Pulse Width Modulating at VCC = 4 V
Figure 12. Output Pulse Width Modulating at VCC = 4.5 V
Figure 13. Output Pulse Width Modulating at VCC = 5 V
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Figure 14. Output Pulse Width Modulating at VCC = 5.5 V
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9 Power Supply Recommendations
9.1 Bulk Capacitance
Having an appropriate local bulk capacitance is an important factor in motor drive system design. It is generally
beneficial to have more bulk capacitance, while the disadvantages are increased cost and physical size.
The amount of local capacitance needed depends on a variety of factors, including:
• The highest current required by the motor system
• The capacitance and ability to source current
• The amount of parasitic inductance between the power supply and motor system
• The acceptable voltage ripple
• The type of motor used (brushed DC, brushless DC, stepper)
• The motor braking method
The inductance between the power supply and the motor drive system limits the rate current can change from
the power supply. If the local bulk capacitance is too small, the system responds to excessive current demands
or dumps from the motor with a change in voltage. When adequate bulk capacitance is used, the motor voltage
remains stable and high current can be quickly supplied.
The data sheet generally provides a recommended value, but system-level testing is required to determine the
appropriate sized bulk capacitor.
Power Supply
Parasitic Wire
Inductance
Motor Drive System
VCC
+
–
+
Motor
Driver
GND
Local
Bulk Capacitor
IC Bypass
Capacitor
Figure 15. Example Setup of Motor Drive System With External Power Supply
The voltage rating for bulk capacitors should be higher than the operating voltage, to provide margin for cases
when the motor transfers energy to the supply.
9.2 Power Supervisor
The DRV8832 is capable of entering a low-power sleep mode by bringing both of the INx control inputs logic low.
The outputs will be disabled Hi-Z.
To exit the sleep mode, bring either or both of the INx inputs logic high. This will enable the H-bridges. When
exiting the sleep mode, the FAULTn pin will pulse low.
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10 Layout
10.1 Layout Guidelines
The VCC pin should be bypassed to GND using low-ESR ceramic bypass capacitors with a recommended value
of 0.1-μF rated for VCC. This capacitor should be placed as close to the VCC pin as possible with a thick trace
or ground plane connection to the device GND pin.
The VCC pin must be bypassed to ground using an appropriate bulk capacitor. This component may be an
electrolytic and should be located close to the DRV8832.
10.2 Layout Example
10 µF
OUT2
IN2
ISENSE
IN1
OUT1
VREF
VCC
VSET
GND
FAULTn
Logic High
Figure 16. Recommended Layout
10.3 Thermal Considerations
The DRV8832 has thermal shutdown (TSD) as described Thermal Shutdown (TSD). If the die temperature
exceeds approximately 160°C, the device will be disabled until the temperature drops to a safe level.
Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient
heatsinking, or too high an ambient temperature.
10.3.1 Power Dissipation
The power dissipation of the DRV8832 is a function of RMS motor current and the each output’s FET resistance
(RDS(ON)).
Power ≈ IRMS2 × (High-Side RDS(ON) + Low-Side RDS(ON))
(3)
For this example, the ambient temperature is 35°C, and the junction temperature reaches 65°C. At 65°C, the
sum of RDS(ON) is about 1 Ω. With an example motor current of 0.8 A, the dissipated power in the form of heat will
be 0.8 A2 × 1 Ω = 0.64 W.
The temperature that the DRV8832 reaches will depend on the thermal resistance to the air and PCB. It is
important to solder the device PowerPAD to the PCB ground plane, with vias to the top and bottom board layers,
dissipate heat into the PCB and reduce the device temperature. In the example used here, the DRV8832 had an
effective thermal resistance RθJA of 47°C/W, and:
TJ = TA + (PO x RθJA) = 35°C + (0.64 W × 47°C/W) = 65°C
(4)
10.3.2 Heatsinking
The PowerPAD™ package uses an exposed pad to remove heat from the device. For proper operation, this pad
must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane,
this can be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs
without internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area
is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and
bottom layers.
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Thermal Considerations (continued)
For details about how to design the PCB, refer to TI application report SLMA002, PowerPAD™ Thermally
Enhanced Package and TI application brief SLMA004, PowerPAD™ Made Easy, available at www.ti.com.
In general, the more copper area that can be provided, the more power can be dissipated.
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
• PowerPAD™ Thermally Enhanced Package SLMA002
• PowerPAD™ Made Easy SLMA004
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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11-Aug-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
DRV8832DGQ
ACTIVE
HVSSOP
DGQ
10
80
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
8832
Samples
DRV8832DGQR
ACTIVE
HVSSOP
DGQ
10
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
8832
Samples
DRV8832DRCR
ACTIVE
VSON
DRC
10
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
8832
Samples
DRV8832DRCT
ACTIVE
VSON
DRC
10
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
8832
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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