DRV8833 Evaluation Module
User's Guide
Literature Number: SLVU498
July 2011
2
Copyright © 2011, Texas Instruments Incorporated
SLVU498 – July 2011
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Contents
1
2
3
4
Introduction ........................................................................................................................
Schematic ..........................................................................................................................
PCB ...................................................................................................................................
Connectors .........................................................................................................................
4
5
6
7
............................................................................................................
4.2
Power and Control Signals .............................................................................................
Jumpers .............................................................................................................................
5.1
Voltage Regulator (JP6) ................................................................................................
5.2
nSLEEP (JP5) ...........................................................................................................
5.3
xINx Signals (JP1, JP2, JP3 and JP4) ...............................................................................
Switches (AIN1, AIN2, BIN1 and BIN2) ...................................................................................
LED (D1) ............................................................................................................................
Test Points .........................................................................................................................
Current Sense Resistors (R5, R6) ..........................................................................................
7
4.1
5
6
7
8
9
Motor Outputs
SLVU498 – July 2011
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Table of Contents
Copyright © 2011, Texas Instruments Incorporated
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7
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7
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7
8
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3
Introduction
1
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Introduction
This document is provided with the DRV8833 customer evaluation module (EVM) as a supplement to the
DRV8833 datasheet. It details the hardware implementation of the EVM.
4
Contents
Copyright © 2011, Texas Instruments Incorporated
SLVU498 – July 2011
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SLVU498 – July 2011
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1
Copyright © 2011, Texas Instruments Incorporated
DRV8833
1
nFAULT
PCB1
D1
R9
499
1
4
3
2
1
GND
R5
.15
AISEN
Header4
J2
1
AOUT1
AOUT2
BOUT2
BOUT1
VDD
JP5
1
GND
R6
.15
BISEN
nSLEEP
1
BOUT1
2
nSLEEP
AOUT1
AISEN
AOUT2
BOUT2
BISEN
BOUT1
nFAULT
1
2
3
4
5
6
7
8
3
U1 may get hot
DRV8833
AIN1
AIN2
VINT
GND
VM
VCP
BIN2
BIN1
nSLEEP
TP11
nSLEEP
AOUT1
AISEN
AOUT2
BOUT2
BISEN
BOUT1
nFAULT
U1
nFAULT
TP10
16
15
14
13
12
11
10
9
AIN1
AIN2
VINT
GND
VM
VCP
BIN2
BIN1
C2 .2 2 uF
C3 01 . uF
1
VM
VINT
TP13
1
VM
TP12
4
BIN1
TP14
VDD
GND
GND
VDD
GND
BIN2
TP15
AIN1
TP16
AIN1
BIN2
1 S1
NO
2
COMMON
3
NC
AIN2
1 S3
NO
2
COMMON
3
NC
BIN1
BIN1
AIN2
1 S2
NO
2
COMMON
3
NC
AIN1
1 S4
NO
2
COMMON
3
NC
BIN2
GND
VDD
VDD
BIN1
D
C
B
A
1
BISEN
TP8
1
BOUT2
TP7
1
BOUT1
TP6
1
AISEN
TP4
PWR_PAD
AOUT2
TP3
1
AOUT1
TP2
4
1
3
1
2
AIN2
TP17
3
3
1
VCP
TP1
AOUT1
0
AOUT2
3
JP2
AIN1
3
JP3
BIN1
1
1
3
JP1
AIN2
3
JP4
BIN2
3
3
2
2
AISEN
2
nFAU LT
2
nSLEEP
2
BIN2
2
AIN1
2
AIN2
2
5
1
1
1
1
5
AIN_1
AIN_2
BIN_2
BIN_1
C6
1uF
C11
VM
3
2
1
nFAULT
VDD
C1
10uF
VOUT
R
4
5
C9
.1uF
Volt_RegLP2985
ON BYPASS
GND
VIN
REG1
Header8
1
2
3
4
5
6
7
8
J1
VM
6
6
of
S
andSe ttings\..\Mimas_CustomerEVM_A1.SchDoc
DrawnBy:
JP6
VM
100uF
GND
Number e vision
GND
Date: /29/2011
6 heet
File: :\Documents
C
B
Size
Title
1
1
GND
GND
TP9
GND
TP5
1
C5
.01uF
VDD
C4
2.2uF
D
C
B
A
2
1
1
www.ti.com
Schematic
Schematic
VINT
BISEN
BOUT2
VCP
Contents
5
VDD
PCB
www.ti.com
3
PCB
6
Contents
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SLVU498 – July 2011
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Connectors
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4
Connectors
4.1
Motor Outputs
The connector J2 should be connected to the motor terminals. Each pin in this terminal is labeled on the
EVM itself as AOUT1, AOUT2, BOUT1 and BOUT2. The polarity of these connections will affect the
direction of the motor in the case of a brushed DC motor. In case of a stepper motor, one winding should
be connected to AOUT1 and AOUT2, while the other should be connected to the outputs BOUT1 and
BOUT2. Refer the datasheet for further information.
4.2
Power and Control Signals
The power and control signals for the DRV8833 are applied through the connector J1. Each pin in the
connector is labeled on the EVM. Check the schematic for further clarification. The control signals for
AIN1, AIN2, BIN1 and BIN2 can also be generated on board. Refer the Jumpers section in this user guide.
The connector J1 also outputs the nFAULT signal from the IC and the VDD (5 V) generated from the
on-board voltage regulator. These signals are labeled on the EVM silkscreen.
Apply a power of 2.7 V – 10.8 V between VM and GND on J1. Be sure to observe the correct polarity.
5
Jumpers
5.1
Voltage Regulator (JP6)
For the purpose of easy evaluation, a voltage regulator is provided on the DRV8833EVM. This regulator
regulates the VM voltage down to 5 V if VM is greater than 5 V and maintains VM if VM is less than 5 V. If
jumper JP6 is left shunted, the VDD signal on the board is provided by this regulator. It is 5 V and can
drive up to 150 mA. This signal is used to light up the nFAULT LED, drive the nSLEEP signal and
generates the HI signal for the switches AIN1, AIN2, BIN1 and BIN2. If the sleep current of the DRV8833
is being evaluated, leave this shunt off the board. This would make sure that the current measurement
through VM doesn’t include the current to the voltage regulator.
5.2
nSLEEP (JP5)
If this jumper is shunted, the 5 V generated from the on-board voltage regulator is connected to the
nSLEEP pin. This ensures the part doesn’t enter the SLEEP mode. If the SLEEP mode is not being
evaluated, then the Jumper can be left shunted. If the SLEEP mode is being controlled externally through
any controller, then disconnect this jumper and connect the nSLEEP signal from the external controller
directly to the test point – nSLEEP.
5.3
xINx Signals (JP1, JP2, JP3 and JP4)
Jumpers JP1, JP2, JP3 and JP4 are used to select the source of the control signals AIN2, AIN1, BIN1 and
BIN2 respectively. By placing a shunt between positions 1-2, the source of these control signals are
routed to the connector J1. This connection allows the user to control these signals through an external
controller.
If the shunt is placed between positions 2-3, then the source of these control signals are routed to the
switches AIN1, AIN2, BIN1 and BIN2. Refer to the section on the Switches for more information.
6
Switches (AIN1, AIN2, BIN1 and BIN2)
When the jumpers JP1, JP2, JP3 and JP4 are set such that the control signals AIN1, AIN2, BIN1 and
BIN2 are routed to the switches, these switches can be used to control the state of these input signals.
The positions are labeled appropriately as HI and LO. LO is GND and HI is VDD (5 V). The state of the
motor outputs for various input combinations can be inferred from the datasheet.
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Contents
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7
LED (D1)
7
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LED (D1)
The diode D1 indicates the status of the nFAULT signal. When there is a FAULT condition on the
DRV8833, this LED lights up. The two possible fault conditions are over current and over temperature.
Refer to the schematic / datasheet for more information.
8
Test Points
Kelvin connections are provided for all pins of DRV8833. They are appropriately labeled on the EVM.
These test points can be used to measure the status of the pin or can be connected to the Sense of the
controlling instrument.
9
Current Sense Resistors (R5, R6)
R5 and R6 are the current sense resistors directly connected to AISEN and BISEN respectively. The other
side of this resistor is connected to GND. The value of this resistor is chosen to be 0.15 Ω. This value
controls the current through the DRV8833 to be 1.33 A. To change this value of regulating current, this
resistor value must be changed as mentioned in the datasheet.
8
Contents
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SLVU498 – July 2011
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