DS10CP152Q
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SNLS295E – MAY 2008 – REVISED APRIL 2013
DS10CP152Q Automotive 1.5 Gbps 2X2 LVDS Crosspoint Switch
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FEATURES
DESCRIPTION
•
•
The DS10CP152Q is a 1.5 Gbps 2x2 LVDS
crosspoint switch optimized for high-speed signal
routing and switching over lossy FR-4 printed circuit
board backplanes and balanced cables. Fully
differential signal paths ensure exceptional signal
integrity and noise immunity. The non-blocking
architecture allows connections of any input to any
output or outputs.
1
2
•
•
•
•
•
AECQ-100 Grade 3
DC - 1.5 Gbps Low Jitter, Low Skew, Low
Power Operation
Pin Configurable, Fully Differential, NonBlocking Architecture
Wide Input Common Mode Voltage Range
Allows DC-Coupled Interface to LVDS, CML
and LVPECL Drivers
On-Chip 100Ω Input and Output Termination
Minimizes Insertion and Return Losses,
Reduces Component Count and Minimizes
Board Space
8 kV ESD on LVDS I/O Pins Protects Adjoining
Components
Small SOIC-16 Space Saving Package
Wide input common mode range allows the switch to
accept signals with LVDS, CML and LVPECL levels;
the output levels are LVDS. A very small package
footprint requires a minimal space on the board while
the flow-through pinout allows easy board layout.
Each differential input and output is internally
terminated with a 100Ω resistor to lower device return
losses, reduce component count and further minimize
board space.
APPLICATIONS
•
•
•
Automotive Display Applications
Clock and Data Buffering and Muxing
SD/HD SDI Routers
Typical Application
DS10CP152Q
RED
RED
Navigation
Computer
24 TO 1
1 TO 24
GREEN
GREEN
MONITOR
1
BLUE
BLUE
SEL0
DS90UR241Q
DS90UR124Q
SEL1
RED
RED
Entertainment
System
1 TO 24
GREEN
GREEN
24 TO 1
MONITOR
2
BLUE
BLUE
2x2 CROSSPOINT
DS90UR241Q
DS90UR124Q
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
DS10CP152Q
SNLS295E – MAY 2008 – REVISED APRIL 2013
www.ti.com
Block Diagram
SEL1
SEL0
EN0
IN0+
OUT0+
OUT0-
IN02x2
EN1
IN1+
OUT1+
IN1-
OUT1-
Connection Diagram
Figure 1. DS10CP152Q Pin Diagram
PIN DESCRIPTIONS
Pin Name
Pin
Number
I/O, Type
Pin Description
IN0+, IN0- ,
IN1+, IN1-
3, 4,
6, 7
I, LVDS
Inverting and non-inverting high speed LVDS input pins.
OUT0+, OUT0-,
OUT1+, OUT1-
14, 13,
11, 10
O, LVDS
Inverting and non-inverting high speed LVDS output pins.
SEL1, SEL0
1, 2
I, LVCMOS
Switch configuration pins.
EN0, EN1
16, 15
I, LVCMOS
Output enable pins.
NC
8, 9
NC
"NO CONNECT" pins.
VDD
5
Power
Power supply pin.
GND
12
Power
Ground pin.
2
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SNLS295E – MAY 2008 – REVISED APRIL 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
−0.3V to +4V
Supply Voltage
−0.3V to (VCC + 0.3V)
LVCMOS Input Voltage
−0.3V to +4V
LVDS Input Voltage
Differential Input Voltage |VID|
1V
−0.3V to (VCC + 0.3V)
LVDS Output Voltage
LVDS Differential Output Voltage
0V to 1V
LVDS Output Short Circuit Current Duration
5 ms
Junction Temperature
+105°C
−65°C to +150°C
Storage Temperature Range
Lead Temperature Range
Soldering (4 sec.)
+260°C
Maximum Package Power Dissipation at 25°C
D0016A Package
1.10W
Derate D0016A Package
13.75 mW/°C above +25°C
Package Thermal Resistance
θJA
+72.7°C/W
θJC
+41.2°C/W
ESD Susceptibility
HBM
MM
(3)
CDM
(1)
(2)
(3)
(4)
(5)
≥8 kV
(4)
≥250V
(5)
≥1250V
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Human Body Model, applicable std. JESD22-A114C
Machine Model, applicable std. JESD22-A115-A
Field Induced Charge Device Model, applicable std. JESD22-C101-C
Recommended Operating Conditions
Supply Voltage (VCC)
Receiver Differential Input Voltage (VID)
Operating Free Air Temperature (TA)
Min
Typ
Max
Units
3.0
3.3
3.6
V
1
V
+25
+85
°C
0
−40
DC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
(1) (2) (3)
Min
Typ
Max
Units
LVCMOS DC SPECIFICATIONS
VIH
High Level Input Voltage
2.0
VDD
V
VIL
Low Level Input Voltage
GND
0.8
V
(1)
(2)
(3)
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
except VOD and ΔVOD.
Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions
at the time of product characterization and are not ensured.
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DC Electrical Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified. (1)(2)(3)
Symbol
Parameter
Conditions
IIH
High Level Input Current
VIN = 3.6V
VCC = 3.6V
IIL
Low Level Input Current
VIN = GND
VCC = 3.6V
VCL
Input Clamp Voltage
ICL = −18 mA, VCC = 0V
Min
Typ
Max
Units
40
175
250
μA
±1
±10
μA
−0.9
−1.5
V
1
V
+100
mV
LVDS INPUT DC SPECIFICATIONS
VID
Input Differential Voltage
0
VTH
Differential Input High Threshold
VTL
Differential Input Low Threshold
VCMR
Common Mode Voltage Range
VID = 100 mV
IIN
Input Current
VIN = 3.6V or 0V
VCC = 3.6V or 0V
±1
CIN
Input Capacitance
Any LVDS Input Pin to GND
1.7
pF
RIN
Input Termination Resistor
Between IN+ and IN-
100
Ω
VCM = +0.05V or VCC-0.05V
0
−100
0
0.05
mV
VCC 0.05
V
±10
μA
LVDS OUTPUT DC SPECIFICATIONS
VOD
Differential Output Voltage
ΔVOD
Change in Magnitude of VOD for Complimentary
Output States
250
VOS
Offset Voltage
ΔVOS
Change in Magnitude of VOS for Complimentary
Output States
IOS
Output Short Circuit Current
RL = 100Ω
-35
1.05
(4)
350
RL = 100Ω
1.2
-35
450
mV
35
mV
1.375
V
35
mV
OUT to GND
-23
-55
mA
OUT to VCC
8
55
mA
COUT
Output Capacitance
Any LVDS Output Pin to GND
1.2
pF
ROUT
Output Termination Resistor
Between OUT+ and OUT-
100
Ω
SUPPLY CURRENT
ICC
Supply Current
EN0 = EN1 = H
58
70
mA
ICCZ
Outputs Powered Down Supply Current
EN0 = EN1 = L
25
30
mA
Typ
Max
Units
440
650
ps
400
650
ps
40
120
ps
(4)
Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
(1) (2) (3)
Min
LVDS OUTPUT AC SPECIFICATIONS
tPLHD
Differential Propagation Delay Low to
High
tPHLD
Differential Propagation Delay High to
Low
tSKD1
Pulse Skew |tPLHD − tPHLD|
(1)
(2)
(3)
(4)
4
RL = 100Ω
(4)
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions
at the time of product characterization and are not ensured.
Specification is ensured by characterization and is not tested in production.
tSKD1, |tPLHD − tPHLD|, Pulse Skew, is the magnitude difference in differential propagation delay time between the positive going edge and
the negative going edge of the same channel.
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AC Electrical Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified. (1)(2)(3)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tSKD2
Channel to Channel Skew
25
60
ps
tSKD3
Part to Part Skew
45
190
ps
tLHT
Rise Time
170
350
ps
tHLT
Fall Time
170
350
ps
tON
Output Enable Time
5
20
μs
tOFF
Output Disable Time
3
12
ns
tSEL
Select Time
3
12
ns
135 MHz
0.5
1.2
ps
311 MHz
0.5
1.2
ps
503 MHz
0.5
1.2
ps
750 MHz
0.5
1.2
ps
270 Mbps
9
38
ps
622 Mbps
7
36
ps
1.06 Gbps
7
34
ps
(5)
(6)
JITTER PERFORMANCE
RL = 100Ω
(3)
tRJ1
tRJ2
tRJ3
VID = 350 mV
VCM = 1.2V
Clock (RZ)
Random Jitter (RMS Value)
tRJ4
tDJ1
tDJ2
tDJ3
VID = 350 mV
VCM = 1.2V
Deterministic Jitter (Peak-to-Peak Value ) Clock (RZ)
tDJ4
tTJ1
tTJ2
tTJ3
Total Jitter (Peak to Peak Value)
VID = 350 mV
VCM = 1.2V
PRBS-23 (NRZ)
tTJ4
(5)
(6)
1.5 Gbps
9
35
ps
270 Mbps
0.01
0.03
UIP-P
622 Mbps
0.01
0.04
UIP-P
1.06 Gbps
0.01
0.05
UIP-P
1.5 Gbps
0.01
0.07
UIP-P
tSKD2, Channel to Channel Skew, is the difference in propagation delay (tPLHD or tPHLD) among all output channels in Broadcast mode
(any one input to all outputs).
tSKD3, Part to Part Skew, is defined as the difference between the minimum and maximum differential propagation delays. This
specification applies to devices at the same VCC and within 5°C of each other within the operating temperature range.
DC Test Circuits
VOH
Power Supply
OUT+
IN+
R
D
RL
Power Supply
IN-
OUTVOL
Figure 2.
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AC Test Circuits and Timing Diagrams
OUT+
IN+
R
Signal Generator
D
RL
IN-
OUT-
Figure 3.
Figure 4.
Figure 5.
FUNCTIONAL DESCRIPTION
The DS10CP152Q is a 1.5 Gbps 2x2 LVDS digital crosspoint switch optimized for high-speed signal routing and
switching over lossy FR-4 printed circuit board backplanes and balanced cables.
Table 1. Switch Configuration Truth Table
SEL1
SEL0
OUT1
OUT0
0
0
IN0
IN0
0
1
IN0
IN1
1
0
IN1
IN0
1
1
IN1
IN1
Table 2. Output Enable Truth Table
6
EN1
EN0
OUT1
OUT0
0
0
Disabled
Disabled
0
1
Disabled
Enabled
1
0
Enabled
Disabled
1
1
Enabled
Enabled
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INPUT INTERFACING
The DS10CP152Q accepts differential signals and allows simple AC or DC coupling. With a wide common mode
range, the DS10CP152Q can be DC-coupled with all common differential drivers (i.e. LVPECL, LVDS, CML).
The following three figures illustrate typical DC-coupled interface to common differential drivers. Note that the
DS10CP152Q inputs are internally terminated with a 100Ω resistor.
LVDS
Driver
DS10CP152
Receiver
100: Differential T-Line
OUT+
IN+
100:
IN-
OUT-
Figure 6. Typical LVDS Driver DC-Coupled Interface to an DS10CP152Q Input
CML3.3V or CML2.5V
Driver
VCC
50:
DS10CP152
Receiver
100: Differential T-Line
50:
OUT+
IN+
100:
IN-
OUT-
Figure 7. Typical CML Driver DC-Coupled Interface to an DS10CP152Q Input
LVPECL
Driver
OUT+
100: Differential T-Line
LVDS
Receiver
IN+
100:
OUT150-250:
IN150-250:
Figure 8. Typical LVPECL Driver DC-Coupled Interface to an DS10CP152Q Input
OUTPUT INTERFACING
The DS10CP152Q outputs signals compliant to the LVDS standard. Its outputs can be DC-coupled to most
common differential receivers. The following figure illustrates typical DC-coupled interface to common differential
receivers and assumes that the receivers have high impedance inputs. While most differential receivers have a
common mode input range that can accomodate LVDS compliant signals, it is recommended to check respective
receiver's data sheet prior to implementing the suggested interface implementation.
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DS10CP152
Driver
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Differential
Receiver
100: Differential T-Line
OUT+
IN+
CML or
LVPECL or
LVDS
100:
100:
IN-
OUT-
Figure 9. Typical DS10CP152Q Output DC-Coupled Interface to an LVDS, CML or LVPECL Receiver
8
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Typical Performance Characteristics
Figure 10. A 270 Mbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:500 ps / DIV
Figure 11. A 622 Mbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:200 ps / DIV
Figure 12. A 1.06 Gbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:200 ps / DIV
Figure 13. A 1.5 Gbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:100 ps / DIV
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REVISION HISTORY
Changes from Revision D (April 2013) to Revision E
•
10
Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 9
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
DS10CP152QMA/NOPB
ACTIVE
SOIC
D
16
250
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 85
DS10CP152
QMA
DS10CP152QMAX/NOPB
ACTIVE
SOIC
D
16
2500
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 85
DS10CP152
QMA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
