DS25CP152Q
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SNLS294E – MAY 2008 – REVISED APRIL 2013
DS25CP152Q Automotive 3.125 Gbps LVDS 2x2 Crosspoint Switch
Check for Samples: DS25CP152Q
FEATURES
DESCRIPTION
•
•
The DS25CP152Q is a 3.125 Gbps 2x2 LVDS
crosspoint switch optimized for high-speed signal
routing and switching over lossy FR-4 printed circuit
board backplanes and balanced cables. Fully
differential signal paths ensure exceptional signal
integrity and noise immunity. The non-blocking
architecture allows connections of any input to any
output or outputs.
1
2
•
•
•
•
AECQ-100 Grade 3
DC - 3.125 Gbps Low Jitter, Low Skew, Low
Power Operation
Pin Configurable, Fully Differential, NonBlocking Architecture
On-chip 100Ω Input and Output Terminations
Minimize Return Losses, Reduce Component
Count and Minimize Board Space
8 kV ESD on LVDS I/O Pins Protects Adjoining
Components
Small 4 mm x 4 mm WQFN-16 Space Saving
Package
Wide input common mode range allows the switch to
accept signals with LVDS, CML and LVPECL levels;
the output levels are LVDS. A very small package
footprint requires a minimal space on the board while
the flow-through pinout allows easy board layout.
Each differential input and output is internally
terminated with a 100Ω resistor to lower device return
losses, reduce component count and further minimize
board space.
APPLICATIONS
•
•
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Automotive Display Applications
Clock and Data Buffering and Muxing
OC-48 / STM-16
SD/HD/3G HD SDI Routers
Typical Application
DS25CP152Q
RED
RED
Navigation
Computer
24 TO 1
1 TO 24
GREEN
GREEN
MONITOR
1
BLUE
BLUE
SEL0
DS90UR241Q
DS90UR124Q
SEL1
RED
RED
Entertainment
System
1 TO 24
GREEN
GREEN
24 TO 1
MONITOR
2
BLUE
BLUE
2x2 CROSSPOINT
DS90UR241Q
DS90UR124Q
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
DS25CP152Q
SNLS294E – MAY 2008 – REVISED APRIL 2013
www.ti.com
Block Diagram
SEL1
SEL0
EN0
IN0+
OUT0+
OUT0-
IN02X2
EN1
IN1+
OUT1+
IN1-
OUT1-
IN0+
VCC
NC
EN0
EN1
16
15
14
13
Connection Diagram
1
8
SEL1
4
7
IN1-
SEL0
(GND)
6
3
NC
IN1+
5
2
GND
IN0-
DAP
12
OUT0+
11
OUT0-
10
OUT1+
9
OUT1-
Figure 1. DS25CP152Q Pin Diagram
PIN DESCRIPTIONS
Pin Name
Pin
Number
IN0+, IN0- ,
IN1+, IN1-
I/O, Type
Pin Description
1, 2,
3, 4
I, LVDS
Inverting and non-inverting high speed LVDS input pins.
OUT0+, OUT0-,
OUT1+, OUT1-
12, 11,
10, 9
O, LVDS
Inverting and non-inverting high speed LVDS output pins.
SEL0, SEL1
7, 8
I, LVCMOS
Switch configuration pins. There is a 20 kΩ pulldown resistor on each pin.
EN0, EN1
14, 13
I, LVCMOS
Output enable pins. There is a 20 kΩ pulldown resistor on each pin.
NC
6, 15
I, LVCMOS
"NO CONNECT" pins.
VDD
16
Power
Power supply pin.
GND
5, DAP
Power
Ground pin and Device Attach Pad (DAP) ground.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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SNLS294E – MAY 2008 – REVISED APRIL 2013
Absolute Maximum Ratings (1) (2)
−0.3V to +4V
Supply Voltage
−0.3V to (VCC + 0.3V)
LVCMOS Input Voltage
−0.3V to +4V
LVDS Input Voltage
Differential Input Voltage |VID|
1.0V
−0.3V to (VCC + 0.3V)
LVDS Output Voltage
LVDS Differential Output Voltage
0V to 1.0V
LVDS Output Short Circuit Current Duration
5 ms
Junction Temperature
+105°C
−65°C to +150°C
Storage Temperature Range
Lead Temperature Range
Soldering (4 sec.)
+260°C
Maximum Package Power Dissipation at 25°C
RGH0016A Package
1.91W
Derate RGH0016A Package
23.9 mW/°C above +25°C
Package Thermal Resistance
θJA
+41.8°C/W
θJC
+6.9°C/W
ESD Susceptibility
HBM
MM
(3)
CDM
(1)
(2)
(3)
(4)
(5)
≥8 kV
(4)
≥250V
(5)
≥1250V
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
Human Body Model, applicable std. JESD22-A114C
Machine Model, applicable std. JESD22-A115-A
Field Induced Charge Device Model, applicable std. JESD22-C101-C
Recommended Operating Conditions
Supply Voltage (VCC)
Receiver Differential Input Voltage (VID)
Operating Free Air Temperature (TA)
Min
Typ
Max
Units
3.0
3.3
3.6
V
0
−40
+25
1
V
+85
°C
DC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
(1) (2) (3)
Min
Typ
Max
Units
V
LVCMOS DC SPECIFICATIONS
VIH
High Level Input Voltage
2.0
VCC
VIL
Low Level Input Voltage
GND
0.8
V
IIH
High Level Input Current
VIN = 3.6V
VCC = 3.6V
175
250
μA
IIL
Low Level Input Current
VIN = GND
VCC = 3.6V
0
±10
μA
(1)
(2)
(3)
40
The Electrical Characteristics tables list ensure specifications under the listed Recommended Operating Conditions except as otherwise
modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not
ensured.
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
except VOD and ΔVOD.
Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operating Conditions
at the time of product characterization and are not ensured.
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DS25CP152Q
SNLS294E – MAY 2008 – REVISED APRIL 2013
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DC Electrical Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified. (1)(2)(3)
Symbol
VCL
Parameter
Conditions
Min
ICL = −18 mA, VCC = 0V
Input Clamp Voltage
Typ
Max
Units
−0.9
−1.5
V
1
V
0
+100
mV
LVDS INPUT DC SPECIFICATIONS
VID
Input Differential Voltage
VTH
Differential Input High Threshold
0
VTL
Differential Input Low Threshold
VCMR
Common Mode Voltage Range
VID = 100 mV
IIN
Input Current
VIN = +3.6V or 0V
VCC = 3.6V or 0V
CIN
Input Capacitance
Any LVDS Input Pin to GND
1.7
pF
RIN
Input Termination Resistor
Between IN+ and IN-
100
Ω
VCM = +0.05V or VCC-0.05V
−100
0
0.05
±1
mV
VCC 0.05
V
±10
μA
LVDS OUTPUT DC SPECIFICATIONS
VOD
Differential Output Voltage
ΔVOD
Change in Magnitude of VOD for Complimentary
Output States
250
VOS
Offset Voltage
ΔVOS
Change in Magnitude of VOS for Complimentary
Output States
IOS
Output Short Circuit Current
RL = 100Ω
-35
1.05
(4)
350
RL = 100Ω
1.2
-35
450
mV
35
mV
1.375
V
35
mV
OUT to GND
-35
-55
mA
OUT to VCC
7
55
mA
COUT
Output Capacitance
Any LVDS Output Pin to GND
1.2
pF
ROUT
Output Termination Resistor
Between OUT+ and OUT-
100
Ω
SUPPLY CURRENT
ICC
Supply Current
EN0 = EN1 = High
64
77
mA
ICCZ
Supply Current with Outputs Disabled
EN0 = EN1 = Low
23
29
mA
Typ
Max
Units
340
500
ps
344
500
ps
(4)
Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified
Symbol
Parameter
Conditions
(1) (2) (3)
Min
LVDS OUTPUT AC SPECIFICATIONS
tPLHD
Differential Propagation Delay Low to
High
tPHLD
Differential Propagation Delay High to
Low
tSKD1
Pulse Skew |tPLHD − tPHLD|
4
35
ps
tSKD2
Channel to Channel Skew
12
40
ps
tSKD3
Part to Part Skew
50
150
ps
(1)
(2)
(3)
(4)
(5)
(6)
4
RL = 100Ω
(4)
(5)
(6)
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions
at the time of product characterization and are not ensured.
Specification is ensured by characterization and is not tested in production.
tSKD1, |tPLHD − tPHLD|, Pulse Skew, is the magnitude difference in differential propagation delay time between the positive going edge and
the negative going edge of the same channel.
tSKD2, Channel to Channel Skew, is the difference in propagation delay (tPLHD or tPHLD) among all output channels in Broadcast mode
(any one input to all outputs).
tSKD3, Part to Part Skew, is defined as the difference between the minimum and maximum differential propagation delays. This
specification applies to devices at the same VCC and within 5°C of each other within the operating temperature range.
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SNLS294E – MAY 2008 – REVISED APRIL 2013
AC Electrical Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified (1)(2)(3)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
65
120
ps
65
120
ps
tLHT
Rise Time
tHLT
Fall Time
tON
Output Enable Time
ENn = LH to output active
7
20
μs
tOFF
Output Disable Time
ENn = HL to output inactive
5
12
ns
tSEL
Select Time
SELn LH or HL to output
3.5
12
ns
VID = 350 mV
VCM = 1.2V
Clock (RZ)
2.5 Gbps
0.5
1
ps
3.125 Gbps
0.5
1
ps
VID = 350 mV
VCM = 1.2V
K28.5 (NRZ)
2.5 Gbps
8
25
ps
3.125 Gbps
3
19
ps
VID = 350 mV
VCM = 1.2V
PRBS-23 (NRZ)
2.5 Gbps
0.04
0.08
UIP-P
3.125 Gbps
0.03
0.09
UIP-P
JITTER PERFORMANCE
tRJ1
tRJ2
tDJ1
tDJ2
tTJ1
tTJ2
(7)
(8)
(9)
RL = 100Ω
(3)
Random Jitter (RMS Value)
(7)
Deterministic Jitter (Peak to Peak)
(8)
Total Jitter (Peak to Peak)
(9)
Measured on a clock edge with a histogram and an accumulation of 1500 histogram hits. Input stimulus jitter is subtracted geometrically.
Tested with a combination of the 1100000101 (K28.5+ character) and 0011111010 (K28.5- character) patterns. Input stimulus jitter is
subtracted algebraically.
Measured on an eye diagram with a histogram and an accumulation of 3500 histogram hits. Input stimulus jitter is subtracted.
DC Test Circuits
VOH
Power Supply
OUT+
IN+
R
D
RL
Power Supply
IN-
OUTVOL
AC Test Circuits and Timing Diagrams
OUT+
IN+
R
Signal Generator
D
IN-
RL
OUT-
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DS25CP152Q
SNLS294E – MAY 2008 – REVISED APRIL 2013
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FUNCTIONAL DESCRIPTION
The DS25CP152Q is a 3.125 Gbps 2x2 LVDS digital crosspoint switch optimized for high-speed signal routing
and switching over lossy FR-4 printed circuit board backplanes and balanced cables.
Switch Configuration Truth Table
S1
S0
OUT1
OUT0
0
0
IN0
IN0
0
1
IN0
IN1
1
0
IN1
IN0
1
1
IN1
IN1
Output Enable Truth Table
EN1
EN0
OUT1
OUT0
0
0
Disabled
Disabled
0
1
Disabled
Enabled
1
0
Enabled
Disabled
1
1
Enabled
Enabled
Input Interfacing
The DS25CP152Q accepts differential signals and allows simple AC or DC coupling. With a wide common mode
range, the DS25CP152Q can be DC-coupled with all common differential drivers (i.e. LVPECL, LVDS, CML).
The following three figures illustrate typical DC-coupled interface to common differential drivers. Note that the
DS25CP152Q inputs are internally terminated with a 100Ω resistor.
LVDS
Driver
DS25CP152
Receiver
100: Differential T-Line
OUT+
IN+
100:
IN-
OUT-
Figure 2. Typical LVDS Driver DC-Coupled Interface to DS25CP152Q Input
CML3.3V or CML2.5V
Driver
VCC
50:
DS25CP152
Receiver
100: Differential T-Line
50:
OUT+
IN+
100:
OUT-
IN-
Figure 3. Typical CML Driver DC-Coupled Interface to DS25CP152Q Input
6
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SNLS294E – MAY 2008 – REVISED APRIL 2013
LVPECL
Driver
OUT+
100: Differential T-Line
LVDS
Receiver
IN+
100:
OUT150-250:
IN150-250:
Figure 4. Typical LVPECL Driver DC-Coupled Interface to DS25CP152Q Input
Output Interfacing
The DS25CP152Q outputs signals that are compliant to the LVDS standard. Its outputs can be DC-coupled to
most common differential receivers. The following figure illustrates typical DC-coupled interface to common
differential receivers and assumes that the receivers have high impedance inputs. While most differential
receivers have a common mode input range that can accommodate LVDS compliant signals, it is recommended
to check the respective receiver's data sheet prior to implementing the suggested interface implementation.
DS25CP152
Driver
Differential
Receiver
100: Differential T-Line
IN+
OUT+
100:
CML or
LVPECL or
LVDS
100:
OUT-
IN-
Figure 5. Typical DS25CP152Q Output DC-Coupled Interface to an LVDS, CML or LVPECL Receiver
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DS25CP152Q
SNLS294E – MAY 2008 – REVISED APRIL 2013
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Typical Performance Characteristics
Figure 6. A 3.125 Gbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:50 ps / DIV
Figure 7. A 2.5 Gbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:75 ps / DIV
60
60
VCC = 3.3V
VCC = 3.3V
40
30
20
10
40
30
20
10
0
0
0
0.66
1.32
1.98
2.64
3.3
0
INPUT COMMON MODE VOLTAGE (V)
Figure 8. Total Jitter as a Function of Input Common Mode
Voltage
8
TA = 25°C
NRZ PRBS-7
50
TA = 25°C
3.125 Gbps
NRZ PRBS-7
VID = 350 mV
TOTAL JITTER (ps)
TOTAL JITTER (ps)
50
0.8
1.6
2.4
3.2
4.0
DATA RATE (Gbps)
Figure 9. Total Jitter as a Function of Data Rate
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SNLS294E – MAY 2008 – REVISED APRIL 2013
REVISION HISTORY
Changes from Revision D (April 2013) to Revision E
•
Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 8
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
DS25CP152QSQ/NOPB
ACTIVE
WQFN
RGH
16
1000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 85
2C152QS
DS25CP152QSQX/NOPB
ACTIVE
WQFN
RGH
16
4500
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 85
2C152QS
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
