DS26LV32ATM/NOPB

DS26LV32AT www.ti.com SNLS128C – APRIL 1999 – REVISED FEBRUARY 2013 DS26LV32AT 3V Enhanced CMOS Quad Differential Line Receiver Check for Samples: DS26LV32AT FEATURES 1 • • 2 • • • • • • • • • • Low Power CMOS Design (30 mW typical) Interoperable with Existing 5V RS-422 Networks Industrial and Military Temperature Range Conforms to TIA/EIA-422-B (RS-422) and ITU-T V.11 Recommendation 3.3V Operation ±7V Common Mode Range @ VID = 3V ±10V Common Mode Range @ VID = 0.2V Receiver OPEN Input Failsafe Feature Guaranteed AC Parameter: – Maximum Receiver Skew: 4 ns – Maximum Transition Time: 10 ns Pin Compatible with DS26C32AT 32 MHz Toggle Frequency > 6.5k ESD Tolerance (HBM) • • Available in SOIC and CLGA Packaging Standard Microcircuit Drawing (SMD) 596298585 DESCRIPTION The DS26LV32A is a high speed quad differential CMOS receiver that meets the requirements of both TIA/EIA-422-B and ITU-T V.11. The CMOS DS26LV32AT features typical low static ICC of 9 mA which makes it ideal for battery powered and power conscious applications. The TRI-STATE enables, EN and EN*, allow the device to be active High or active Low. The enables are common to all four receivers. The receiver output (RO) is guaranteed to be High when the inputs are left open. The receiver can detect signals as low as ±200 mV over the common mode range of ±10V. The receiver outputs (RO) are compatible with TTL and LVCMOS levels. Connection Diagram Top View Figure 1. SOIC Package See Package Numbers D0016A or NAD0016A 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2013, Texas Instruments Incorporated DS26LV32AT SNLS128C – APRIL 1999 – REVISED FEBRUARY 2013 www.ti.com Truth Table (1) Inputs Output EN Enables EN* RI+–RI− RO L H X Z VID ≥ +0.2V H All other combinations of enable inputs (1) (2) VID ≤ −0.2V L Open (2) H L = Logic Low H = Logic High X = Irrelevant Z = TRI-STATE Open, not terminated These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) −0.5V to +7V Supply Voltage (VCC) −0.5V to VCC +0.5V Enable Input Voltage (EN, EN*) Receiver Input Voltage (VID: RI+, RI−) ±14V Receiver Input Voltage (VCM: RI+, RI−) ±14V Receiver Output Voltage (RO) −0.5V to VCC +0.5V Receiver Output Current (RO) ±25 mA Maximum Maximum Package Power Dissipation @ +25°C D0016A Package 1190 mW NAD0016A Package 1087 mW Derate D0016A Package 9.8 mW/°C above +25°C Derate NAD0016A Package 7.3 mW/°C above +25°C −65°C to +150°C Storage Temperature Range Lead Temperature Range Soldering (4 Sec.) +260°C ESD Ratings (HBM, 1.5 kΩ, 100 pF) ≥ 6.5 kV Receiver Inputs and Enables ≥ 2 kV Other Pins (1) (2) “Absolute Maximum ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics specifies conditions of device operation. If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications. Recommended Operating Conditions Min Typ Max Units 3.0 3.3 3.6 V DS26LV32AT −40 +25 +85 °C DS26LV32AW −55 +25 +125 °C Supply Voltage (VCC) Operating Free Air Temperature Range (TA) 2 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LV32AT DS26LV32AT www.ti.com SNLS128C – APRIL 1999 – REVISED FEBRUARY 2013 Electrical Characteristics (1) (2) Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. Parameter VTH Differential Input Threshold Test Conditions VOUT = VOH or VOL VCM = −7V to +7V, TA = -40°C to +85°C VCM = −0.5V to +5.5V, TA = -55°C to +125°C (3) VHY Hysteresis VIH Minimum High Level Input Voltage VIL Maximum Low Level Input Voltage RIN Input Resistance Pin RI+, RI− VIN = −7V, +7V, TA = -40°C to +85°C (Other Input = GND) −200 ±17.5 +200 mV +200 mV -200 TA = -40°C to +85°C V 0.8 5.0 8.5 kΩ VIN = +3V Power On, or VIN = 0.5V VCC = 0V) VIN = −3V 0 −0.43 VIN = −10V 0 −1.26 RI+, RI− TA = -55°C to +125°C (3) VIN = 0V to VCC VOH High Level Output Voltage IOH = −6 mA, VID = +1V High Level Output Voltage 0 1.1 0 0.27 mA −0.02 mA VOL Low Level Output Voltage IOL = +6 mA, VID = −1V IOZ Output TRI-STATE Leakage Current VOUT = VCC or GND ISC Output Short Circuit Current VO = 0V, VID ≥ |200 mV| ICC Power Supply Current No Load, All RI+, R1− = OPEN, EN, EN* = VCC or GND mA mA 0 1.8 mA ±1 μA RO 3 V VCC −0.1 V 0.13 0.5 V ±50 μA −35 −70 mA 9 15 mA 20 mA EN = VIL, EN* = VIH TA = -40°C to +85°C TA = -55°C to +125°C −10 VCC mA -1.8 2.4 (4) mA 0 IOH = −100 μA, VID = +1V IOH = − 100 μA, VID = OPEN 1.8 −2.2 EN, EN* IOH = −6 mA, VID = OPEN V kΩ 5.0 VIN = +10V Input Current mV 2.0 (Other Input = 0V, IEN (2) (3) (4) Units Input Current VIN = 5.5V (1) Max 35 EN, EN* VIN = −0.5V VOH Typ VCM = 1.5V VIN = −0.5V, +5.5V, TA = -55°C to +125°C (Other Input = GND) (3) IIN Min Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VID. All typicals are given for: VCC = +3.3V, TA = +25°C. This parameter does not meet the TIA/EIA-422-B specification. Short one output at a time to ground. Do not exceed package. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LV32AT 3 DS26LV32AT SNLS128C – APRIL 1999 – REVISED FEBRUARY 2013 www.ti.com Switching Characteristics - Industrial (1) (2) Over Supply Voltage and -40°C to +85°C Operating Temperature range, unless otherwise specified. Parameter Test Conditions Typ Max Units 6 17.5 35 ns 6 17.8 35 ns tPHL Propagation Delay High to Low tPLH Propagation Delay Low to High tr Rise Time (20% to 80%) 4.1 10 ns tf Fall Time (80% to 20%) 3.3 10 ns tPHZ Disable Time 40 ns tPLZ Disable Time 40 ns tPZH Enable Time 40 ns tPZL Enable Time tSK1 Skew, |tPHL − tPLH| tSK2 Skew, Pin to Pin CL = 50 pF, VCM = 1.5V (Figure 4 and Figure 5) (3) 40 ns 0.3 4 ns 0.6 4 ns 7 17 (2) Skew, Part to Part fMAX Maximum Operating Frequency (3) (4) (5) CL = 15 pF, VCM = 1.5V (4) tSK3 (1) (2) CL = 15 pF, VCM = 1.5V (Figure 2 and Figure 3) Min (5) CL = 15 pF, VCM = 1.5V 32 ns MHz All typicals are given for: VCC = +3.3V, TA = +25°C. tSK3 is the difference in propagation delay times between any channels of any devices. This specification (maximum limit) applies to devices within VCC ±0.1V of one another, and a Delta TA = ±5°C (between devices) within the operating temperature range. This parameter is guaranteed by design and characterization. tSK1 is the |tPHL – tPLH| of a channel. tSK2 is the maximum skew between any two channels within a device, either edge. All channels switching, Output Duty Cycle criteria is 40%/60% measured at 50%. Input = 1V to 2V, 50% Duty Cycle, tr/tf ≤ 5 ns. This parameter is guaranteed by design and characterization. Switching Characteristics - Military Over Supply Voltage and -55°C to +125°C Operating Temperature range, unless otherwise specified. Parameter Test Conditions Min Max Units 6 45 ns 6 45 ns 50 ns 50 ns Enable Time 50 ns Enable Time 50 ns 6 ns 6 ns tPHL Propagation Delay High to Low tPLH Propagation Delay Low to High tPHZ Disable Time tPLZ Disable Time tPZH tPZL CL = 50 pF, VCM = 1.5V (Figure 4 and Figure 5) tSK1 Skew, |tPHL − tPLH| tSK2 Skew, Pin to Pin (1) (2) 4 CL = 50 pF, VCM = 1.5V (Figure 2 and Figure 3) (1) CL = 50 pF, VCM = 1.5V (2) tSK1 is the |tPHL – tPLH| of a channel. tSK2 is the maximum skew between any two channels within a device, either edge. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LV32AT DS26LV32AT www.ti.com SNLS128C – APRIL 1999 – REVISED FEBRUARY 2013 PARAMETER MEASUREMENT INFORMATION A. Generator waveform for all tests unless otherwise specified: f = 1 MHz, Duty Cycle = 50%, ZO = 50Ω, tr ≤ 10 ns, tf ≤ 10 ns. B. CL includes probe and jig capacitance. Figure 2. Receiver Propagation Delay and Transition Time Test Circuit A. Generator waveform for all tests unless otherwise specified: f = 1 MHz, Duty Cycle = 50%, ZO = 50Ω, tr ≤ 10 ns, tf ≤ 10 ns. B. CL includes probe and jig capacitance. C. For military grade product, tr ≤ 6ns and tf ≤ 6ns. D. For military grade product the measure point is 1/2 VCC for tPLH, tPHL, tPZL, and tPZH. Figure 3. Receiver Propagation Delay and Transition Time Waveform Figure 4. Receiver TRI-STATE Test Circuit Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LV32AT 5 DS26LV32AT SNLS128C – APRIL 1999 – REVISED FEBRUARY 2013 www.ti.com A. Generator waveform for all tests unless otherwise specified: f = 1 MHz, Duty Cycle = 50%, ZO = 50Ω, tr ≤ 10 ns, tf ≤ 10 ns. B. CL includes probe and jig capacitance. C. For military grade product, tr ≤ 6ns and tf ≤ 6ns. D. For military grade product the measure point is 1/2 VCC for tPLH, tPHL, tPZL, and tPZH. Figure 5. Receiver TRI-STATE Output Enable and Disable Waveforms 6 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LV32AT DS26LV32AT www.ti.com SNLS128C – APRIL 1999 – REVISED FEBRUARY 2013 TYPICAL APPLICATION INFORMATION General application guidelines and hints for differential drivers and receivers may be found in the following application notes: • AN-214 • AN-457 • AN-805 • AN-847 • AN-903 • AN-912 • AN-916 Power Decoupling Recommendations: Bypass caps must be used on power pins. High frequency ceramic (surface mount is recommended) 0.1 μF in parallel with 0.01 μF at the power supply pin. A 10 μF or greater solid tantalum or electrolytic should be connected at the power entry point on the printed circuit board. RT is optional although highly recommended to reduce reflection Figure 6. Typical Receiver Connections Figure 7. Typical Receiver Output Waveforms Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LV32AT 7 DS26LV32AT SNLS128C – APRIL 1999 – REVISED FEBRUARY 2013 www.ti.com Figure 8. Typical Receiver Input Circuit Figure 9. Typical ICC vs Frequency Figure 10. Receiver IIN vs VIN (Power On or Power Off) 8 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LV32AT DS26LV32AT www.ti.com SNLS128C – APRIL 1999 – REVISED FEBRUARY 2013 Figure 11. IOL vs VOL Figure 12. IOH vs VOH Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LV32AT 9 DS26LV32AT SNLS128C – APRIL 1999 – REVISED FEBRUARY 2013 www.ti.com REVISION HISTORY Changes from Revision B (February 2013) to Revision C • 10 Page Changed layout of National Data Sheet to TI format ............................................................................................................ 9 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LV32AT PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) DS26LV32ATM/NOPB ACTIVE SOIC D 16 48 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 DS26LV32A TM DS26LV32ATMX/NOPB ACTIVE SOIC D 16 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 DS26LV32A TM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of