DS3486
www.ti.com
SNLS354D – MAY 1998 – REVISED APRIL 2013
DS3486 Quad RS-422, RS-423 Line Receiver
Check for Samples: DS3486
FEATURES
DESCRIPTION
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Texas Instruments' quad RS-422, RS-423 receiver
features four independent receivers which comply
with EIA Standards for the electrical characteristics of
balanced/unbalanced voltage digital interface circuits.
Receiver outputs are 74LS compatible, TRI-STATE
structures which are forced to a high impedance state
when the appropriate output control pin reaches a
logic zero condition. A PNP device buffers each
output control pin to assure minimum loading for
either logic one or logic zero inputs. In addition, each
receiver has internal hysteresis circuitry to improve
noise margin and discourage output instability for
slowly changing input waveforms.
1
2
Four Independent Receivers
TRI-STATE Outputs
Internal Hysteresis −140 mV (typ)
Fast Propagation Times −19 ns (typ)
TTL Compatible Outputs
5V Supply
Pin Compatible and Interchangeable with
MC3486
Block and Connection Diagrams
Figure 1. Dual-In-Line Package
Top View
D-16 (SOIC) Package or NFG0016E (PDIP)
Package
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2013, Texas Instruments Incorporated
DS3486
SNLS354D – MAY 1998 – REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Power Supply Voltage, VCC
8V
Input Common-Mode Voltage, VICM
±25V
Input Differential Voltage, VID
±25V
TRI-STATE Control Input Voltage, VI
8V
Output Sink Current, IO
50 mA
−65°C to +150°C
Storage Temperature, TSTG
Maximum Power Dissipation
(3)
at 25°C
Molded PDIP Package
1362 mW
SOIC Package
1002 mW
SOIC Package Thermal Resistance
θJA
+124.5°C/W
θJC
+41.2°C/W
(1)
“Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be ensured. They are not meant to imply
that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device
operation.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
Derate PDIP molded package 10.2 mW/°C above 25°C. Derate SOIC package 8.01 mW/°C above 25°C.
(2)
(3)
Operating Conditions
Max
Min
Power Supply Voltage, VCC
4.75
5.25
V
Operating Temperature, TA
0
70
°C
−7.0
7.0
V
Input Common-Mode Voltage
Units
Range, VICR
Electrical Characteristics
(1)
(Unless otherwise noted, minimum and maximum limits apply over recommended temperature and power supply voltage
ranges. Typical values are for TA = 25°C, VCC = 5V and VIC = 0V.)
Symbol
Parameter
VIH
Input Voltage—High Logic State
(TRI-STATE Control)
VIL
Input Voltage—Low Logic State
(TRI-STATE Control)
VTH(D)
Differential Input Threshold Voltage
IIB
Input Bias Current
(D)
Conditions
(2)
2
Typ
Max
2.0
Units
V
0.8
V
−7V ≤ VIC ≤ 7V, VIH TRI-STATE = 2V
IO = −0.4 mA, VOH ≥ 2.7V
0.070
0.2
V
IO = 8 mA, VOL ≥ 0.5V
0.070
−0.2
V
VI = −10V
−3.25
mA
VI = −3V
−1.50
mA
VI = 3V
1.50
mA
VI = 10V
3.25
mA
VCC = 0V or 5.25V, Other Inputs at 0V
−7V ≤ VIC ≤ 7V, VIH(3C) = 2V,
Input Balance
(1)
Min
(2)
VOH
IO = −0.4 mA, VID = 0.4V
VOL
IO = 8 mA, VID = −0.4V
2.7
V
0.5
V
All currents into device pins are shown as positive, out of device pins are negative. All voltages referenced to ground unless otherwise
noted.
Refer to EIA RS-422/3 for exact conditions.
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS3486
DS3486
www.ti.com
SNLS354D – MAY 1998 – REVISED APRIL 2013
Electrical Characteristics (1) (continued)
(Unless otherwise noted, minimum and maximum limits apply over recommended temperature and power supply voltage
ranges. Typical values are for TA = 25°C, VCC = 5V and VIC = 0V.)
Symbol
Parameter
Conditions
IOZ
Output TRI-STATE Leakage Current
IOS
Output Short-Circuit Current
Min
Typ
VI(D) = 3V, VIL = 0.8V, VOL = 0.5V
VI(D) = −3V, VIL = 0.8V, VOH = 2.7V
−15
VI(D) = 3V, VIHTRI-STATE = 2V,
VO = 0V,
Max
Units
−40
μA
40
μA
−100
mA
−100
μA
(3)
IIL
Input Current—Low Logic State
(TRI-STATE Control)
VIL = 0.5V
IIH
Input Current—High Logic State
(TRI-STATE Control)
VIH = 2.7V
20
μA
VIH = 5.25V
100
μA
VIC
Input Clamp Diode Voltage
(TRI-STATE Control)
IIN = −10 mA
−1.5
V
ICC
Power Supply Current
All Inputs VIL = 0V
85
mA
(3)
Only one output at a time should be shorted.
Switching Characteristics
(Unless otherwise noted, VCC = 5V and TA = 25°C.)
Symbol
tPHL(D)
tPLH(D)
Parameter
Propagation Delay Time—Differential Inputs to Output
Output High to Low
Output Low to High
Min
Typ
Max
Units
19
35
ns
19
30
ns
tPLZ
TRI-STATE Control to Output
Output Low to TRI-STATE
23
35
ns
tPHZ
Output High to TRI-STATE
25
35
ns
tPZH
Output TRI-STATE to High
18
30
ns
tPZL
Output TRI-STATE to Low
20
30
ns
AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS3486
3
DS3486
SNLS354D – MAY 1998 – REVISED APRIL 2013
www.ti.com
Input pulse characteristics:
tTLH = tTHL = 6 ns (10% to 90%)
PRR = 1 MHz, 50% duty cycle
Figure 2. Propagation Delay Differential Input to Output
1.5V for tPHZ and tPLZ
1.5V for tPLZ and tPZL
Input pulse characteristics:
tTLH = tTHL = 6 ns (10% to 90%)
PRR = 1 MHz, 50% duty cycle
tPLZ
4
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS3486
DS3486
www.ti.com
SNLS354D – MAY 1998 – REVISED APRIL 2013
tPHZ
tPZH
tPZL
Figure 3. Propagation Delay TRI-STATE Control Input to Output
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS3486
5
DS3486
SNLS354D – MAY 1998 – REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Revision C (April 2013) to Revision D
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6
Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 5
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS3486
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
DS3486M/NOPB
ACTIVE
SOIC
D
16
48
RoHS & Green
SN
Level-1-260C-UNLIM
0 to 70
DS3486M
DS3486MX/NOPB
ACTIVE
SOIC
D
16
2500
RoHS & Green
SN
Level-1-260C-UNLIM
0 to 70
DS3486M
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
