OBSOLETE
DS3896, DS3897
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SNOSBX0D – JANUARY 1996 – REVISED FEBRUARY 2013
DS3896/DS3897 BTL Trapezoidal™ Transceivers
Check for Samples: DS3896, DS3897
FEATURES
DESCRIPTION
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These advanced transceivers are specifically
designed to overcome problems associated with
driving a densely populated backplane, and thus
provide significant improvement in both speed and
data integrity. Their low output capacitance, low
output signal swing and noise immunity features
make them ideal for driving low impedance buses
with minimum power consumption.
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8 bit DS3896 Transceiver Provides High
Package Density
4 bit DS3897 Tansceiver Provides Separate
Driver Input and Receiver Output Pins
BTL Compatible
Less than 5 pF Output Capacitance for Minimal
Bus Loading
1 Volt Bus Signal Swing Reduces Power
Consumption
Trapezoidal Driver Waveforms (tr, tf ≃ 6 ns
typical) Reduce Noise Coupling to Adjacent
Lines
Temperature Insensitive Receiver Thresholds
Track the Bus Logic High Level to Maximize
Noise Immunity in both High and Low States
Guaranteed A.C. Specifications on Noise
Immunity and Propagation Delay Over the
Specified Temperature and Supply Voltage
Range
Open Collector Driver Output Allows Wire-or
Connection
Advanced Low Power Schottky Technology
Glitch Free power Up/Down Protection on
Driver and Receiver Outputs
TTL Compatible Driver and Control Inputs and
Receiver Outputs
The DS3896 is an octal high speed schottky bus
transceiver with common control signals, whereas the
DS3897 is a quad device with independent driver
input and receiver output pins. The DS3897 has a
separate driver disable for each driver and is,
therefore, suitable for arbitration lines. The separate
driver disable pins (En) feature internal pull ups and
may be left open if not required. On the other hand,
the DS3896 provides high package density for
data/address lines.
The open collector drivers generate precise
trapezoidal
waveforms,
which
are
relatively
independent of capacitive loading conditions on the
outputs. This significantly reduces noise coupling to
adjacent lines. In addition, the receivers use a low
pass filter in conjunction with a high speed
comparator, to further enhance the noise immunity
and provide equal rejection to both negative and
positive going noise pulses on the bus.
To minimize bus loading, these devices also feature a
schottky diode in series with the open collector output
that isolates the driver output capacitance in the
disabled state. The output low voltage is typically “1V”
and the output high level is intended to be 2V. This is
achieved by terminating the bus with a pull up resistor
to 2V at both ends. The device can drive an
equivalent DC load of 18.5Ω (or greater) in the above
configuration.
These signaling requirements, including a 1 volt
signal swing, low output capacitance and precise
receiver thresholds are referred to as Bus
Transceiver Logic (BTL).
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Trapezoidal is a trademark of dcl_owner.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1996–2013, Texas Instruments Incorporated
OBSOLETE
DS3896, DS3897
SNOSBX0D – JANUARY 1996 – REVISED FEBRUARY 2013
www.ti.com
Logic Diagrams
Figure 1. DS3896N, M
See Package Number DW0020B or NFH0020A
Figure 2. DS3897N, M
See Package Number DW0020B or NFH0020A
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Supply Voltage
6V
Control Input Voltage
5.5V
Driver Input and Receiver Output
5.5V
Receiver Input and Driver Output
2.5V
Power Dissipation at 70°C N Package
1480 mW
M Package
TBD mW
−65°C to +150°C
Storage Temperature Range
Lead Temperature (Soldering, 4 sec.)
(1)
(2)
260°C
“Absolute maximum ratings” are those beyond which the safety of the device cannot be guaranteed. They are not meant to imply that
the device should be operated at these limits. The table of “Electrical Characteristic” provide conditions for actual device operation.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
Recommended Operating Conditions
Min
Max
Units
Supply Voltage, VCC
4.75
5.25
V
Bus Termination Voltage
1.90
2.10
V
0
70
°C
Operating Free Air Temperature
2
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SNOSBX0D – JANUARY 1996 – REVISED FEBRUARY 2013
Electrical Characteristics: (1) (2)
(0°C ≤ TA ≤ 70°C, 4.75V ≤ VCC ≤ 5.25V unless otherwise specified)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Driver and Control Inputs: (An, Dn, En, CD, T/R , RE , TE )
VIH
Logical “1” Input Voltage
VIL
Logical “0” Input Voltage
II
Logical “1” Input Current
IIH
IIHC
2.0
V
0.8
V
An = Dn = En = VCC
1
mA
Logical “1” Input Current
An = Dn = En = 2.4V
40
μA
Logical “1” Input Current
CD = T/R = RE = TE = 2.4V
80
μA
IIL
Logical “0” Input Current
An = Dn = En = 0.4V
−1
−1.6
mA
IILC
Logical “0” Input Current
CD = T/R = RE = TE = 0.4V
−180
−400
μA
VCL
Input Diode Clamp Voltage
Iclamp = −12 mA
−0.9
−1.5
V
1.0
1.2
V
10
100
μA
100
μA
1.62
V
Driver Output/Receiver Input: (Bn)
VOLB
Low Level Bus Voltage
An = Dn = En = T/R = 2V, VL = 2V
0.75
RL = 18.5Ω, CD = TE = 0.8V (Figure 3)
IIHB
Maximum Bus Current (Power On)
An = Dn = En = 0.8V, VCC = 5.25V
Bn = 2V
IILB
Maximum Bus Current (Power Off)
An = Dn = En = 0.8V, VCC = 0V
Bn = 2V
VTH
Receiver Input Threshold
VCC = 5V
1.47
1.55
Bn = 1.2V, IOH = −400 μA
2.4
3.2
Receiver Output: (An, Rn)
VOH
Logical “1” Output Voltage
V
CD = T/R = RE = 0.8V
VOL
Logical “0” Output Voltage
Bn = 2V, IOL = 16 mA
0.35
0.5
V
−70
−100
mA
CD = T/R = RE = 0.8V
IOS
Output Short Circuit Current
−20
Bn = 1.2V
CD = T/R = RE = 0.8V
ICC
Supply Current (DS3896)
VCC = 5.25V
90
135
mA
ICC
Supply Current (DS3897)
VCC = 5.25V
50
80
mA
(1)
(2)
All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
All typicals are given for VCC = 5V and Ta = 25°C.
DS3896 Switching Characteristics (1)
(0°C ≤ TA ≤ 70°C, 4.75V ≤ VCC ≤ 5.25V unless otherwise specified)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
5
9
15
ns
5
9
15
ns
5
10
18
ns
5
12
20
ns
5
15
25
ns
5
22
35
ns
3
6
10
ns
3
6
10
ns
5
12
18
ns
5
10
18
ns
Driver:
tDLH
An to Bn
CD = 0.8V, T/R = 2.0V, VL = 2V
tDHL
(Figure 4)
tDLHC
CD to Bn
An = T/R = 2.0V, VL = 2V
tDHLC
tDLHT
(Figure 4)
T/R to Bn
tDHLT
VCI = An, VC = 5V,
(Figure 7)
CD = 0.8V, RC = 390Ω, CL = 30 pF
RL1 = 18Ω, RL2 = NC, VL = 2V
tR
Driver Output Rise Time
tF
Driver Output Fall Time
CD = 0.8V, T/R = 2V, VL = 2V
(Figure 4)
Receiver:
tRLH
Bn to An
CD = 0.8V, T/R = 0.8V
tRHL
(1)
(Figure 5)
Note: NC means open
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SNOSBX0D – JANUARY 1996 – REVISED FEBRUARY 2013
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DS3896 Switching Characteristics(1) (continued)
(0°C ≤ TA ≤ 70°C, 4.75V ≤ VCC ≤ 5.25V unless otherwise specified)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
5
10
18
ns
5
8
15
ns
2
4
8
ns
3
7
12
ns
5
10
18
ns
14
24
40
ns
2
4
8
ns
2
8
15
ns
3
6
Min
Typ
Max
Units
5
9
15
ns
5
9
15
ns
5
10
18
ns
5
12
20
ns
3
6
10
ns
3
6
10
ns
5
10
18
ns
5
12
18
ns
5
10
18
ns
5
8
15
ns
2
4
8
ns
Driver:
tRLZC
CD to An
Bn = 2.0V, T/R = 0.8V, CL = 5 pF
RL1 = 390Ω, RL2 = NC, VL = 5V ( Figure 6)
tRZLC
Bn = 2.0V, T/R = 0.8V, CL = 30 pF
RL1 = 390Ω, RL2 = 1.6k, VL = 5V (Figure 6)
tRHZC
Bn = 0.8V, T/R = 0.8V, VL = 0V,
RL1 = 390Ω, RL2 = NC, CL = 5 pF (Figure 6)
tRZHC
Bn = 0.8V, T/R = 0.8V, VL = 0V,
RL1 = NC, RL2 = 1.6k, CL = 30 pF
tRLZT
T/R to An
(Figure 6)
VCI = Bn, VC = 2V, RC = 18Ω,
CD = 0.8V, VL = 5V, RL1 = 390Ω,
RL2 = NC, CL = 5 pF
tRZLT
(Figure 7)
VCI = Bn, VC = 2V, RC = 18Ω,
CD = 0.8V, VL = 5V, RL1 = 390Ω,
RL2 = 1.6k, CL = 30 pF
tRHZT
(Figure 7)
VCI = Bn, VC = 0V, RC = 18Ω,
CD = 0.8V, VL = 0V, RL1 = 390Ω,
RL2 = NC, CL = 5 pF
tRZHT
(Figure 7)
VCI = Bn, VC = 0V, RC = 18Ω,
CD = 0.8V, VL = 0V, RL1 = NC
RL2 = 1.6k, CL = 30 pF
tNR
(Figure 7)
Receiver Noise
(Figure 8)
ns
Rejection Pulse Width
DS3897 Switching Characteristics (1)
(0°C ≤ TA ≤ 70°C, 4.75V ≤ VCC ≤ 5.25V unless otherwise specified)
Symbol
Parameter
Conditions
Driver:
tDLH
Dn, En to Bn
TE = 0.8V, RE = 2.0V, VL = 2V
TE to Bn
An = RE = 2.0V, VL = 2V,
tDHL
(Figure 4)
tDLHT
tDHLT
(Figure 4)
RC = 390Ω, VCI = An, VC = 5V, CL = 30 pF
RL1 = 18Ω, RL2 = NC, VL = 2V (Figure 7)
tR
Driver Output Rise Time
tF
Driver Output Fall Time
CD = 0.8V, T/R = 2V, VL = 2V
(Figure 4)
Receiver:
tRLH
Bn to Rn
TE = 2.0V, RE = 0.8V
(Figure 5)
tRHL
tRLZR
RE to Rn
Bn = TE = 2V, VL = 5V, CL = 5 pF
RL1 = 390Ω, RL2 = NC (Figure 6)
tRZLR
Bn = TE = 2V, VL = 5V, CL = 30 pF
RL1 = 390Ω, RL2 = 1.6k
tRHZR
(Figure 6)
Bn = 0.8V, TE = 2V, VL = 0V,
RL1 = 390Ω, RL2 = NC, CL = 5 pF
(1)
4
(Figure 6)
Note: NC means open
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OBSOLETE
DS3896, DS3897
www.ti.com
SNOSBX0D – JANUARY 1996 – REVISED FEBRUARY 2013
DS3897 Switching Characteristics(1) (continued)
(0°C ≤ TA ≤ 70°C, 4.75V ≤ VCC ≤ 5.25V unless otherwise specified)
Symbol
Parameter
tRZHR
Conditions
Bn = 0.8V, TE = 2V, VL = 0V,
RL1 = NC, RL2 = 1.6k, CL = 30 pF
tNR
Receiver Noise
Min
Typ
Max
Units
3
7
12
ns
3
6
10
20
30
ns
10
20
30
ns
(Figure 6)
(Figure 8)
ns
Rejection Pulse Width
Driver plus Receiver:
tDRLH
Dn to Rn
TE = RE = 0.8V
(Figure 9)
tDRHL
Figure 3. Driver Output Low Voltage Test
Note: tr = tf ≤ 5 ns from 10% to 90%
Figure 4. Driver Propagation Delays
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5
OBSOLETE
DS3896, DS3897
SNOSBX0D – JANUARY 1996 – REVISED FEBRUARY 2013
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Note: tR = tF ≤ 10 ns from 10% to 90%
Figure 5. Receiver Propagation Delays
Note: tr = tf ≤ 5 ns from 10% to 90%
Figure 6. Propagation Delay from CD pin to An
6
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OBSOLETE
DS3896, DS3897
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SNOSBX0D – JANUARY 1996 – REVISED FEBRUARY 2013
Note: tr = tf ≤ 5 ns from 10% to 90%
Figure 7. Propagation Delay from T/R pin to An or Bn
Note: tr = tf = 2 ns from 10% to 90%
Figure 8. Receiver Noise Immunity: “No Response at Output” Input Waveforms
Note: tr = tf ≤ 5 ns from 10% to 90%
Figure 9. Driver Plus Receiver Delays
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7
OBSOLETE
DS3896, DS3897
SNOSBX0D – JANUARY 1996 – REVISED FEBRUARY 2013
www.ti.com
TYPICAL APPLICATION
8
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Copyright © 1996–2013, Texas Instruments Incorporated
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OBSOLETE
DS3896, DS3897
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SNOSBX0D – JANUARY 1996 – REVISED FEBRUARY 2013
REVISION HISTORY
Changes from Revision C (February 2013) to Revision D
•
Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 8
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9
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