DS8830N

DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS SLLS093D – OCTOBER 1972 – REVISED APRIL 1998 D D description The DS8830, SN55183, and SN75183 dual differential line drivers are designed to provide differential output signals with high current capability for driving balanced lines, such as twisted pair, at normal line impedances without high power dissipation. These devices can be used as TTL expander/phase splitters, because the output stages are similar to TTL totem-pole outputs. SN55183 . . . J OR W PACKAGE SN75183 . . . D OR N PACKAGE DS8830 . . . N PACKAGE (TOP VIEW) 1A 1B 1C 1D 1Y 1Z GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 2D 2C 2B 2A 2Y 2Z SN55183 . . . FK PACKAGE (TOP VIEW) 1B 1A NC VCC 2D D D D Single 5-V Supply Differential Line Operation Dual Channels T TL Compatibility Short-Circuit Protection of Outputs Output Clamp Diodes to Terminate Line Transients High-Current Outputs Quad Inputs Single-Ended or Differential AND/NAND Outputs Designed for Use With Dual Differential Drivers SN55182 and SN75182 Designed to Be Interchangeable With National Semiconductor DS7830 and DS8830 1C NC 1D NC 1Y 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2C NC 2B NC 2A 1Z GND NC 2Z 2Y D D D D D D NC – No internal connection THE DS8830 AND SN55183 ARE NOT RECOMMENDED FOR NEW DESIGNS The driver is of monolithic single-chip construction, and both halves of the dual circuits use common power supply and ground terminals. The SN55183 is characterized for operation over the full military temperature range of –55°C to 125°C. The DS8830 and SN75183 are characterized for operation from 0°C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS SLLS093D – OCTOBER 1972 – REVISED APRIL 1998 logic symbol† 1A 1B 1C 1D 2A 2B 2C 2D 1 & 5 2 3 6 4 1Z 10 9 11 12 8 13 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, N, and W packages. logic diagram (positive logic) 1 1A 5 1Y 2 1B 1C 3 6 1Z 4 1D 10 2A 9 2Y 11 2B 2C 12 8 2Z 13 2D Positive logic: y = ABCD, Z = ABCD Pin numbers shown are for the D, J, N, and W packages. 2 1Y POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2Y 2Z DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS SLLS093D – OCTOBER 1972 – REVISED APRIL 1998 schematic (each driver) 14 VCC 545 Ω V 2 kΩ 3 kΩ 9Ω 6, 8 Z 1, 10 A 300 Ω 2, 11 B 545 Ω V 3, 12 C 4 kΩ D 3.2 kΩ 3 kΩ 9Ω 4, 13 5, 9 Y 2 kΩ 300 Ω 7 GND Resistor values shown are nominal. Pin numbers shown are for the D, J, N, and W packages. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS SLLS093D – OCTOBER 1972 – REVISED APRIL 1998 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Duration of output short circuit (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 s Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . . . . . . . . . . . . . . . . . . . . . 300°C Case temperature for 60 seconds, Tc: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to network ground terminal. 2. Not more than one output should be shorted to ground at any one time. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING D FK‡ J‡ 950 mW 7.6 mW/°C 608 mW – 1375 mW 11.0 mW/°C 880 mW 275 mW 1375 mW 11.0 mW/°C 880 mW 275 mW N 1150 mW 9.2 mW/°C 736 mW – DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 125°C POWER RATING W‡ 1000 mW 8.0 mW/°C 640 mW 200 mW ‡ In the FK, J, and W packages, SN55183 chips are alloy mounted and SN75183 chips are glass mounted. recommended operating conditions DS8830, SN75183 SN55183 Supply voltage, VCC High-level input voltage, VIH NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 2 2 V V Low-level input voltage, VIL 0.8 0.8 V High-level output current, IOH –40 –40 mA Low-level output current, IOL 40 40 mA 70 °C Operating free-air temperature, TA 4 UNIT MIN –55 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 125 0 DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS SLLS093D – OCTOBER 1972 – REVISED APRIL 1998 electrical characteristics over recommended ranges of VCC and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VOH High level output voltage High-level Y (AND) outputs VIH = 2 V IOH = –0.8 mA IOH = –40 mA VOL Low level output voltage Low-level Y (AND) outputs 8V VIL = 0 0.8 IOL = 32 mA IOL = 40 mA VOH High level output voltage High-level Z (NAND) outputs VIL = 0 0.8 8V IOH = –0.8 mA IOH = –40 mA VOL Low level output voltage Low-level Z (NAND) outputs VIH = 2 V IOL = 32 mA IOL = 40 mA IIH II High-level input current IIL IOS Low-level input current MIN TYP† MAX 2.4 1.8 V 3.3 0.2 0.22 0.4 2.4 1.8 V V 3.3 0.2 0.22 UNIT 0.4 V 120 µA 2 mA –4.8 mA –120 mA ICC Supply current (average per driver) VCC = 5 V, All inputs at 5 V, No load 10 18 † All typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second. § TA = 125°C is applicable to SN55183 only. mA Input current at maximum input voltage Short-circuit output current‡ VIH = 2.4 V VIH = 5.5 V VIL = 0.4 V VCC = 5 V, TA =125°C§ –40 –100 switching characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 8 12 ns tPLH Propagation delay time, low- to high-level Y output AND gates CL = 15 pF, See FIgure 1(a) tPHL Propagation delay time, high- to low-level Y output AND gates CL = 15 pF, See FIgure 1(a) 12 18 ns tPLH Propagation delay time, low- to high-level Z output NAND gates CL = 15 pF, See FIgure 1(a) 6 12 ns tPHL Propagation delay time, high- to low-level Z output NAND gates CL = 15 pF, See FIgure 1(a) 6 8 ns tPLH Propagation delay time, low- to high-level differential output Y output with respect to Z output, RL = 100 Ω in series with 5000 pF, See Figure 1(b) 9 16 ns tPHL Propagation delay time, high- to low-level differential output Y output with respect to Z output, RL = 100 Ω in series with 5000 pF, See Figure 1(b) 8 16 ns POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS SLLS093D – OCTOBER 1972 – REVISED APRIL 1998 PARAMETER MEASUREMENT INFORMATION 2.5 V Input VCC = ±5 V Input 1.5 V 1.5 V 0V tPLH Pulse Generator (see Note A) CL = 15 pF (see Note B) CL = 15 pF (see Note B) Y Output tPHL VOH Y Output 1.5 V 1.5 V VOL tPLH tPHL Z Output VOH Z Output 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS TEST CIRCUIT (a) OUTPUTS Y AND Z Input VCC = 5 V Pulse Generator (see Note A) 100 W 3V Y Output Input 1.5 V 1.5 V 0V tPLH 5000 pF Z Output Differential Output Voltage tPHL VYS 0V 0V –VYS VOLTAGE WAVEFORMS TEST CIRCUIT (b) DIFFERENTIAL OUTPUT NOTES: A. The pulse generators have the following characteristics: ZO = 50 Ω, tr ≤ 10 ns, tf ≤ 10 ns, tw = 0.5 µs, PRR ≤ 1 MHz. B. CL includes probe and jig capacitance. C. Waveforms are monitored on an oscilloscope with ri ≥ 1 MΩ. Figure 1. Test Circuits and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS SLLS093D – OCTOBER 1972 – REVISED APRIL 1998 TYPICAL CHARACTERISTICS† INPUT THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE V T – Input Threshold Voltage – V 2.2 2 1.8 1.6 1.4 1.2 1 0.8 ÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ VCC = 5 V VO = 1.5 V VIH min NAND Gate AND Gate VIL max 0.6 0.4 –75 –25 0 25 50 75 100 50-Ω Load 3 2.5 TA = 25°C 2 TA = – 55°C 1.5 1 TA = 125°C 0.5 125 0 TA – Free-Air Temperature – °C –20 –40 –60 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ VOL – Low-Level Output Voltage – V V OD – Differential Output Voltage – V VCC = 5 V TA = 125°C TA = 25°C TA = –55°C 1 0 0 25 50 75 ÏÏÏÏ ÏÏÏÏ 3 VCC = 5 V 2 –100 –120 –140 –160 Figure 3 DIFFERENTIAL OUTPUT VOLTAGE vs DIFFERENTIAL OUTPUT CURRENT 3 –80 IOH – High-Level Output Current – mA Figure 2 4 VCC = 5 V 200-Ω Load 100-Ω Load 3.5 0 –50 ÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ 4 V OH – High-Level Output Voltage – V 2.4 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 100 125 IOD – Differential Output Current – mA ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ 2 TA = 25°C TA = –55°C 1 TA = 125°C 0 0 20 40 60 80 100 120 140 160 180 200 IOL – Low-Level Output Current – mA Figure 4 Figure 5 † Operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS SLLS093D – OCTOBER 1972 – REVISED APRIL 1998 TYPICAL CHARACTERISTICS† TOTAL POWER DISSIPATION (BOTH DRIVERS) vs FREQUENCY PROPAGATION DELAY TIME (DIFFERENTIAL OUTPUT) vs FREE-AIR TEMPERATURE ÏÏÏÏÏÏ ÏÏÏÏÏÏ 240 20 220 PD – Total Power Dissipation – mW t pd – Propagation Delay Time – ns VCC = 5 V See Figure 1(b) 15 ÏÏÏ ÏÏÏ ÏÏÏ ÏÏÏ 10 tPLH tPHL 5 200 180 ÏÏÏÏÏÏÏ ÁÁ ÏÏÏÏÏÏÏ ÁÁ ÏÏÏÏÏÏÏ ÁÁ VCC = 5 V No Load Input: 3-V Square Wave TA = 25°C 160 140 120 100 80 60 0 –75 –50 –25 0 25 50 75 100 125 40 0.1 TA – Free-Air Temperature – °C 0.4 1 4 10 40 100 f – Frequency – MHz Figure 6 Figure 7 † Operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS SLLS093D – OCTOBER 1972 – REVISED APRIL 1998 APPLICATION INFORMATION VCC = 5 V VCC = 5 V 1/2 ’183 Inputs A B C D Inverting Input Z 1/2 ’182 0.002 µF (see Note A) Output RT Resp Time Cont Y Twisted Pair 100 pF (see Note B) Noninverting Input Strobe GND GND NOTES: A. When the inputs are open circuited, the output is high. A capacitor may be used for dc isolation of the line-terminating resistor. At the frequency of operation, the impedance of the capacitor should be relatively small. Example: let f = 5 MHz C = 0.002 µF 1 1 Z (circuit) 2 fC 2 5 10 6 0.002 Z (circuit) 16 + [ p + pǒ W Ǔǒ 10 *6 Ǔ B. Use of a capacitor to control response time is optional. Figure 8. Transmission of Digital Data Over Twisted-Pair Line POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 PACKAGE OPTION ADDENDUM www.ti.com 25-Oct-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-7900901VCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-7900901VC A SNV55183J 7900901CA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 7900901CA SNJ55183J DS8830N OBSOLETE PDIP N 14 TBD Call TI Call TI 0 to 70 SN55183J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN55183J SN75183D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 SN75183 SN75183DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 SN75183 SN75183N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN75183N SN75183NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN75183N SN75183NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 SN75183 SNJ55183J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 7900901CA SNJ55183J (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Oct-2016 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. 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OTHER QUALIFIED VERSIONS OF SN55183, SN55183-SP, SN75183 : • Catalog: SN75183, SN55183 • Military: SN55183 • Space: SN55183-SP NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Military - QML certified for Military and Defense Applications • Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN75183NSR Package Package Pins Type Drawing SO NS 14 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 16.4 Pack Materials-Page 1 8.2 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.5 2.5 12.0 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN75183NSR SO NS 14 2000 367.0 367.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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