DS90UB927QEVM

Draft DS90UB927QEVM User Guide User's Guide Literature Number: SNLU125 November 2012 Draft Chapter 1 SNLU125 – November 2012 Introduction 1.1 DS90UB927QEVM The Texas Instruments DS90UB927QEVM evaluation module (EVM) helps system designers evaluate the operation and performance of the DS90UB927Q 5MHz-85MHz FPD-Link III Serializer (SER). The device translates four FPD-Link (I) compatible LVDS data input pairs and one LVDS clock into a high-speed serialized FPD-Link III interface for transport over a single shielded twisted pair (STP) cable. The DS90UB927QEVM board features a 20-position IDC connector at the FPD-Link input, and a Rosenberger HSD Automotive Connector at the FPD-Link III output. The included SMA connectors may also be configured as the FPD-Link III data output, enabling evaluation of other connectors and cable configurations. The EVM contains one serializer (SER) device Table 1-1. Device and Package Configurations 1.2 Reference IC Package U1 DS90UB927QSQ LLP-40 DS90UB927QEVM Kit Contents The DS90UB927QEVM Kit contains the following items: • DS90UB927QEVM Evaluation Board • ALP Installation CD • USB Cable 1.3 System Requirements The ALP software installation requires a PC with a USB interface running the Windows XP operating system. 1.4 DS90UB927QEVM Overview The DS90UB927Q serializer supports rich audiovisual applications in automotive navigation and rear seat entertainment systems. It transports LVDS video data, I2S audio, GPIO, and I2C control over a single shielded twisted pair cable. The evaluation board and included software enables easy evaluation of the serializer features, including: • Support of 720p video applications with a pixel clock up to 85MHz • Surround sound I2S Digital Audio Applications with up to 4 I2S data inputs • Low EMI FPD-Link video input interface • Bidirectional control channel including GPIO (with 2 dedicated pins), interrupt, and I2C interface • Up to 10 configurable I2C addresses • Flexible 3.3V or 1.8V LVCMOS I/O interface • Backwards compatibility mode to DS90UR906Q, DS90UR908Q, and DS90UR916Q • Low-power modes 2 Introduction SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Typical Application www.ti.com • 1.5 Internal Pattern Generation Typical Application The following diagram illustrates a typical rear seat entertainment application utilizing the DS90UB927Q serializer and a compatible deserializer (DS90UB926Q or DS90UB928Q). The DS90UB927Q accepts video, audio, and control information from an AV source or graphics processor and transports it over an automotive-grade STP cable to its partner deserializer where it is reassembled and driven to the display, audio system, and other peripherals requiring remote configuration or control. I2C Digital Video Processor / Graphics Controller A/V Source FPD-Link DS90UB927Q I2S ADC Å Forward Channel (A/V, I2C, GPIO) Back Channel (I2C, GPIO) Æ FPD-Link III LCD Monitor, LCD TV, Digital TV I2S FPD-Link LCD Controller -Timing -Clock/Data LCD Drivers I2C DS90UB928Q DAC Figure 1-1. Typical Application/Evaluation Configuration SNLU125 – November 2012 Submit Documentation Feedback Introduction Copyright © 2012, Texas Instruments Incorporated 3 Draft Chapter 2 SNLU125 – November 2012 Quick Start Guide 2.1 Board Setup This section describes how to quickly set up the DS90UB927QEVM with an appropriate deserializer for evaluation of the chipset in display applications. The default switches and jumper positions have been set at the factory. This setup guide assumes the user has already installed and configured the included ALP software. 1. Connect 3.3V DC power and ground from a power supply to J8 (VDD33C) and J9 (VSS). If 1.8V VDDIO operation is desired, set the 1.8V position at JP7 and apply 1.8V DC at pin 1 of JP6. Alternatively, onboard 1.8V DC and 3.3V DC voltage regulators may be utilized by connecting 5V DC at the J7 barrel power jack (center positive). 2. Connect an applicable cable (not provided, Rosenberger HSD configured by default) from the DS90UB927Q-EVK TX board FPD-Link III output to the FPD-Link III input of a compatible FPD-Link III RX board (DS90UB928Q or DS90UB928Q - not included in kit). 3. From the Video source, connect a flat cable (not included) to the TX board and connect the appropriate cable (not supplied) from the RX board (provided separately) to the panel. 4. Connect the included USB cable from a host computer running the included TI ALP software to the USB port (J6) on the TX board. See the included ALP software guide for further information on using the TI ALP tool. 5. (Optional) Connect I2S audio (not included) from an I2S audio source to TX board pins DA (data), CLK (clock), and WC (word clock) and from RX board pins DA, CLK, and WC to an I2S DAC or audio output. 6. (Optional) Connect any required GPIO interfaces. GPIO0 and GPIO1 are dedicated pins. 7. Jumpers and switches have been configured by TI; they should not require any changes for immediate operation of the board. See Configuration Settings section and the DS90UB927Q device datasheet for further details. 4 Quick Start Guide SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Board Setup www.ti.com Figure 2-1. DS90UB927QEVM SNLU125 – November 2012 Submit Documentation Feedback Quick Start Guide Copyright © 2012, Texas Instruments Incorporated 5 Draft Chapter 3 SNLU125 – November 2012 Evaluation Hardware Overview 3.1 Board Overview The evaluation board includes circuits and interfaces facilitating the different device features of the DS90UB927Q serializer, including power, video data, FPD-Link III interface, I2S audio, I2C control, connectors, and switches. Power External I2C ALP USB-to-I2C Reset Mode Select INTB FPD-Link FPD-Link III DS90UB927Q Serializer I2C Address Select I2S and GPIO Note: the 4 corner standoffs are NOT connected to VSS (GND) Figure 3-1. DS90UB927QEVM Layout 6 Evaluation Hardware Overview SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Power www.ti.com 3.2 Power Two options are provided for powering the board. +5V DC power may be supplied at the provided barrel connector (J7, center positive), or +3.3V DC through J8 and J9. If 1.8V VDDIO power supply operation is desired, connect +1.8V DC at JP6 and select 1.8V VDDIO power from JP7. 3.3 FPD-Link Video Data Input The FPD-Link video data input accepts a 20-pin IDC cable or similar 0.1” spaced connector. Connect the clock and 4 FPD-Link (LVDS) data pairs here. The data channel mapping is determined from the MAPSEL switch, located on the mode select switch block. 100Ω differential termination is provided on-board near the DS90UB927Q device (U1). 3.4 FPD-Link III Interface The high-speed FPD-Link interface is the point of output for the high-speed (up to 2.975Gbps) forward data channel, as well as the receive point for the low speed back channel. The default configuration features a Rosenberger HSD-style automotive cable connector. The board also provides two SMA connectors to which other cable connectors may be attached. To use the SMA connectors, depopulate J4 and solder 0Ω resistors at R3 and R4. The FPD-Link signal may be probed from the output capacitors and two provided ground pads (X1 and X2). Use a high-bandwidth differential probe to observe the channel. See the device datasheet for additional details. 3.5 Controller The onboard USB-to-I2C controller allows for easy evaluation of the DS90UB927Q I2C interface without the need for a dedicated external tool. It interfaces with a host PC using the provided TI Analog LaunchPAD (ALP) software. The I2C bus may also be accessed by an external controller via the external I2C interface at J5. 3.6 I2C and Device Addressing A row of switches is provided at S2 and S3 to set the IDx I2C address select. Only one I2C address may be selected at a time. Note that addresses 0x18 and 0x26 through 0x36 are available. All others are reserved. 3.7 I2S and GPIO Interface A 0.1” header block is provided for connections to the I2S and GPIO interfaces. All GPIOs may be configured as inputs or outputs, with GPIO[3:0] available for bidirectional transport. Signal levels should scale with VDDIO. 3.8 Device Address, Reset and Mode Selection Inputs The Mode Select inputs determine the specific mode or state of device operation, including: • PDB When set LOW, the device enters a low-power mode and all registers are reset. Set HIGH for normal operation. • MAPSEL Set LOW to assign LSBs to RxIN3±, set HIGH to assign MSBs to RxIN3±. See device datasheet for details. • LFMODE Set HIGH for 5MHz ≤ PCLK < 15MHz. Set LOW for 15MHZ ≤ PCLK ≤ 85MHz • BKWD Set HIGH to interface with DS90UR906Q, DS90UR908Q, DS90UR910Q, or DS90UR916Q. Set LOW to interface with DS90UB926Q and DS90UB928Q. • REPEAT Set HIGH to activate Repeater Mode. Set LOW for normal operation. These mode settings are selectable from the following switches and buttons: • S1 (Mode Selection Inputs): Set PDB, LFMODE, MAPSEL, BKWD, and REPEAT. See DS90UB927Q datasheet additional detail. SNLU125 – November 2012 Submit Documentation Feedback Evaluation Hardware Overview Copyright © 2012, Texas Instruments Incorporated 7 Draft Indicators • • • 3.9 www.ti.com S2/S3 (IDx Select Inputs): Select required I2C address level for IDx input. Set only one switch to ‘L’ (0x18 is default address). SW1 (PDB Reset Button): PDB pull-down switch. Press to perform a DS90UB927Q (U1) device PDB reset. SW2 (Onboard I2C Bridge Reset): Press to reset the onboard USB-to-I2C bridge controller. Indicators The INTB interrupt state may be observed from the on-board LED indicator. The LED turns off when an interrupt is indicated (INTB = LOW). 3.10 Input/Output Connectors 3 1 1 3 The following jumpers and connectors are provided on the board: • J1/J2 FPD-Link III SMA Output (optional) – These optional outputs may be used to evaluate the FPD-Link III serial link with different STP or micro-coax configurations. To use, remove J4 and populate R3 and R4 with 0Ω resistors. • J3 20-pin FPD-Link (I) Input – Connect LVDS data and clock here. Required 100Ω terminations are located on-board near U1. See DS90UB927Q device datasheet for input electrical characteristics and requirements. • J4 FPD-Link III HSD Automotive Output – Connect to automotive-grade STP cable here. Remove the connector if the SMA outputs (J1/J2) are to be used. • J5 4-pin I2C Input/Output – Connect SDA, SCL, VSS, and VDD33 to external I2C peripherals or controls here. The EVM board provides the recommended 4.7KΩ pull-up resistors. • J6 USB Connector for USB-to-I2C Controller – Connect USB cable to host PC to use EVM board with ALP evaluation software. • J7 5V External Power Input (optional) – Connect +5V center-positive 2.1mm barrel connector here to supply board power. Onboard regulators will supply the board with 3.3V VDDIO and 3.3V/1.8V VDDIO supplies. Do not connect J8/J9 if this connector is used. • J8 +3.3V VDD33 Power Input – Connect to 3.3V power supply. • J9 VSS Power – Connect to system GND. • JP1/JP2 Reserved – Do not populate or connect to external inputs/outputs • JP3 I2S/GPIO Input/output Header – Connect to I2S input pins or bidirectional GPIO pins. See DS90UB927Q datasheet for detailed I2S and GPIO usage. • JP4 VDD_I2C Power Enable – Short to provide 3.3V power to on-board I2C pull-ups. • JP5 Reserved – Do not short or connect to external inputs/outputs • JP6 VDDIO_EXT Power Input – Connect to independent external VDDIO supply if VDDIO = 1.8V • JP7 VDDIO Select – Connect jumper to select VDDIO=VDD33 [2-3] or VDDIO=VDDIO_EXT [1-2] JP7 JP7 VDD_EXT VDD33 Figure 3-2. VDDIO Select (JP7) Jumper Settings • • 8 JP8 INTB Interrupt Output – Monitor INTB status or connect to external device utilizing link interrupt options. See DS90UB927Q datasheet for additional details on INTB options JP9 Reserved – Do not populate or connect to external inputs/outputs Evaluation Hardware Overview SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Chapter 4 SNLU125 – November 2012 ALP Software 4.1 Overview The included Analog Launch PAD (ALP) software allows evaluation of the I2C control interface of the DS90UB927Q serializer. The tool provides a graphical interface for reading/writing the device registers. It also features several useful tools for manipulating advanced device-specific features, including authentication and internal pattern generation. System Requirements: Operating System: Windows XP or Vista USB version: 2.0 4.2 Installation Extract the contents of the NSC Analog Launch PAD CD a temporary location that can be deleted later. Make sure the board USB port is connected to the host PC. The following installation instructions are for the Windows XP Operating System: Install the ALP Software Execute the ALP Setup Wizard program called “Setup.exe”, found on the ALP CD included with the DS90UB927QEVM. 1. Click “Next” 2. Select “I accept the agreement” 3. Click “Next” 4. Select the location to install the ALP software and click “Next” 5. Select the location for the Start Menu shortcut and click “Next” 6. Create a desktop shortcut icon and Quick Launch button (optional). Click “Next” 7. Click “Install.” The software will be extracted and installed to the system. 8. Uncheck “Launch Analog LaunchPAD” and click “Finish.” The ALP software should not be launched until the USB driver is installed. Install the USB Driver To 1. 2. 3. install the ALP hardware USB driver: Select “No, not at this time” then click “Next” Click “Install from a list or specific location” then click “Next” Click “Search for the best driver in these locations”. Uncheck “Search removable media” and check “Include this location in the search.” 4. Browse to the Install Directory which is typically located at “C:\Program Files\National Semiconductor Corp\Analog LaunchPAD\vx.x.x\Drivers” and select the “Next” button. Windows should find the driver. 5. Click “Continue Anyway”. 6. Click “Finish” The software installation is now complete. The ALP software may now be launched. SNLU125 – November 2012 Submit Documentation Feedback ALP Software Copyright © 2012, Texas Instruments Incorporated 9 Draft Usage 4.3 www.ti.com Usage Startup Make sure all the software has been installed and the hardware is powered on and connected to the PC. Execute “Analog LaunchPAD” from the start menu. The default start menu location is “Programs\National Semiconductor Corp\Analog LaunchPAD vx.x.x\Analog LaunchPAD”. The application should come up in the state shown below. If it does not, see “Trouble Shooting” at the end of this document. Under the Devices tab click on “DS90UH92x” to select the device and open up the device profile and its associated tabs. Figure 4-1. ALP Startup Screen 10 ALP Software SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Usage www.ti.com Figure 4-2. Information Tab Figure 4-3. System Topology Tab SNLU125 – November 2012 Submit Documentation Feedback ALP Software Copyright © 2012, Texas Instruments Incorporated 11 Draft Usage www.ti.com Figure 4-4. Pattern Generator Tab Figure 4-5. Register Tab 12 ALP Software SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Usage www.ti.com Figure 4-6. Register Tab with expanded register description 4.3.1 Information Tab The information tab gives basic device state information, including local device information, partner device information, and current link status. For both the local device and partner device, the tab gives the following information: • Device Name • Device Revision • I2C address • Pixel clock range (set by LFMODE) • Repeater Status (set by REPEAT) • Serial Link Mode (set by BKWD) • Audio mode (set by configuration registers) 4.3.2 System Topology Tab The System Topology Tab gives an overview of all devices downstream from the deserializer. Individual devices may be clicked on for individual I2C access. The user may read/write to a specific device from the Device Reg Access panel. 4.3.3 Pattern Generator Tab The Pattern Generator Tab enables interactive control of the internal pattern generator features. The pane controls timing information and different pattern settings, including a scrolling function. Timing information is configured from the Video Control panel, and supports the following timing/clocking sources: • External • Internal SNLU125 – November 2012 Submit Documentation Feedback ALP Software Copyright © 2012, Texas Instruments Incorporated 13 Draft Troubleshooting • www.ti.com Internal w/ Ext. Clock The Internal timing option allows evaluation of the link performance without the need for an external source. The Video Control panel also provides several timing and pixel clock options, including several presets covering common video resolutions. 4.3.4 Registers Tab The Registers Tab allows for direct reading/writing of individual registers or register bits located on the local device. Each register drop-down shows the name and description of individual bits or groupings of bits. Use the check boxes to set individual bits, and commit the register write by clicking the “Apply” button. Click the “Refresh” or “Refresh All” buttons to read an update of the selected register or all registers respectively. 4.4 Troubleshooting If the following window opens after starting the ALP software, double check the hardware setup and that the board USB port is connected to the host PC. Figure 4-7. No Devices error message The USB driver may not be installed. Check the device manager. There should be a device named ”NSC ALP Nano Atmel” device under the “Universal Serial Bus Controllers” as shown below. 14 ALP Software SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Troubleshooting www.ti.com Figure 4-8. Windows XP Analog LaunchPAD USB Driver The software should start with only “DS90UH92x” in the “Devices” pull down menu. If there are more devices then the software is most likely in demo mode. When the ALP is operating in demo mode there is a “(Demo Mode)” indication in the lower left of the application status bar as shown below. SNLU125 – November 2012 Submit Documentation Feedback ALP Software Copyright © 2012, Texas Instruments Incorporated 15 Draft Troubleshooting www.ti.com Figure 4-9. Analog LaunchPAD in Demo Mode Disable the demo mode by selecting the “Preferences” pull down menu and un-checking “Enable Demo Mode”. Figure 4-10. Analog LaunchPAD Preferences Menu After demo mode is disabled, the ALP software will poll the ALP hardware. The ALP software will update and have only “DS90UH92x” under the “Devices” pull down menu. 16 ALP Software SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Chapter 5 SNLU125 – November 2012 Additional Information 5.1 Related Documents Additional information may be found in the device product folder at www.ti.com • DS90UB927Q device datasheet • DS90UB928Q device datasheet • DS90UB926Q device datasheet • TI Application Note AN-2173 • TI Application Note AN-2198 5.2 Document Revision History • 10/26/12 -- Initial Release SNLU125 – November 2012 Submit Documentation Feedback Additional Information Copyright © 2012, Texas Instruments Incorporated 17 Draft Appendix A SNLU125 – November 2012 Board Schematic 18 Additional Information SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Board Stackup www.ti.com A.1 Board Stackup Figure A-1. Board Stackup SNLU125 – November 2012 Submit Documentation Feedback Board Schematic Copyright © 2012, Texas Instruments Incorporated 19 Draft DS90UB927Q Serializer A.2 www.ti.com DS90UB927Q Serializer Figure A-2. DS90UB927Q Serializer 20 Board Schematic SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft USB-to-I2C Controller www.ti.com A.3 USB-to-I2C Controller Figure A-3. USB-to-I2C Controller SNLU125 – November 2012 Submit Documentation Feedback Board Schematic Copyright © 2012, Texas Instruments Incorporated 21 Draft Power A.4 www.ti.com Power Figure A-4. Power 22 Board Schematic SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Appendix B SNLU125 – November 2012 Bill of Materials B.1 DS90UB927QEVM BOM Table B-1. DS90UB927QEVM BOM Item 1 Qty 2 Reference Description Manufacturer CR1,CR2 SUPPRESSOR ESD 24VDC 0603 SMD Littelfuse Part Number PGB1010603MR C1,C5,C8, C9,C10,C1 2,C13,C14, CAP CER .1UF 50V 10% C16,C17,C X7R 0603 22,C26,C2 8,C33,C35, C37 Murata GRM188R71H104KA9 3D GCM155R71C104KA5 5D 2 16 3 2 C2,C3 CAP CER .1UF 16V X7R 0402 Murata 4 2 C6,C7 CAP CERAMIC 4.7PF 25V C0G 0402 Panasonic 5 5 C11,C27,C 29,C36,C3 8 CAP CER 10UF 10V X5R 0603 Taiyo Yuden 6 1 C15 CAPACITOR TANT 1.0UF 16V 10% SMD Kemet T491A105K016AT 7 2 C18,C19 CAP CERAMIC 15PF 50V NP0 0603 Kemet C0603C150J5GACTU 8 1 C21 CAP CER 22UF 6.3V 10% X7R 1206 Murata GCM31CR70J226KE2 3L 9 2 C23,C32 CAPACITOR TANT 2.2UF 20V 10% SMD Kemet T491B225K020AT 10 2 C24,C31 CAP TANTALUM 22UF 25V 20% SMD Nichion F931E226MNC 11 11 C25,C40,C 41,C42,C4 3,C44,C45, C46,C48,C 51,C52 CAP CER 4.7UF 16V X7R 0805 Murata 490-5332-1-ND 12 1 C30 CAP CERM 33000PF 5% 50V X7R 0603 AVX 13 2 LED1,D1 LED ORN/CLEAR 610NM 0402 SMD Lumex 14 2 D3,D4 DIODE SCHOTTKY 400MW 20V SOD123 Diodes, Inc. SD103CW-13-F 15 1 JP3 CONN HEADER 16POS .100 STR 30AU FCI 68602-116HLF 16 3 JP4,JP5,JP 6 CONN HEADER VERT .100 2POS 30AU AMP/Tyco 87220-2 17 1 JP7 CONN HEADER VERT .100 3POS 15AU AMP/Tyco 87224-3 18 2 J1,J2 SMA – Edge Launch Johnson Group SNLU125 – November 2012 Submit Documentation Feedback ECD-G0E4R7C LMK107BJ106MALTD 06035C333JAT2A SML-LX0402SOC-TR 142-0701-851 Bill of Materials Copyright © 2012, Texas Instruments Incorporated 23 Draft DS90UB927QEVM BOM www.ti.com Table B-1. DS90UB927QEVM BOM (continued) Item 24 Qty Reference Description Manufacturer 3M Part Number 19 1 J3 CONN HEADER 20 POS STRGHT GOLD. 20 1 J4 Automotive HSD Connector, RA Rosenberger 21 1 J5 CONN HEADER 4POS .100 VERT GOLD Molex 22-11-2042 22 1 J6 CONN RECEPT MINI USB2.0 5POS Hirose UX60-MB-5ST 23 1 J7 CONN POWER JACK 2.1MM. CPU Inc PJ-002A 24 2 J8,J9 BANANA-female (noninsulated) Johnson 108-0740-001 25 1 L1 CHOKE COIL COMMON MODE 280MA SMD Murata DLW21SN900HQ2L 26 2 L2,L4 FERRITE CHIP 1000 OHM 0402 Murata BLM15AX102SN1D 27 2 Q1,Q2 MOSFET N-CH 50V 200MA SC70-3 Diodes, Inc. 28 3 R1,R59,R6 0 RES 4.7K OHM 1/10W 5% 0603 SMD Panasonic ERJ-3GEYJ472V 29 2 R2,R67 RES 68 OHM 1/10W 5% 0402 SMD Panasonic ERJ-2GEJ680X 30 5 R5,R6,R7, R8,R10 RES 100 OHM 0201 SMD. 1/20W .5% Susumu RR0306P-101-D 31 2 R18,R52 RES 90.9K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF9092X 32 1 R19 RES 124K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1243X 33 1 R20 RES 137K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1373X 34 1 R21 RES 154K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1543X 35 1 R22 RES 169K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1693X 36 1 R23 RES 182K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1823X 37 1 R24 RES 196K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1963X 38 2 R25,R44 RES 210K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF2103X 39 1 R26 RES 226K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF2263X 40 2 R27,R43 RES 243K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF2433X 41 1 R28 RES 240K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF2403X 42 1 R29 RES 267K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF2673X 43 1 R30 RES 270K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF2703X 44 1 R31 RES 280K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF2803X 45 1 R32 RES 294K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF2943X Bill of Materials N2520-6002RB D4S20B-40ML5-Y BSS138W-7-F SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft DS90UB927QEVM BOM www.ti.com Table B-1. DS90UB927QEVM BOM (continued) Item Qty Reference Description Manufacturer 46 6 R36,R37,R 38,R39,R4 0,R92 RES 10.0K OHM 1/10W 1% 0603 SMD Panasonic ERJ-3EKF1002V 47 1 R45 RES 191K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1913X 48 1 R46 RES 180K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1803X 49 1 R47 RES 165K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1653X 50 1 R48 RES 147K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1473X 51 1 R49 RES 130K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1303X 52 1 R50 RES 115K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1153X 53 1 R51 RES 102K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF1023X 54 1 R53 RES 76.8K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF7682X 55 1 R54 RES 71.5K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF7152X 56 1 R55 RES 60.4K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF6042X 57 1 R56 RES 49.9K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF4992X 58 2 R57,R58 RES 40.2K OHM 1/10W 1% 0402 SMD Panasonic ERJ-2RKF4022X 59 6 R62,R63,R 64,R65,R9 4,R95,R96 RES ZERO OHM 1/16W 5% 0402 SMD Panasonic ERJ-2GEJ0R00X 60 4 R66,R91,R 99,R101 RES ZERO OHM 1/10W 5% 0603 SMD Panasonic ERJ-3GEY0R00V 61 5 R68,R74,R 82,R86,R1 02 RES 100K OHM 1/10W 5% 0402 SMD Panasonic ERJ-2GEJ104X 62 2 R69,R70 RES 22 OHM 1/16W 3300PPM 5% 0603 Panasonic ERA-V33J220V 63 2 R75, R76 RES ZERO OHM 1/4W 5% 1206 SMD Panasonic ERJ-8GEY0R00V 64 1 R81 RES 2.49K OHM 1/10W 1% 0603 SMD Vishay CRCW06032K49FKE A 65 2 R83, R87 RES 5.62K OHM 1/10W 1% 0603 SMD. Vishay CRCW06035K62FKE A 66 1 R85 RES 9.31K OHM 1/10W 1% 0603 SMD Vishay CRCW06039K31FKE A 67 2 SW1, SW2 SWITCH TACT APEM ADTSM31NV Grayhill 78B05ST 219-8MST 68 1 S1 SWITCH DIP EXTENDED SEALED 5POS 69 2 S2, S3 SWITCH TAPE SEAL 8 POS SMD CTS 70 1 U1 DS90UB927Q FPD-Link III Serializer TI 71 1 U2 IC AVR MCU 128K 64QFN Atmel 72 2 U4, U5 IC REG LDO 500MA ADJ SOT223-4. TI SNLU125 – November 2012 Submit Documentation Feedback Part Number DS90UB927QSQ AT90USB1287-16MU LP38693MPADJ/NOPB Bill of Materials Copyright © 2012, Texas Instruments Incorporated 25 Draft DS90UB927QEVM BOM www.ti.com Table B-1. DS90UB927QEVM BOM (continued) Item 26 Qty Reference Description Manufacturer Part Number TI LP3982IMM3.3/NOPB 73 1 U6 IC REG LDO 300MA 3.3V 8MSOP 74 1 Y1 CRYSTAL 8.000 MHZ 18PF SMD Abracon 75 1 - PCB - Bill of Materials ABM3-8.000MHZD2Y-T - SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Appendix C SNLU125 – November 2012 Board Layout C.1 Board Layers The following mechanical drawings illustrate the physical layout and stack-up of the 4-layer DS90UB927QEVM evaluation board: Figure C-1. Top Silkscreen SNLU125 – November 2012 Submit Documentation Feedback Figure C-2. Top Copper Board Layout Copyright © 2012, Texas Instruments Incorporated 27 Draft Board Layers www.ti.com Figure C-3. Internal Layer 1: Ground 28 Figure C-4. Internal Layer 2: Power Board Layout SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Draft Board Layers www.ti.com Figure C-5. Bottom Copper Figure C-6. Bottom Silkscreen SNLU125 – November 2012 Submit Documentation Feedback Board Layout Copyright © 2012, Texas Instruments Incorporated 29 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. 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